DRV3256-Q1 TI | Alldatasheet
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Technical content
DRV3256-Q1 Integrated 3-Phase 48-V Automotive Gate Driver Unit (GDU) with Advanced Protection and Diagnostics
1 Features
- AEC-Q100 qualified for automotive applications: – Device ambient temperature grade 0: –40°C to +150°C – Device HBM ESD classification level 2 – Device CDM ESD classification level C4B
- Functional Safety-Compliant targeted – Developed for functional safety applications – Documentation to aid ISO 26262 system design will be available upon production release – Systematic capability up to ASIL D targeted
- Three N-Channel half-bridge gate driver – 2-A/2.5-A max peak gate drive current – Power architecture optimized for 48-V
applications
– 12-V/48-V split supply architecture – 95-V transient absolute maximum rating of DC link power supply (DHCP) – 105-V Bootstrap voltage to support 90-V MOSFET operating voltage range – Bootstrap with charge pump for 100% duty cycle
- Integrated 1x (DRV3256A-Q1) or 3x (DRV3256- Q1) current shunt amplifirers
- Integrated configurable Active Short Circuit (ASC) function – Low-side (DRV3256A-Q1) or Low-side and High-side (DRV3256-Q1/DRV3256B-Q1) ASC support – Low-side and High-side ASC support – Device pin control available – Fault handling capability
- Serial peripheral interface (SPI) with CRC
- Supports 3.3-V and 5-V logic inputs
- Advanced protection features – Battery voltage monitors – MOSFET VDS overcurrent monitors – Rshunt overcurrent monitors – MOSFET VGS gate fault monitors – Analog built in self test – Internal regulator and clock monitors – Device thermal warning and shutdown – Fault condition indicator pins
2 Applications
- Automotive 48-V Mild Hybrid Motor Drives – Belt and integrated starter generators, and Motor generators – Electrical Power Steering – eTurbos and eBoosters – HVAC compressors and fans – Transmission control and actuation – Oil, transmission, and water pumps
3 Description
The DRV3256-Q1 family of devices are highly- integrated three phase gate driver s for 48-V automotive motor drive applications. These devices are specifically designed to support high-power motor drive applications by providing 2-A peak source and 2.5-A peak sink gate drive currents, and 90-V MOSFET transient over voltage support. A highly efficient bootstrap architecture is used to minimize power losses and self-heating of the gate drivers. A charge pump allows for the gate drivers to support 100% PWM duty cycle control. A wide range of diagnostics, monitoring, and protection features supports a robust motor drive system design. A highly configurable Active Short Circuit (ASC) function which enables selected external MOSFETs is integrated to achieve the fast response to system faults and to eliminate the needs of external components. Three or single low-side current shunt amplifiers are optionally provided to support resistor based low-side current sensing.
Package Information
PART NUMBER(1) PACKAGE BODY SIZE (NOM) DRV3256-Q1(2) HTQFP (64) 10.00 mm × 10.00 mm (1) See the orderable addendum at the end of the data sheet. (2) For all available device variants, see the device comparison table. DRV3256-Q1 Three-Phase Gate Driver Controller nSLEEP DRVOFF SPI PWM nFAULT Protection 2A/2.5A N-Channel MOSFETs Gate Drive M nASCIN Current Sense 3 or 1 or 0 x Shunt Amp Current/Phase 48 V ( 20 to 90 V)12 V HS/LS or LS ASC Simplified Schematic DRV3256-Q1 SNVSC76B – JUNE 2022 – REVISED AUGUST 2022 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.
6 Mechanical, Packaging, and Orderable Information....4
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision A (July 2022) to Revision B (August 2022) Page Changes from Revision * (June 2022) to Revision A (July 2022) Page DRV3256-Q1 SNVSC76B – JUNE 2022 – REVISED AUGUST 2022 www.ti.com
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PART NUMBER DEVICE VARIANT MAX GATE DRIVE CURRENT SHUNT AMPLIFIERS Active Short Circuit (HS = High-Side, LS = Low- Side) DRV3256-Q1 DRV3256A-Q1 2 A or 2.5 A 1 LS only DRV3256B-Q1 2 A or 2.5 A 0 HS and LS DRV3256-Q1 2 A or 2.5 A 3 HS and LS www.ti.com DRV3256-Q1 SNVSC76B – JUNE 2022 – REVISED AUGUST 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 3 Product Folder Links: DRV3256-Q1
5 Device and Documentation Support
5.1 Device Support
5.1.1 Device Nomenclature
Device Nomenclature shows a legend for reading the complete orderable device name for the DRV3256-Q1 device
5.2 Documentation Support
For related documentation see the following:
- Texas Instruments, How to Build a Small, Functionally Safe 48-V, 30-kW MHEV Motor-Drive System White paper
- Texas Instruments, How to optimize a motor-driver design for 48-V starter generators Technical article
- Texas Instruments, System Design Considerations for High-Power Motor Driver Applications Application note
- Texas Instruments, Driving parallel MOSFETs using the DRV3255-Q1 Application brief
- Texas Instruments, A basic brushless gate driver design – part 3: integrated vs. discrete half bridges Technical article
- Texas Instruments,PowerPAD™ Thermally Enhanced Package application report
- Texas Instruments,PowerPAD™ Made Easy application report
- Texas Instruments,Sensored 3-Phase BLDC Motor Control Using MSP430 application report
5.2.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Subscribe to updates to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.
5.3 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.
5.4 Trademarks
TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners.
5.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
5.6 Glossary
TI Glossary This glossary lists and explains terms, acronyms, and definitions.
6 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. DRV3256-Q1 SNVSC76B – JUNE 2022 – REVISED AUGUST 2022 www.ti.com
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6.1 Package Option Addendum
Device Status Package Type Package Drawing Pins Package Qty Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking DRV3256AEPA PRQ1 ACTIVE HTQFP PAP 64 1000 RoHS & Green NIPDAU Level-3-260C-1 68 HR -40 to 150 DRV3256A DRV3256EPAP RQ1 ACTIVE HTQFP PAP 64 1000 RoHS & Green NIPDAU Level-3-260C-1 68 HR -40 to 150 DRV3256 DRV3256BEPA PRQ1 ACTIVE HTQFP PAP 64 1000 RoHS & Green NIPDAU Level-3-260C-1 68 HR -40 to 150 DRV3256B Important Information and Disclaimer: The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. www.ti.com DRV3256-Q1 SNVSC76B – JUNE 2022 – REVISED AUGUST 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 5 Product Folder Links: DRV3256-Q1
6.2 Tape and Reel Information
Reel Width (W1) REEL DIMENSIONS W Dimension designed to accommodate the component length Dimension designed to accommodate the component thickness Overall width of the carrier tape Pitch between successive cavity centers Dimension designed to accommodate the component width TAPE DIMENSIONS B0 W A0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket Quadrants Sprocket Holes Q1 Q1Q2 Q2 Q3 Q3Q4 Q4 Reel Diameter User Direction of Feed Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant DRV3256-Q1 SNVSC76B – JUNE 2022 – REVISED AUGUST 2022 www.ti.com
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TAPE AND REEL BOX DIMENSIONS Width (mm) W L H Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DRV3256AEPAPRQ1 HTQFP PAP 64 1000 10.0 10.0 1.0 DRV3256EPAPRQ1 HTQFP PAP 64 1000 10.0 10.0 1.0 DRV3256BEPAPRQ1 HTQFP PAP 64 1000 10.0 10.0 1.0 www.ti.com DRV3256-Q1 SNVSC76B – JUNE 2022 – REVISED AUGUST 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 7 Product Folder Links: DRV3256-Q1
NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Body length does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 per side. 4. Body width does not include interlead flash. Interlead flash shall not exceed 0.50 per side. 5. Strap features may not be present. 6. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. PowerPAD is a trademark of Texas Instruments PACKAGE OUTLINE 4225982/B 07/2021 www.ti.com HTQFP - 1.2 mm max height PLASTIC QUAD FLATPACK PAP0064N A 0.08 C B10.2 9.8 10.2 9.8 12.2 11.8 PIN 1 ID 4X 7.5 60X 0.564X 0.27 0.17
0.08 C A B
C 0.09- 0.20 TYP SEE DETAIL A 1.2 17 32 4964 (1) 0.15 0.05 0.25 GAGE PLANE 0° MIN 0°- 7° 0.75 0.45 5.30 4.06 (0.11) TYP NOTE 5 EXPOSED THERMAL PAD (0.11) TYP NOTE 5 DRV3256-Q1 SNVSC76B – JUNE 2022 – REVISED AUGUST 2022 www.ti.com
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NOTES: (continued) 7. Publication IPC-7351 may have alternate designs. 8. Solder mask tolerances between and around signal pads can vary based on board fabrication site. 9. This package is designed to be soldered to a thermal pad on the board. Refer to technical brief, PowerPAD Thermally Enhanced EXAMPLE BOARD LAYOUT 4225982/B 07/2021 www.ti.com HTQFP - 1.2 mm max heightPAP0064N PLASTIC QUAD FLATPACK SYMM SYMM LAND PATTERN EXAMPLE SCALE: 8X (11.4) NON SOLDER MASK DEFINED
0.05 MAX
( 8) NOTE 9 ( 5.3) SOLDER MASK OPENING 64X (1.5) 64X (0.3) 60X (0.5) (0.65) TYP (1.3) TYP (0.65) TYP (1.3) TYP (11.4) SEE DETAIL METAL COVERED BY SOLDER MASK SOLDER MASK DEFINED PAD (Ø 0.2) TYP VIA 17 32 4964 www.ti.com DRV3256-Q1 SNVSC76B – JUNE 2022 – REVISED AUGUST 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 9 Product Folder Links: DRV3256-Q1
NOTES: (continued) 9. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 10. Board assembly site may have different recommendations for stencil design. EXAMPLE STENCIL DESIGN 4225982/B 07/2021 www.ti.com HTQFP - 1.2 mm max heightPAP0064N PLASTIC QUAD FLATPACK SOLDER PASTE EXAMPLE EXPOSED PAD 100% PRINTED COVERAGE BY AREA SCALE: 8X SYMM SYMM (11.4) ( 5.3) BASED ON
0.1 THICK STENCIL
64X (1.5) 64X (0.3) 60X (0.5) (11.4) METAL COVERED BY SOLDER MASK 4964 SEE TABLE FOR DIFFERENT OPENINGS FOR OTHER STENCIL THICKNESSES 0.178 3.75 X 3.75 0.152 4.06 X 4.06 0.127 4.44 X 4.44 0.1 5.3X5.3 (SHOWN) STENCIL THICKNESS SOLDER STENCIL OPENING DRV3256-Q1 SNVSC76B – JUNE 2022 – REVISED AUGUST 2022 www.ti.com
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www.ti.com 10-Aug-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead finish/ Ball material (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples DRV3256AEPAPRQ1 ACTIVE HTQFP PAP 64 1000 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 150 DRV3256A Samples DRV3256BEPAPRQ1 ACTIVE HTQFP PAP 64 1000 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 150 DRV3256B Samples DRV3256EPAPRQ1 ACTIVE HTQFP PAP 64 1000 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 150 DRV3256 Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1
www.ti.com 10-Aug-2022 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2
PACKAGE MATERIALS INFORMATION www.ti.com 11-Aug-2022 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION www.ti.com 11-Aug-2022 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DRV3256AEPAPRQ1 HTQFP PAP 64 1000 367.0 367.0 55.0 DRV3256BEPAPRQ1 HTQFP PAP 64 1000 367.0 367.0 55.0 DRV3256EPAPRQ1 HTQFP PAP 64 1000 367.0 367.0 55.0 Pack Materials-Page 2
NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Body length does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 per side. 4. Body width does not include interlead flash. Interlead flash shall not exceed 0.50 per side. 5. Strap features may not be present. 6. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. PowerPAD is a trademark of Texas Instruments PACKAGE OUTLINE 4225982/B 07/2021 www.ti.com HTQFP - 1.2 mm max height PLASTIC QUAD FLATPACK PAP0064N A 0.08 C B10.2 9.8 10.2 9.8 12.2 11.8 PIN 1 ID 4X 7.5 60X 0.564X 0.27 0.17 C 0.09- 0.20 TYP SEE DETAIL A 1.2 17 32 4964 (1) 0.15 0.05 0.25 GAGE PLANE 0° MIN 0°- 7° 0.75 0.45 5.30 4.06 (0.11) TYP NOTE 5 EXPOSED THERMAL PAD (0.11) TYP NOTE 5
NOTES: (continued) 7. Publication IPC-7351 may have alternate designs. 8. Solder mask tolerances between and around signal pads can vary based on board fabrication site. 9. This package is designed to be soldered to a thermal pad on the board. Refer to technical brief, PowerPAD Thermally Enhanced EXAMPLE BOARD LAYOUT 4225982/B 07/2021 www.ti.com HTQFP - 1.2 mm max heightPAP0064N PLASTIC QUAD FLATPACK SYMM SYMM LAND PATTERN EXAMPLE SCALE: 8X (11.4) NON SOLDER MASK DEFINED ( 8) NOTE 9 ( 5.3) SOLDER MASK OPENING 64X (1.5) 64X (0.3) 60X (0.5) (0.65) TYP (1.3) TYP (0.65) TYP (1.3) TYP (11.4) SEE DETAIL METAL COVERED BY SOLDER MASK SOLDER MASK DEFINED PAD (Ø 0.2) TYP VIA 17 32 4964
NOTES: (continued) 9. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 10. Board assembly site may have different recommendations for stencil design. EXAMPLE STENCIL DESIGN 4225982/B 07/2021 www.ti.com HTQFP - 1.2 mm max heightPAP0064N PLASTIC QUAD FLATPACK SOLDER PASTE EXAMPLE EXPOSED PAD 100% PRINTED COVERAGE BY AREA SCALE: 8X SYMM SYMM (11.4) ( 5.3) BASED ON 64X (1.5) 64X (0.3) 60X (0.5) (11.4) METAL COVERED BY SOLDER MASK 4964 SEE TABLE FOR DIFFERENT OPENINGS FOR OTHER STENCIL THICKNESSES 0.178 3.75 X 3.75 0.152 4.06 X 4.06 0.127 4.44 X 4.44 0.1 5.3X5.3 (SHOWN) STENCIL THICKNESS SOLDER STENCIL OPENING
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