DRV201 TI | Alldatasheet
Document overview
- Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
- PDF pages: 30
Technical content
2.5 to 4.8 V Controller Product Folder Sample & Buy T echnical Documents Tools & Software Support & Community DRV201 SLVSB25C – AUGUST 2011– REVISED JUNE 2015 DRV201VoiceCoilMotorDriverforCameraAutoFocus
1 Features 2 Applications
1• Configurable for Linear or PWM Mode VCM • Cell Phone Auto Focus Current Generation • Digital Still Camera Auto Focus
- High Efficiency PWM Current Control for VCM • Iris and Exposure Controls
- Advanced Ringing Compensation • Security Cameras
- Integrated 10-bit D/A Converter for VCM Current • Web and PC Cameras Control • Actuator Controls
- Protection
3 Description– Open and Short-Circuit Detection on VCM Pins
The DRV201 device is an advanced voice coil motor– Undervoltage Lockout (UVLO) driver for camera auto focus. It has an integrated D/A– Thermal Shutdown converter for setting the VCM current. VCM current is – Open and Short-Circuit Protection on VCM controlled with a fixed frequency PWM controller or a Output linear mode driver. Current generation can be selected via I2C register. The DRV201 device has an– Internal Current Limit for VCM Driver integrated sense resistor for current regulation and– 4-kV ESD-HBM the current can be controlled through I2C.
- I2C Interface When changing the current in the VCM, the lens• Operating Temperature Range: –40ºC to 85ºC ringing is compensated with an advanced ringing
- 6-Ball WCSP Package With 0.4-mm Pitch compensation function. Ringing compensation reduces the needed time for auto focus significantly.• Max Die Size: 0.8 mm × 1.48 mm The device also has VCM short and open protection• Package Heights: functions.– YFM: 0.15 mm Device Information(1)– YMB: 0.3 mm PART NUMBER PACKAGE BODY SIZE (NOM) DSBGA (6) 0.80 mm × 1.48 mm DRV201 PICOSTAR (6) 0.80 mm × 1.48 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Simplified Schematic An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.
SLVSB25C –AUGUST 2011– REVISED JUNE 2015 www.ti.com Table of Contents
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision B (November 2013) to Revision C Page
- Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Changes from Revision A (June 2012) to Revision B Page
2 Submit Documentation Feedback Copyright © 2011–2015, Texas Instruments Incorporated
Product Folder Links: DRV201
YMB package package markings: YM = YEAR / MONTH DATE CODE D = DAY OF LASER MARK S = ASSEMBLY SITE CODE 0 = Pin A1 (Filled Solid) I SOURCE VBA T GND C B A I SINK SCL SDA I SOURCE VBAT GND C B A I SINK SCL SDA YFM package has no top side markings DRV201 www.ti.com SLVSB25C – AUGUST 2011–REVISED JUNE 2015
5 Pin Configuration and Functions
NAME NO. VBAT 2A P Power GND 1A P Ground I_SOURCE 2B O Voice coil positive terminal I_SINK 1B O Voice coil negative terminal SCL 2C I I2C serial interface clock input SDA 1C I/O I2C serial interface data input/output (open drain)
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT VBAT, ISOURCE, ISINK pin voltage(2) –0.3 5.5 V Voltage at SDA, SCL –0.3 3.6 V Continuous total power dissipation Internally limited TJ Operating junction temperature –40 125 °C TA Operating ambient temperature –40 85 °C Tstg Storage temperature –55 150 °C (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values are with respect to network ground terminal.
6.2 ESD Ratings
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±4000 V(ESD) Electrostatic discharge VCharged device model (CDM), per JEDEC specification JESD22-C101, all ±500pins(2) (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Copyright © 2011–2015, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: DRV201
SLVSB25C –AUGUST 2011– REVISED JUNE 2015 www.ti.com
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT VBAT - Supply voltage 2.5 3.7 4.8 V Voltage Range - SDA and SCL –0.1 3.3 3.6 V TJ - Operating junction temperature –40 125 °C
6.4 Thermal Information
YFMTHERMAL METRIC(1) YMB (DSBGA) UNIT(PICOSTAR)
6 PINS 6 PINS
RθJA Junction-to-ambient thermal resistance 130.6 116.9 °C/W RθJC(top) Junction-to-case (top) thermal resistance 1.4 1.4 °C/W RθJB Junction-to-board thermal resistance 37 22.2 °C/W ψJT Junction-to-top characterization parameter 5.2 0.1 °C/W ψJB Junction-to-board characterization parameter 37 22.2 °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.
6.5 Electrical Characteristics
Over recommended free-air temperature range and over recommended input voltage range (typical at an ambient temperature range of 25°C) (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT INPUT VOLTAGE VBAT Input supply voltage 2.5 3.7 4.8 V VBAT rising 2.2 VUVLO Undervoltage lockout threshold V VBAT falling 2 VHYS Undervoltage lockout hysteresis 50 100 250 mV INPUT CURRENT Input supply current shutdown,ISHUTDOWN MAX: VBAT = 4.4 V 0.15 1 µAincludes switch leakage currents Input supply current standby, includesISTANDBY MAX: VBAT = 4.4 V 120 200 µAswitch leakage currents STARTUP, MODE TRANSITIONS, AND SHUTDOWN t1 Shutdown to standby 100 µs t2 Standby to active 100 µs t3 Active to standby 100 µs t4 Shutdown time Active or standby to shutdown 0.5 1 ms VCM DRIVER STAGE Resolution 10 bits IRES Relative accuracy –10 10 LSB Differential nonlinearity –1 1 Zero code error 0 mA Offset error At code 32 3 mA % ofGain error ±3 FSR Gain error drift 0.3 0.4 %/°C Offset error drift 0.3 0.5 %/°C IMAX Maximum output current 102.3 mA
4 Submit Documentation Feedback Copyright © 2011–2015, Texas Instruments Incorporated
Product Folder Links: DRV201
www.ti.com SLVSB25C – AUGUST 2011–REVISED JUNE 2015 Electrical Characteristics (continued) Over recommended free-air temperature range and over recommended input voltage range (typical at an ambient temperature range of 25°C) (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ILIMIT Average VCM current limit See (1) 110 160 240 mA Minimum VCM code for OPEN andIDETCODE See (2) 256 mASHORT detection fSW Switching frequency Selectable through CONTROL register 0.5 4 MHz VDRP Internal dropout See (3) 0.4 V LVCM VCM inductance 30 150 µH RVCM VCM resistance 11 22 Ω LENS MOVEMENT CONTROL tset1 Lens settling time ±10% error band 2/fVCM ms tset2 Lens settling time ±10% error band 1/fVCM ms VCM resonance frequency 50 150 Hz fVCM When 1/fVCM compensation is used –10% 10% VCM resonance frequency tolerance When 2/fVCM compensation is used –30% 30% LOGIC I/Os (SDA AND SCL) V = 1.8 V, SCL –4.25 4.25 IIN Input leakage current µA V = 1.8 V, SDA –1 1 RPullUp I2C pull-up resistors SDA and SCL pins 4.7 kΩ VIH Input high level See (4) 1.17 3.6 V VIL Input low level See (5) 0 0.63 V tTIMEOUT SCL timeout for shutdown detection 0.5 1 ms RPD Pull down resistor at SCL line 500 kΩ fSCL I2C clock frequency 400 kHz INTERNAL OSCILLATOR fOSC Internal oscillator 20°C ≤ TA ≤ 70°C –3% 3% Frequency accuracy -40°C ≤ TA ≤ 85°C –5% 5% THERMAL SHUTDOWN TTRIP Thermal shutdown trip point 140 °C (1) During short circuit condition driver current limit comparator will trip and short is detected and driver goes into STANDBY and short flag is set high in the status register. (2) When testing VCM open or short this is the recommended minimum VCM code (in dec) to be used. (3) This is the voltage that is needed for the feedback resistor and high side driver. It should be noted that the maximum VCM resistance is limited by this voltage and supply voltage. For example, 3-V supply maximum VCM resistance is: RVCM = (VBAT – VDRP)/IVCM = (3 V - (4) During shutdown to standby transition VIH low limit is 1.28 V. (5) During shutdown to standby transition VIL high limit is 0.51 V. Copyright © 2011–2015, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: DRV201
SLVSB25C –AUGUST 2011– REVISED JUNE 2015 www.ti.com
6.6 Data Transmission Timing
VBAT = 3.6 V ±5%, TA = 25ºC, CL = 100 pF (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT f(SCL) Serial clock frequency 100 400 kHz SCL = 100 KHz 4.7 tBUF Bus Free Time Between Stop and Start Condition µs SCL = 400 KHz 1.3 SCL = 100 KHz 50 tSP Tolerable spike width on bus ns SCL = 400 KHz SCL = 100 KHz 4.7 tLOW SCL low time µs SCL = 400 KHz 1.3 SCL = 100 KHz 4 µs tHIGH SCL high time SCL = 400 KHz 600 ns SCL = 100 KHz 250 tS(DAT) SDA → SCL setup time ns SCL = 400 KHz 100 SCL = 100 KHz 4.7 µs tS(STA) Start condition setup time SCL = 400 KHz 600 ns SCL = 100 KHz 4 µs tS(STO) Stop condition setup time SCL = 400 KHz 600 ns SCL = 100 KHz 0 3.45 tH(DAT) SDA → SCL hold time µs SCL = 400 KHz 0 0.9 SCL = 100 KHz 4 µs tH(STA) Start condition hold time SCL = 400 KHz 600 ns SCL = 100 KHz 1000 tr(SCL) Rise time of SCL Signal ns SCL = 400 KHz 300 SCL = 100 KHz 300 tf(SCL) Fall time of SCL Signal ns SCL = 400 KHz 300 SCL = 100 KHz 1000 tr(SDA) Rise time of SDA Signal ns SCL = 400 KHz 300 SCL = 100 KHz 300 tf(SDA) Rise time of SDA Signal ns SCL = 400 KHz 300
6 Submit Documentation Feedback Copyright © 2011–2015, Texas Instruments Incorporated
Product Folder Links: DRV201
1 Mhz 2 Mhz
4 Mhz 6 Mhz
6.7 Typical Characteristics
Figure 1. Linear Mode: Supply Current vs Output Current Figure 2. Linear Mode: Efficiency vs Output Current Figure 3. PWM Mode: Efficiency vs Output Current Figure 4. PWM Mode: Supply Current vs Output Current
7 Detailed Description
7.1 Overview
the I2C interface and an auto focus function can be implemented. driver enters STANDBY mode in less than 100 μs and default register values are set as shown in Figure 5. ACTIVE mode is entered whenever the VCM_CURRENT register is set to something else than zero. Figure 5. Power-up and Power-down Sequence register is changed. This enables a fast autofocus algorithm and pleasant user experience. through a CONTROL register. PWM or linear mode can be selected with the PWM/LIN bit in the MODE register.
8 Submit Documentation Feedback Copyright © 2011–2015, Texas Instruments Incorporated
www.ti.com SLVSB25C – AUGUST 2011–REVISED JUNE 2015
7.2 Functional Block Diagram
7.3 Feature Description
7.3.1 VCM Driver Output Stage Operation
Current in the VCM can be controlled with a linear or PWM mode output stage. Output stage is enabled in ACTIVE mode which can be controlled through VCM_CURRENT control register and the output stage mode is selected from MODE register bit PWM/LIN. In linear mode the output PMOS is configured to a high side current source and current can be controlled from a VCM_CURRENT registers. In PWM control the VCM is driven with a half bridge driver. With PWM control the VCM current is increased by connecting the VCM between VBAT and GND through the high side PMOS and then released to a freewheeling mode through the sense resistor and low side NMOS. Current in the VCM is sensed with a 1-Ω sense resistor which is connected into an error amplifier input where the other input is controlled by the 10-bit DAC output. PWM mode switching frequency can be selected from 0.5 MHz up to 4 MHz through a CONTROL register. PWM or linear mode can be selected with the PWM/LIN bit in the MODE register.
7.3.2 Ringing Compensation
VCM current can be controlled via an I2C interface and VCM_CURRENT registers. Lens stack is connected to a spring which causes a dampened ringing in the lens position when current is changed. This mechanical ringing is compensated internally by generating an optimized ramp whenever the current value in the VCM_CURRENT register is changed. This enables a fast auto focus algorithm and pleasant user experience. Ringing compensation is dependent on the VCM resonance frequency, and this can be controlled via VCM_FREQ register (07h) from 50 Hz up 150 Hz. Table 1 shows the VCM_FREQ register setting for each resonance frequency in 1-Hz steps. If more accurate resonance frequency is available, the control value can be calculated with Equation 1. Ringing compensation is designed in a way that it can tolerate ±30% frequency variation in the VCM resonance frequency when 2/fVCM compensation is used and ±10% variation with 1/fVCM so only statistical data from the VCM is needed in production. Copyright © 2011–2015, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: DRV201
Table 1. VCM Resonance Frequency Control Register (07h) Table
10 Submit Documentation Feedback Copyright © 2011–2015, Texas Instruments Incorporated
www.ti.com SLVSB25C – AUGUST 2011–REVISED JUNE 2015
7.4 Device Functional Modes
7.4.1 Modes of Operation
SHUTDOWN If the driver detects SCL has a DC level below 0.63 V for duration of at least 0.5 ms, the driver will enter SHUTDOWN mode. This is the lowest power mode of operation. The driver will remain in SHUTDOWN for as long as SCL pin remain low. STANDBY If SCL goes from low to high the driver enters STANDBY mode and sets the default register values. In this mode registers can be written to through the I2C interface. Device will be in STANDBY mode when VCM_CURRENT register is set to zero. From ACTIVE mode the device will enter STANDBY if the SW_RST bit of the CONTROL register is set. In this case all registers will be reset to default values. STANDBY mode is entered from ACTIVE mode if any of the following faults occur: Over temperature protection fault (OTPF), VCM short (VCMS), or VCM open (VCMO). When STANDBY mode is entered due to a fault condition current register is cleared. ACTIVE The device is in ACTIVE mode whenever the VCM_CURRENT control is set to something else than zero through the I2C interface. In ACTIVE mode VCM driver output stage is enabled all the time resulting in higher power consumption. The device remains in ACTIVE mode until the SW_RST bit in the CONTROL register is set, SCL is pulled low for duration of 0.5 ms, VCM_CURRENT control is set to zero, or any of the following faults occur: Over temperature protection fault (OTPF), VCM short (VCMS), or VCM open (VCMO). If ACTIVE mode is entered after fault the status register is automatically cleared. Copyright © 2011–2015, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: DRV201
0 ACK
1 ACK DATA
7.5 Programming
7.5.1 I2C Bus Operation
and is compliant to I2C standard 3. write operations are described below.
7.5.1.1 Single Write to a Defined Location
number by one and the master issues a stop condition. This action concludes the register write. Figure 6. Single Write
7.5.1.2 Single Read from a Defined Location and Current Location
value from the register across the bus. The master acknowledges receiving this byte and issues a stop condition. This action concludes the register read. Figure 7. Single Read from a Defined Location register number first, DRV201 writes out the data from the current register from the device memory.
12 Submit Documentation Feedback Copyright © 2011–2015, Texas Instruments Incorporated
1 ACK DATA ACK
Figure 8. Single Read from the Current Location
7.5.1.3 Sequential Read and Write
the register number and writes the data from the next register. Figure 9. Sequential Read from a Defined Location increments it’s register by one and the master can write to the next register. Figure 10. Sequential Write the data. This continues until the master issues a stop condition. This is shown in Figure 11. Figure 11. Sequential Read Starting from a Current Location
7.5.2 I2C Device Address, Start and Stop Condition
after 8th bit is latched. SDA is kept low until the next falling edge of the SCL line. acknowledge is issued after the reception of valid address, sub-address and data words. Reference Figure 13. Figure 12. I2C Start/Stop/Acknowledge Protocol Figure 13. I2C Data Transmission Protocol
14 Submit Documentation Feedback Copyright © 2011–2015, Texas Instruments Incorporated
7.6 Register Maps
7.6.1 Register Address Map
7.6.2 Control Register (Control) Address – 0x02h
Figure 14. Control Register (Control) Address – 0x02h Map Table 2. Bit Definitions bit is automatically cleared when written high. Enables ringing compensation.
7.6.3 VCM MSB Current Control Register (VCM_Current_MSB) Address – 0x03h
Figure 15. VCM MSB Current Control Register (VCM_Current_MSB) Address – 0x03h Map
Table 3. Bit Definitions current after LSB register write is completed.
7.6.4 VCM LSB Current Control Register (VCM_Current_LSB) Address – 0x04h
Figure 16. VCM LSB Current Control Register (VCM_Current_LSB) Address – 0x04h Map Table 4. Bit Definitions current after LSB register write is completed.
7.6.5 Status Register (Status) Address – 0x05h
Figure 17. Status Register (Status) Address – 0x05h Map(1) not allow the transition into Active until the device cools down and TSD is cleared.
16 Submit Documentation Feedback Copyright © 2011–2015, Texas Instruments Incorporated
Table 5. Bit Definitions
7.6.6 Mode Register (Mode) Address – 0x06h
Figure 18. Mode Register (Mode) Address – 0x06h Map Table 6. Bit Definitions
7.6.7 VCM Resonance Frequency Register (VCM_FREQ) Address – 0x07h
Figure 19. VCM Resonance Frequency Register (VCM_FREQ) Address – 0x07h Map
Table 7. Bit Definitions Default VCM mechanical ringing frequency is 76.4 Hz.
18 Submit Documentation Feedback Copyright © 2011–2015, Texas Instruments Incorporated
8 Application and Implementation
validate and test their design implementation to confirm system functionality.
8.1 Application Information
needed for the lens to auto focus. The following design is a common application of the DRV201 device.
8.1.1 VCM Mechanical Ringing Frequency
decimal which should be rounded to the nearest integer. Default VCM mechanical ringing frequency is 76.4 Hz.
8.2 Typical Application
Figure 20. Typical Application Schematic
8.2.1 Design Requirements
Table 8. Design Parameters
8.2.2 Detailed Design Procedure
8.2.2.1 User Example 1
- According to Table 1, VCM_FREQ[7:0] = ‘10111111’(reg 0x07h) VCM resonance frequency, fVCM, variation is within ±10% (minimum 90 Hz, maximum 110 Hz)
- 1/fVCM ringing compensation is used : RING_MODE = ‘1’(reg 0x06h) Stepping the lens by 50 µm
- The lens is settled into a ±5-µm window within 10 ms (1/fVCM)
8.2.2.2 User Example 2
- According to Table 1, VCM_FREQ[7:0] = ‘10111111’(reg 0x07h) VCM resonance frequency, fVCM, variation is within ±30% (minimum 70 Hz, maximum 130 Hz)
- 2/fVCM ringing compensation is used : RING_MODE = ‘0’(reg 0x06h) Stepping the lens by 50 µm
- The lens is settled into a ±5-µm window within 20 ms (2/fVCM)
20 Submit Documentation Feedback Copyright © 2011–2015, Texas Instruments Incorporated
Figure 21. Lens Settling Time and Settling Window
8.2.3 Application Curves
Figure 23. Lens Positions With and Without RingingFigure 22. Lens Positions With and Without Ringing
Figure 24. Lens Positions With and Without Ringing Figure 25. Lens Positions With and Without Ringing
9 Power Supply Recommendations
The DRV201 device is designed to operate from an input voltage supply, VBAT, range between 2.5 and 4.8 V.
10 Layout
10.1 Layout Guidelines
possible with a thick trace or ground plane connection to the device GND pin.
10.2 Layout Example
Figure 26. Recommended Layout Example
22 Submit Documentation Feedback Copyright © 2011–2015, Texas Instruments Incorporated
www.ti.com SLVSB25C – AUGUST 2011–REVISED JUNE 2015
11 Device and Documentation Support
11.1 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.
11.2 Trademarks
E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners.
11.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
11.4 Glossary
SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Copyright © 2011–2015, Texas Instruments Incorporated Submit Documentation Feedback 23 Product Folder Links: DRV201
www.ti.com 23-May-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) DRV201YFMR Active Production DSLGA (YFM) | 6 3000 | LARGE T&R Yes CUNIPD Level-1-260C-UNLIM -40 to 85 DRV201YFMR.B Active Production DSLGA (YFM) | 6 3000 | LARGE T&R Yes CUNIPD Level-1-260C-UNLIM -40 to 85 DRV201YFMT Active Production DSLGA (YFM) | 6 250 | SMALL T&R Yes CUNIPD Level-1-260C-UNLIM -40 to 85 DRV201YFMT.B Active Production DSLGA (YFM) | 6 250 | SMALL T&R Yes CUNIPD Level-1-260C-UNLIM -40 to 85 DRV201YMBR Active Production PICOSTAR (YMB) | 6 3000 | LARGE T&R Yes CUNIPD Level-1-260C-UNLIM -40 to 85 201 DRV201YMBR.B Active Production PICOSTAR (YMB) | 6 3000 | LARGE T&R Yes CUNIPD Level-1-260C-UNLIM -40 to 85 201 (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1
www.ti.com 23-May-2025 Addendum-Page 2
PACKAGE MATERIALS INFORMATION www.ti.com 25-Sep-2024 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION www.ti.com 25-Sep-2024 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DRV201YFMR DSLGA YFM 6 3000 182.0 182.0 20.0 DRV201YFMT DSLGA YFM 6 250 182.0 182.0 20.0 DRV201YMBR PICOSTAR YMB 6 3000 182.0 182.0 20.0 Pack Materials-Page 2
D: Max = E: Max = 1.48 mm, Min = 0.796 mm, Min = 1.42 mm 0.736 mm
D: Max = E: Max = 1.48 mm, Min = 0.796 mm, Min = 1.42 mm 0.736 mm
IMPORTANT NOTICE AND DISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, regulatory or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources. TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2025, Texas Instruments Incorporated