DM7474N

DM7474 FAIRCHILD | Alldatasheet

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© 2000 Fairchild Semiconductor Corporation DS006526 www.fairchildsemi.com September 1986 Revised February 2000 DM7474 Dual Positive-Edge-Triggered D-Type Flip-Flops with Preset, Clear and Complementary Outputs DM7474 Dual Positive-Edge-Triggered D-Type Flip-Flops with Preset, Clear and Complementary Outputs General Description This device contains two independent positive-edge-trig- gered D-type flip-flops with complementary outputs. The information on the D input is accepted by the flip-flops on the positive going edge of the clock pulse. The triggering occurs at a voltage level and is not directly related to the transition time of the rising edge of the clock. The data on the D input may be changed while the clock is LOW or HIGH without affecting the outputs as long as the data setup and hold times are not violated. A LOW logic level on the preset or clear inputs will set or reset the outputs regardless of the logic levels of the other inputs. Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Function Table H = HIGH Logic Level X = Either LOW or HIGH Logic Level L = LOW Logic Level ↑ = Positive-going transition of the clock. Q 0 = The output logic level of Q before the indicated input conditions were established. Note 1: This configuration is nonstable; that is, it will not persist when either the preset and/or clear inputs return to their inactive (HIGH) level. Order Number Package Number Package Description DM7474M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow DM7474N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Inputs Outputs PR CLR CLK D Q Q LHXXHL HLXXLH LLXX H (Note 1) H (Note 1) HH ↑ HHL HH ↑ LLH HHLX Q 0 Q 0

www.fairchildsemi.com 2 DM7474 Absolute Maximum Ratings(Note 2) Note 2: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Recommended Operating Conditions Note 3: The symbol (↑) indicates the rising edge of the clock pulse is used for reference. Note 4: TA = 25°C and VCC = 5V.

Electrical Characteristics

over recommended operating free air temperature range (unless otherwise noted) Note 5: All typicals are at VCC = 5V, TA = 25°C. Note 6: Not more than one output should be shorted at a time. Note 7: With all outputs open, ICC is measured with the Q and Q outputs HIGH in turn. At the time of measurement the clock is grounded. Note 8: Clear is tested with preset HIGH and preset is tested with clear HIGH. Supply Voltage 7V Input Voltage 5.5V Operating Free Air Temperature Range 0 °C to +70°C Storage Temperature Range −65°C to +150°C Symbol Parameter Min Nom Max Units V CC Supply Voltage 4.75 5 5.25 V VIH HIGH Level Input Voltage 2 V VIL LOW Level Input Voltage 0.8 V IOH HIGH Level Output Current −0.4 mA IOL LOW Level Output Current 16 mA fCLK Clock Frequency (Note 4) 0 15 MHz tW Pulse Width Clock HIGH 30 (Note 4) Clock LOW 37 nsClear LOW 30 Preset LOW 30 t SU Input Setup Time (Note 3)(Note 4) 20 ↑ ns tH Input Hold Time (Note 3)(Note 4) 5 ↑ ns TA Free Air Operating Temperature 0 70 °C Symbol Parameter Conditions Min Typ Max Units (Note 5) VI Input Clamp Voltage V CC = Min, II = −12 mA −1.5 V VOH HIGH Level V CC = Min, IOH = Max 2.4 3.4 V Output Voltage V IL = Max, VIH = Min VOL LOW Level V CC = Min, IOL = Max 0.2 0.4 V Output Voltage V IH = Min, VIL = Max II Input Current @ Max Input Voltage VCC = Max, VI = 5.5V 1 mA IIH HIGH Level V CC = Max D 40 Input Current V I = 2.4V Clock 80 µA Clear 120 Preset 40 IIL LOW Level V CC = Max D −1.6 Input Current V I = 0.4V Clock −3.2 mA (Note 8) Clear −3.2 Preset −1.6 IOS Short Circuit Output Current V CC = Max (Note 6) −18 −55 mA ICC Supply Current V CC = Max (Note 7) 17 30 mA

3 www.fairchildsemi.com DM7474 Switching Characteristics at VCC = 5V and TA = 25°C Symbol Parameter From (Input) R L = 400Ω , CL = 15 pF Units To (Output) Min Max fMAX Maximum Clock

15 MHz

tPHL Propagation Delay Time Preset to Q 40 ns HIGH-to-LOW Level Output tPLH Propagation Delay Time Preset to Q 25 ns LOW-to-HIGH Level Output tPHL Propagation Delay Time Clear to Q 40 ns HIGH-to-LOW Level Output tPLH Propagation Delay Time Clear to Q 25 ns LOW-to-HIGH Level Output tPHL Propagation Delay Time Clock to Q or Q 40 ns HIGH-to-LOW Level Output tPLH Propagation Delay Time Clock to Q or Q 25 ns LOW-to-HIGH Level Output

www.fairchildsemi.com 4 DM7474 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M14A

5 www.fairchildsemi.com DM7474 Dual Positive-Edge-Triggered D-Type Flip-Flops with Preset, Clear and Complementary Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N14A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com