DM74253 NSC | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 4

Technical content

3 National

‘8 | DM54253/DM74253 TRI-STATE® Dual 1 of 4 Line 5| Data Selectors/Multiplexers General Description This device is a TRISTATE version of the very popular ™ Typical Propagation delay 13.5 ns DM54153 (DM7214) data selectors/multiplexers. It con- @ Typical power dissipation 170 mW. tains full on-chip decoding to select the desired data in- @ strobe / enable override put. The 0M54/74253 is a dual, four-line multiplexer that has common select lines which therefore select the same . input line of both multiplexers. However, the two outputs Absolute Maximum Ratings (note 1) can be individually controlled by means of the separate enable lines; which, when taken to a high logic level, supply voltage wv places the output in the high-impedance TRI-STATE condi- Input Voltage 5.5V tion. The data at the output of the DMS54/74253 is true. me ‘ag 5 Storage Temperature Range - 65°C to 150°C Note 1: The “Absolute Maximum Ratings” are those valves beyond Features ‘which the safety of the device cannot be guaranteed. The device should , fal be operated at these limits, The parametnc values defined inthe i “Elactvical Characteristics" table are not guaranteed at the absolute = TRISTATE pin equivalents to popular §4/74 TTL devices maximum ratings, The "Recommended Operating Conditions” table will 0M72 14/8214 — 54153/74153 detine the conditions tor actual device operation. SS Connection Diagrams Dual-In-Line Package DATA INPUTS ENABLE SELECT ~~ gurpur Veo G2 a 2c3 0 2c2 2c1 2c v2 we fs fe fis fre tt foo — - yi <p TTT nS Sa ———EZT a0L — a a ee | CC a Ce ENABLE SELECT 162 162 1C1_ 160 OUTPUT. GND aoe DATA NUTS ures 54S253 (J) 748253 (N) 6-302

Recommended Operating Conditions Fy a 3 ‘Symbol ‘Units: = | Min [Nom [Max [Min [Nom [Max | g Veo Supply Voltage v Pes [os | ss | | 5 | 525 | 5 Vin High Level Input Vv 8 Voltage a Viv Low Level Input v Voltage low High Level Output mA Current Tow Low Level Output 16 mA Current Ta Free Air Operating *c Temperature Electrical Characteristics over recommended operating free air temperature (unless otherwise noted) M Input Clamp Voltage Voc= Min, h= - 12 mA [| wes | v Von High Level Output Voo= Min, loy= Max Vv Voltage Vit = Max, , Vin= Min Vou ‘Low Level Output Veo= Min, fo, = Max Vv Voltage Vin= Min, , Vii = Max in Input Current@ Max Voc = Max, V; = 5.5V mA Input Voltage tw High Level input Voo= Max, Vi=2.4V aA Current . Te Low Level Input Voo= Max, Vi=0.4V mA Current loz Off-State Output Veo = Max, Vo=2.4V eA Current with High Vin = Min, Vii = Max Level Output Voltage Applied loz. Off-State Output Vec= Max, Vo =0.4V uA Current with Low Vin= Min, Vip= Max Level Output Voltage Applied fos | Short Cireuit Voo= Max [omes | = Output Current (note 2) Ce | ‘oc | Supply Current Voc = Max [oss [ese ma wed [owe | Note: All ypicals are at Vog= BV. Ta= 25°C. Note 2 Not more than one output should be shorted at atime, Note &: loc is measured wih alinpute grounded and outputs open, 6-303

Ra Switching Characteristics at voc=5v and T,= 25°C (See Section 1 for Test Waveforms and Output Load) f=) (Input) Ria toon g (Outpuy | Min | tye | Mex [Min [tye [Mex | 2 teun Propagation Delay Data ns S| Time Low to High to Level Output Output teu. Propagation Delay Data ns Time High to Low to Level Output Output teLy Propagation Delay Select ns Time Low to High to Level Output Output ter Propagation Delay Select Ey ns . Time High to Low to Level Output Output tpzn Output Enable Enable ns Time to High to Level Output Q Tez. Output Enable Enable 4 ns Time to Low to Level Output Q Tnz Output Disable ns Time from High Level Output tpiz Output Disable Enabie ns Time from Low to Level Output Q 6304

[=] Function Table Fa J [Select npute [Data inputs | Enable | Output | I | 8 [a [eoferfeztes| @ Ty | ES x x x 4 Hiz 8 L x x L L g L x x Ll H L L x} oe L L H x L H H x x Ll t H x x L H H x Ll Ll L H x H L H L= Low Logic Level H=High Logie Level X= Either Low or High Logic Level HiZ.=High impedance (1H State Logic Diagram ‘54174253 ENABLE (1) srmoee G1 “> sco FD © | rer = bara FP eS 2 eurmer @ sc — 2. a HE 1032 <== — seuect ead om es HA an Hinze) 2C1- DATA 2 (9) oureut [aes lacs. —— . ENABLE (15) . srwoeres 4 > urea 6-305