DG221B

DG221B VISHAY | Alldatasheet

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1 IN2

V– V+ GND WR S4 S3 D 4 D 3 IN4 IN3 Dual-In-Line and SOIC Input Latch DG221B Vishay SiliconixNew Product Document Number: 71616 S-03627—Rev. A, 23-Apr-01 www.vishay.com Quad SPST CMOS Analog Switch with Latches /C0070/C0069/C0065/C0084/C0085/C0082/C0069/C0083 /C0066/C0069/C0078/C0069/C0070/C0073/C0084/C0083 /C0065/C0080/C0080/C0076/C0073/C0067/C0065/C0084/C0073/C0079/C0078/C0083 /C0068Accepts 150-ns Write Pulse Width /C00685-V On-Chip Regulator /C0068Latches Are Transparent with WR Low /C0068Low On-Resistance: 60 /C0087 /C0068Compatible with Most /C0109P Buses /C0068Allows Wide Power Supply Tolerance Without Affecting TTL Compatibility /C0068Reduced Power Consumption /C0068Allows Flexibility of Design /C0068/C0109P Based Systems /C0068Automatic Test Equipment /C0068Communication Systems /C0068Data Acquisition Systems /C0068Medical Instrumentation /C0068Factory Automation /C0068/C0069/C0083/C0067/C0082/C0073/C0080/C0084/C0073/C0079/C0078 The DG221B is a monolithic quad single-pole, single-throw analog switch designed for precision switching applications in communication, instrumentation and process control systems. Featuring independent onboard latches and a common WR pin, each DG221B can be memory mapped, and addressed as a single data byte for simultaneous switching. The DG221B combines low power and low on-resistance (60 /C0087 typical) while handling continuous currents up to 20 mA. An epitaxial layer prevents latchup. The device features true bidirectional performance in the on condition. /C0070/C0085/C0078/C0067/C0084/C0073/C0079/C0078/C0065/C0076/C0032/C0066/C0076/C0079/C0067/C0075/C0032/C0068/C0073/C0065/C0071/C0082/C0065/C0077/C0032/C0065/C0078/C0068/C0032/C0080/C0073/C0078/C0032/C0067/C0079/C0078/C0070/C0073/C0071/C0085/C0082/C0065/C0084/C0073/C0079/C0078 Four Latchable SPST Switches per Package /C0084/C0082/C0085/C0084/C0072/C0032/C0084/C0065/C0066/C0076/C0069 INX WR Switch 0 0 ON 1 0 OFF X Control data latched-in, switches on or off as selected by last INX X 1 Maintains previous state Logic “0” /C0118 0.8 V Logic “1” /C0119 2.4 V /C0079/C0082/C0068/C0069/C0082/C0073/C0078/C0071/C0032/C0073/C0078/C0070/C0079/C0082/C0077/C0065/C0084/C0073/C0079/C0078 Temp Range Package Part Number /C0095 /C0095 16-Pin Plastic DIP DG221BDJ –40/C0095C to 85/C0095C 16-Pin Narrow SOIC DG221BDY

Vishay Siliconix New Product www.vishay.com Document Number: 71616 S-03627— Rev. A, 23-Apr-01 /C0065/C0066/C0083/C0079/C0076/C0085/C0084/C0069/C0032/C0077/C0065/C0088/C0073/C0077/C0085/C0077/C0032/C0082/C0065/C0084/C0073/C0078/C0071/C0083 Voltages Referenced to V– or 20 mA, whichever occurs first Power Dissipation (Package) b Notes: a. Signals on SX, DX, or INX exceeding V+ or V– will be clamped by internal diodes. Limit forward diode current to maximum current ratings. b. All leads welded or soldered to PC Board. c. Derate 6.5 mW//C0095C above 25/C0095C d. Derate 7.7 mW//C0095C above 75/C0095C /C0083/C0067/C0072/C0069/C0077/C0065/C0084/C0073/C0067/C0032/C0068/C0073/C0065/C0071/C0082/C0065/C0077/C0032/C0040/C0084/C0089/C0080/C0073/C0067/C0065/C0076/C0032/C0067/C0072/C0065/C0078/C0078/C0069/C0076/C0041 FIGURE 1. S D Latch 5 V Reg GND INX WR Level Shift/ Drive

Vishay SiliconixNew Product Document Number: 71616 S-03627— Rev. A, 23-Apr-01 www.vishay.com /C0083/C0080/C0069/C0067/C0073/C0070/C0073/C0067/C0065/C0084/C0073/C0079/C0078/C0083/C0097 Test Conditions Unless Otherwise Specified Limits –40 to 85/C0095C Parameter Symbol VIN = 2.4 V, 0.8f V, WR = 0 Temp b Mind Typc Max d Unit Analog Switch Analog Signal Rangee VANALOG Full –15 15 V Drain-Source On-Resistance rDS(on) IS = –10 mA, VD = /C003410 V Room Full 60 90 135 /C0087 Source Off Leakage Current IS(off) /C0034/C0035 Room Full –100 /C00340.01 5 100 Drain Off Leakage Current ID(off) VS = /C003414 V, VD = /C003514 V Room Full –100 /C00340.02 5 100 nA Drain On Leakage Current ID(on) VS = VD = /C003414 V Room Full –200 /C00340.01 5 200 Digital Control Input Current IINL , IINH VIN = 0 V or = 2.4 V Room Full –10 –0.0004 1 10 /C0109A Dynamic Characteristics Turn-On Time tON Room 550 Turn-Off Time tOFF See Figure 2 Room 340 Turn-On Time Write tON , WR Room 550 Turn-Off Time Write tOFF , WR See Figure 3 Room 340 ns Write Pulse Width tW Room 150 120 Input Setup Time tS See Figure 4 Room 180 130 Input Hold Time tH Room 20 18 Charge Injection Q C L = 1000 pF VGEN = 0 V, RGEN = 0 /C0087 Room 20 pC Source-Off Capacitance C S(off) Room 8 Drain-Off Capacitance C D(off) f = 1 MHz, VS, VD = 0 V Room 9 pF Channel-On Capacitance C D(on) Room 29 Off Isolation OIRR VS = 1 Vp-p, f = 100 kHz Room 70 Interchannel Crosstalk XTALK VS = 1 Vp-p, f = 100 kHz C L = 15 pF, RL = 1 k/C0087 Room 90 dB Power Supplies Positive Supply Current I+ All Channels On or Off Full 0.8 1.5 Negative Supply Current I– All Channels On or Off VIN = 0 V or 2.4 V Room –1 –0.4 mA Notes: a. Refer to PROCESS OPTION FLOWCHART. b. Room = 25 /C0095C, Full = as determined by the operating temperature suffix. c. Typical values are for DESIGN AID ONLY , not guaranteed nor subject to production testing. d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. e. Guaranteed by design, not subject to production test. f. V IN = input voltage to perform proper function.

Vishay Siliconix New Product www.vishay.com Document Number: 71616 S-03627— Rev. A, 23-Apr-01 /C0065/C0080/C0080/C0076/C0073/C0067/C0065/C0084/C0073/C0079/C0078/C0083 FIGURE 8./C0109P-Controlled Analog Signal Attenuator +15 V GND DG221B –15 V D 4 D 3 D 2 D 1 IN1 D C Q IN2 D C Q IN3 D C Q IN4 D C Q VIN 900 k/C0087

9 M/C0087

The TL081 is used as an output buffer while the voltage divider provides attenuation. /C0084/C0082/C0085/C0084/C0072/C0032/C0084/C0065/C0066/C0076/C0069 IN1 IN2 IN3 IN4 WR A ON SWITCH 0 0 0 0 0 All 1 1 1 1 0 None 0 1 1 1 0 1 1 0 1 1 0 2 1 1 0 1 0 3 1 1 1 0 0 4 /C0079/C0085/C0084/C0080/C0085/C0084/C0032/C0065/C0084/C0084/C0069/C0078/C0085/C0065/C0084/C0073/C0079/C0078/C0032/C0070/C0079/C0082/C0032/C0070/C0073/C0071/C0085/C0082/C0069/C0032/C0056 WR IN1 IN2 IN3 IN4 Gain 0 0 1 1 1 0.1 0 1 0 1 1 0.01 0 1 1 0 1 0.001 0 1 1 1 0 0.0001 Notes: a. WR may be held at “0” for temporary operation similar to DG201A/DG201B. With WR at “0” SW 1 will remain on as long as IN1 is held at “0”.