DG202_06 MAXIM | Alldatasheet

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Technical content

Features

♦ Guaranteed ±4.5V to ±18V Operation ♦ No VL Supply Required ♦ Nonlatching with Supplies Turned Off and Input Signals Present ♦ CMOS and TTL Logic Compatible ♦ Monolithic, Low-Power CMOS Design DG202/DG212 Quad SPST CMOS Analog Switches SWITCHES SHOWN FOR LOGIC “0” INPUT DIP/SO LOGIC SWITCH OFF ON IN2 V+V- IN1 DG202 DG212 VL IN3IN4 GND Pin Configurations

Ordering Information

19-3960; Rev 3; 6/06 For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. PART TEMP RANGE PIN-PACKAGE DG202CUE 0 °C to +70°C 16 TSSOP DG202CSE 0 °C to +70°C 16 SO DG202CJ 0 °C to +70°C 16 Plastic DIP DG202C/D 0 °C to +70°C Dice DG202AEGE -40°C to +85°C 16 QFN (5mm x 5mm) DG202AEUE -40°C to +85°C 16 TSSOP DG202ADY -40 °C to +85°C 16 SO DG202ADJ -40 °C to +85°C 16 Plastic DIP DG202AK -55 °C to +125°C 16 CERDIP DG212CUE 0°C to +70°C 16 TSSOP DG212CSE 0 °C to +70°C 16 SO DG212CJ 0 °C to +70°C 16 Plastic DIP DG212C/D 0 °C to +70°C Dice DG212EGE -40°C to +85°C 16 QFN (5mm x 5mm) DG212EUE -40°C to +85°C 16 TSSOP DG212DY -40 °C to +85°C 16 SO DG212DJ -40 °C to +85°C 16 Plastic DIP DG212ETE -40°C to +85°C 16 Thin QFN +15V DG202 DG212 -15V VIN x 10V * * * * 5kΩ 10kΩ 40kΩ 20kΩ 5kΩ VOUT PROGRAMMABLE GAIN AMPLIFIER NOTE: *PINS 1, 8, 9, AND 16 ARE LOGIC CONTROL INPUTS Typical Operating Circuit Pin Configurations continued at end of data sheet.

Quad SPST CMOS Analog Switches ABSOLUTE MAXIMUM RATINGS (DG212) ELECTRICAL CHARACTERISTICS (DG212) (V+ = +15V, V- = -15V, GND = 0, TA = +25°C, unless otherwise noted.) (For more information on TYP values see Note 2.) Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Peak Current, S or D Storage Temperature Range……………..……..-65°C to +125°C Operating Temperature Range Power Dissipation (T A = +70°C) (Note 1) 16-Pin Plastic Dip (derate 10.5mW/°C above +70°C) ..842mW 16-Pin QFN (5mm x 5mm) 16-Pin Thin QFN PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SWITCH Analog Signal Range VANALOG -15 +15 V Drain-Source ON-Resistance RDS (ON) VD = ±10V, VIN = 2.4V, IS = 1mA 115 175 Ω VS = 14V, VD = -14V 0.01 5.0Drain OFF-Leakage Current ID (OFF) VIN = 0.8V VS = VD = 14V, VIN = 2.4V 0.1 5.0Drain ON-Leakage Current (Note 3) ID (ON) VS = VD = -14V, VIN = 2.4V -5.0 -0.15 nA INPUT VIN = 2.4V -1.0 -0.0004Input Current with Input Voltage High IINH VIN = 15V 0.003 1.0 Input Current with Input Voltage Low IINL VIN = 0 -1.0 -0.0004 µA DYNAMIC Turn-ON Time t ON 460 1000 tOFF1 360 500Turn-OFF Time tOFF2 See Switching Time Test Circuit VS = 2V, RL = 1kΩ, CL = 35pF 450 ns Source OFF-Capacitance CS (OFF) VS = 0, VIN = 0, f = 1MHz 5 Drain OFF-Capacitance CD (OFF) VD = 0, VIN = 0, f = 1MHz 5 Channel ON-Capacitance CD + S (ON) VD = VS = 0, VIN = 5V, f = 1MHz 16 pF OFF-Isolation (Note 4) OIRR 70 Crosstalk (Channel to Channel) CCRR VIN = 0, RL = 1kΩ, CL = 15pF, VS = 1VRMS, f = 100kHz 90 dB Note 1: Device mounted with all leads soldered to PC board.

Quad SPST CMOS Analog Switches ABSOLUTE MAXIMUM RATINGS (DG202) Voltages Reference to V- Digital Inputs (Note 1), V or 20mA, whichever occurs first Peak Current, S or D (pulsed at 1ms 10% duty cycle max)…………………….70mA Operating Temperature Range Storage Temperature Range………………..…..-65°C to +150°C Power Dissipation (Note 2) 16-Pin Plastic Dip (derate 10.5mW/°C above +70°C) ...842mW 16-Pin QFN (5 ✕ 5) DG202A DG202C, D, E PARAMETER SYMBOL CONDITIONS MIN TYP MAX MIN TYP MAX UNITS SWITCH Analog Signal Range VANALOG -15 15 -15 15 V Drain-Source ON Resistance RDS (ON) VD = ±10V, VIN = 2.4V, IS = 1mA 115 175 115 200 Ω VS = -14V 0.1 1.0 0.1 1.0Drain ON-Leakage Current (Note 4) ID (ON) VIN = 2.4V VS = 14V -1.0 -5.0 nA ELECTRICAL CHARACTERISTICS (DG202) (V+ = +15V, V- = -15V, GND = 0, TA = +25°C, unless otherwise noted.) (For more information on TYP values see Note 3.) ELECTRICAL CHARACTERISTICS (DG212) (continued) (V+ = +15V, V- = -15V, GND = 0, TA = +25°C, unless otherwise noted.) (For more information on TYP values see Note 2.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SUPPLY Positive Supply Current I+ 0.02 0.4 Negative Supply Current I- 0.01 0.4 Logic Supply Current I L VIN = 0 and 2.4V (all) mA Power-Supply Range for Continous Operation VOP ±4.5 ±18.0 V Note 1: Signals on S_, D_, or IN_ exceeding V+ or V- on Maxim’s DG202 will be clamped by internal diodes, and are also internally cur- rent limited to 25mA. Note 2: Device mounted with all leads soldered to PC board. Note 2: Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Note 3: ID(ON) is leakage from driver into “ON” switch. Note 4: OFF-Isolation = 20 log VS/VD, VS = input to OFF switch, VD = output. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Quad SPST CMOS Analog Switches Note 3: Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Note 4: ID (ON) is leakage from driver into “ON” switch. DG202A DG202C, D, EPARAMETER SYMBOL CONDITIONS MIN TYP MAX MIN TYP MAX UNITS INPUT Voltage High IINH VIN = 15V 0.003 1.0 0.003 1.0 Input Current with Input Voltage Low IINL VIN = 0 -1.0 -0.000 4 -1.0 -0.0004 µA DYNAMIC Turn-ON Time t ON 480 600 480 600 Turn-OFF Time t OFF1 See Figure 1 Switching Time Test Circuit 370 450 370 450 ns Charge Injection Q CL = 1000pF, VGEN = 0, RGEN = 0 20 20 pC Source OFF-Capacitance CS (OFF) 55 Drain OFF-Capacitance CD (OFF) VS = 0, VIN = 0 55 Channel ON-Capacitance CD (ON) + CS (ON) VD = VS = 0, VIN = 5V f = 140kHz 16 16 pF OFF-Isolation V IN = 0, ZL = 75Ω 70 70 Crosstalk (Channel to Channel) VS = 2.0V, f = 100kHz 90 90 dB SUPPLY Positive Supply Current I+ All channels ON or OFF 0.02 0.1 0.02 0.1 Negative Supply Current I- All channels ON or OFF -0.1 -0.01 -0.1 -0.01 mA Power-Supply Range for Continuous Operation VOP ±4.5 ±18 ±4.5 ±18.0 V ELECTRICAL CHARACTERISTICS (DG202) (continued) (V+ = +15V, V- = -15V, GND = 0, TA = +25°C, unless otherwise noted.) (For more information on TYP values see Note 3.)

Quad SPST CMOS Analog Switches ELECTRICAL CHARACTERISTICS (DG202) (V+ = +15V, V- = -15V, GND = 0, TA = full opearting temperature range, unless otherwise noted.) (For more information on TYP values see Note 3.) DG202A DG202C, D, E PARAMETER SYMBOL CONDITIONS MIN TYP MAX MIN TYP MAX UNITS SWITCH Analog Signal Range VANALOG -15 +15 -15 +15 V Drain-Source ON Resistance (Note 5) RDS (ON) VD = ±10V, VIN = 2.4V, IS = 1mA 250 250 Ω VS = 14V, VD = -14V 100 100Source OFF-Leakage Current IS (OFF) VIN = 0.8V VS = -14V, VD = 14V -100 -100 VS = 14V, VD = -14V 100 100Drain OFF-Leakage Current ID (OFF) VIN = 0.8V VS = -14V, VD = 14V -100 -100 VS = -14V 200 200Drain ON-Leakage Current (Note 6) ID (ON) VIN = 2.4V VD = 14V -200 -200 nA INPUT VIN = 2.4V -1.0 -1.0Input Current with Input Voltage High IINH VIN = 15V 1.0 1.0 Input Current with Input Voltage Low IINL VIN = 0 -1.0 -1.0 µA Note 5: Electrical characteristics, such as On-Resistance, will change when power supplies other than ±15V, are used. Note 6: ID (ON) is leakage from driver into “ON” switch. PIN DIP/SO/TSSOP QFN/TQFN NAME FUNCTION 1, 16, 9, 8 15, 14, 7, 6 IN1–IN4 Input 2, 15, 10, 7 16, 13, 8, 5 D1–D4 Analog Switch Drain Terminal 3, 14, 11, 6 1, 12, 9, 4 S1–S4 Analog Switch Source Terminal

42 V- Negative-Supply Voltage Input

53 GND Ground

12 10 N.C. No Connection 13 11 V+ Positive-Supply Voltage Input—Connected to Substrate —E PE P Exposed Pad. Connect exposed pad to V+ or leave EP unconnected. Pin Description Switching Time Test Circuit Switch output waveform shown for V S = constant with logic input waveform as shown. Note that V S may be +ve or -ve as per switching times test circuit. V O is the steady state output with switch on. Feedthrough via gate capacitance may result in spikes at leading and trailing edge of output waveform. Protecting Against Fault Conditions Fault conditions occur when power supplies are turned off when input signals are still present, or when over- voltages occur at the inputs during normal operation. In either case, source-to-body diodes can be forward biased and conduct current from the signal source. If

Quad SPST CMOS Analog Switches SOICN .EPS PACKAGE OUTLINE, .150" SOIC 21-0041 B REV.DOCUMENT CONTROL NO.APPROVAL PROPRIETARY INFORMATION TITLE: TOP VIEW FRONT VIEW MAX 0.010 0.069 0.019 0.157 0.010 INCHES 0.150 0.007 E C DIM 0.014 0.004 B MIN 0.053A 0.19 3.80 4.00 0.25 MILLIMETERS 0.10 0.35 1.35 MIN 0.49 0.25 MAX 1.75 0.0500.016L 0.40 1.27 0.3940.386D D MINDIM D INCHES MAX 9.80 10.00 MILLIMETERS MIN MAX 16 AC 0.337 0.344 AB 8.758.55 14 0.189 0.197 AA 5.004.80 8 N MS012 N SIDE VIEW H 0.2440.228 5.80 6.20 e 0.050 BSC 1.27 BSC C HE e B A1 A D 0∞-8∞ L VARIATIONS:

Package Information

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)

Quad SPST CMOS Analog Switches PDIPN.EPS Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)

Quad SPST CMOS Analog Switches CDIPS.EPS Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)

Quad SPST CMOS Analog Switches TSSOP4.40mm.EPS PACKAGE OUTLINE, TSSOP 4.40mm BODY 21-0066 1 G Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)

Quad SPST CMOS Analog Switches 32L QFN.EPS Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)

Quad SPST CMOS Analog Switches Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circu it patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2006 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.

Revision History

Pages changed at Rev3: 1–6, 11 QFN THIN.EPS Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)