DAS1153

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ANALOG DEVICES fAX-ON-DEMAND HOTLINE - Page 2 rillANALOG W DEVICES I

FEATURES

Complete with High Accuracy Sample/Hold and AiD Converter DifferentialNonlinearity:::0.002% FSR max IDAS1153) Nonlinearity:DAS1152: ::0.005% FSR max DAS1153: ::0.003% FSR max Low DifferentialNonlinearityT.C.:::2ppmrc max High Throughput Rate:25kHz mln (DAS1152) High Feedthrough Rejection:-96dB Byte-SelectableTri-StateBufferedOutputs InternalGain BeOffsetPotentiometers Improved Second Source to AID/AIM 824 and AID/AIM 825 Modules

APPLICATIONS

ProcessControlData Acquisition Automated Test Equipment Seismic Data Acquisition NuclearInstrumentation Medical Instrumentation Robotics GENERAL DESCRIPTION The DAS1152/DAS1153 are 14-/15-bitsamplinganalog-to-digital convertershavinga maximum throughputrateof 25kHz/20kHz. They providehigh accuracy,high stability,and functional completenessallina 2" x 4" x 0.44"metal case. Guaranteedhighaccuracysystemperformancesuch asnonlinearity of ::0.005% FSR (DAS1l52)/:tO.003% FSR (DAS1l53) and differentia!nonlinearityof :to.003% FSR (DAS1l52)/:tO.OO2% FSR (DAS1l53) areprovided.Guaranteed stabilitysuch as differentialnonlinearityT.C. of :t2ppml"C (DAS 1153)maximum, maximwn and power supply sensitivityof :to.ool% FSR/% Vs arealsoprovidedby the DAS1l52/DASllS3. REV. A Informationfurnishedby Analog Devices isbelievedto be accurateand reliable.However, no responsibilityisassumed by Analog Devicesforits use,nor forany infringementsof patentsor other rightsof thirdparties which may resultfromitsuse.No licenseisgrantedby implicationor otherwise under any patentor patentrightsof Analog Devices. 14-Bit& 15-BitSampling Analog-to-DigitalConverters DAS1152/DAS1153I FUNCTIONAL BLOCK DIAGRAM REf OUT ~I f,."SUO ANAlOO :INPUT TRI.STAtE SUffERS MS. ..aa liT 2 BIT, 81f. Ilf . elf . 81f 1 La E""SlE SIH OUTPUT '5IM INPUT fRl. STATf ",,"ER' BIT . alT' BIT ,. BIT 11 Bl1 11 BIT n alT ,. '"58 FOR DAS,,521 BIT ,. (LSS FOR OAS"O31 +W+15V IAN"'-DO ..DIGITAL QNOS DIGITAL GND -ISV ,.". ut ,s THE ANALOG $!GHAl IHPUT IF TH. The DASl1S2/DASlIS3 make extensiveuse of both integrated circuitand thinfilmcomponents to obtaintheirexcellent performance,smallsize,and low cost.The devicescontaina precisionsample/holdamplifier,high accuracy14-/15-bitanalog- to-digitalconverter,tri-stateoutput buffers,internalgainand offsettrim potentiometers,and power supply bypasscapacitors (asshown in Figure 1). Four analoginputvoltagerangesareselectableviauser pin programming: 0 to + 5V, 0 to + lOV, :t5V, and :tlOV. Uni- polarcodingisprovidedin truebinaryformat with bipolar codingdisplayedin offsetbinaryand two'scomplement. Tn-statebuffersprovideeasy interfaceto bus structured applications. Tel;617/329.4700 Fax; 6171326.8703 Twx; 710/394-6577 Telex: 924491 Cable: ANALOG NORWOODMASS -- - --- -- OBSOLETE

ANALOG DEVICES fAX-ON-DEMAND HOTLINE - Page 3 DAS1152/D~S1153-SPECIFICATIONS(typical@ +25OC unlessotherwisespecified.) DASl152 DAS1l53 OUTLINE DIMENSIONS 14Bits l5Bi", Dimensionsshown ininchesand (mm). MODEL RESOLUTION DYNAMIC PERFORMANCE Througbput !tate ConversionTime 5tH AcquisitionTime SIR ApeffU",Delay StH Apenure Uncertainty FeedtbroughRejeclionI Droop Rate DielectricAbsorptionError ACCURACY IntegralNonlinearity2 DifferentialNonJinearity No MissingCodes :t30'Noise(S/HplusAID) :t30'Noise(AID) STABILITY DifferentialNonlinearityT.C. GainT.C. aroT.C. Power SupplySensitivity ANALOG INPUT VoltageRange Bipolar Unipolar ADCInputlmpedanceOto +5V Oto+IOV,:dV :tIOV SIR InputImpedance DIGITAL INPUTS ConvertCommand' StH Control Low Enable,High Enable DIGITAL OUTPUTS ParalldData Outputs Unipollr Bipolar Output Drive StatUs OutpUt Drive INTERNAL REFERENCE VOLTAGE ExternalLoad Current(RatedPerformance) TemperatureStability POWER REQUIREMENTS RatedVoltages OpentingVoltages' SupplyCurrentDrain:!:15V +SV TEMPERATURE RANGE Specified Operaling Storage RelativeHumidity Shielding SIZE 25kHzmin 35j.1.Smax 4fLSMaX SOns Ins -%dB !;0.005% oflnput Voltage Change ;I:0.005% FSR'max :!:0.003%FSR'max Guaranteed 75..Vrms 50..V rms :!:2ppmrcmax :!;8ppml"C max :!:30fLvrCtyp,.!:gO...vr'Cmax :to.ool%FSR'Io/.V, :t5V,:!:IOV Oto+5V,Oto+IOV 2.51d1 5kO 10.OkO looMniSpF ITTL Load, PositivePulse Negative Edge Triggered HOLD ~ LogicO SAMPLE -Logic I ENABLE -LogkO Binary OffsetBinary,2'.CompJemem 2TTLLoad. Logie"I" DuringConversion 2TTLLoads +IOV,:1:0.3% 2mA max :!:Sppmrcli1U :t12Vto+I7V,+4.75Vto+S.25V .:t37mASOmA 010 + 7O"C -25"Cto + 8S'C -25"Clo +85"C . McctsMIL.STD-202E, Method 103B . Electrostatic(RFI)6Sides, . Electromagnctic(EMI) 5Sides 2"X 4" x 0.44'MctalPackage 20kHzmin 44j.1.Smax S max. :to.003% FSRJrnax :!:0.002% FSRJmax NOTES 'Spc<ifi<8<iom-- osDhSI152 'fSR FuD Seal<Rana<. 'Ifonly,beAOC """'" isWItd.II><OJICtOWc""""' IIUPJ'i>'vo!Iqean be inod"''"I2V,. '"tTV.Bul;fw SIt{sect " 'R tIIdcdPower Sol'l'iy:huloi nevUs Model 923. NONCONOUCTI\\IE lABEl 1--,'-'.I':J.O~ t~U. ,,;;-~c '_02 110>.11 eASO IS NOT HOIlMET1CAU.V SO , ASSEMBLY INSTRUCTIONS CAUTION: This module isnot an embedded assemblyand is not hermeticallysealed.Do not subjecttoa solventorwater-wash processthatwould allowdirectcontactwith freeliquidsorvapors. Entrapment of contaminantsmay occur,causingperformance degradationand permanent damage. Installafterany clean/wash processand then only spotcleanby hand. ~-- REV. A-2- "N I:J L P:tosv T -., GA'" -'IV om ,OJ ,OJ _"NO ..s. Am INI ANA""-."REfOOT51"OOT 1.0> B' !:::m OBSOLETE

ANALOG DEVICES fAX-ON-DEMAND HOTLINE - Page ~ ApplyingtheDAS1152/DAS1153 OPERATION The DASlI52/DAS 1153arefunctionallycompletedataacquisition subsystemsbeingfullycharacterizedassuch.Allthe necessary dataacquisitionand microprocessorinterfaceelementsare providedinternaltothesedevices.Accuracy and performance criteriaaretestedand specifiedfortheentiresystem.Thus, designtime and associatedhigh accuracyproblems areminimized becauselayoutand component optimi7A1tionhave alreadybecn performed. For operation,the only connectionsnecessarytothe DASl1521 DAS1l53 arethe :t:15V and + 5V power supplies,analoginpUt signal,triggerpulse,and the HI.ENABLE/LO-ENABLE tri- statecontrols.Analog inpUtand digitaloutput programming are userselectableviaexternaljumper connections. ANALOG INPUT SECTION The analoginpUtcan be appliedto justthe AID converteror to the internalsample/holdamplifierahead of the AID converter. When usingjustthe AID converter,apply the analoginputper thevoltagerangepin programming shown inTable 1.When using thesampleJholdamplifierinconjunctionwith AID con- verter,apply tbe analoginputto the SIR INPUT terminaland connect the S/H OUTPUT terminalto tbe appropriateAID converteranaloginput. TableI.Analog InputPin Programming 'NOConncctiOD Errorsdue tosourceloadingarceliminatedsincethesample/hold amplifierisa high-impedanceunity-gainamplifier.High feedthrough rejectionisprovidedforeithersingle-channelor multichannelapplications.Feedthrough rejectioncan be optimized,in multichannelapplications,by changingchannels atthe risingor fallingedge of the S/H controlpulse. REF OUT GAIN I CONNECT I FOR I BIPOlAR IOPERATIONII L- , ANA IN 1 ANA IN Z ANA1.OG INPUT RANGE SELECTIONANA IN 3 SIH OUTPUT SIH INPUT 51H CONTROL Figure2. Analog InputBlockDiagram REV. A TIMING DIAGRAM The timingdiagram forthe DASllS2/DAS1l53 isillustratedin Figure 3.This figurealsoincludesthe samplc/holdamplifier acquisitiontime. Ifthe sample/holdamplifierisrequired,theTRIGGER input and S/H CONTROL terminalcan be tiedtogetherproviding only one conversioncontrolsignal.When thetriggerpulsegoes high,itplacesthe sample/holdamplifierin thesample mode allowingittoacquirethe presentinputsignal.The triggerpulse must remain high fora minimum of 4fLS(DASl152)/5fLS (DAS 1153)toinsureaccuracyisattained.Ifthe sample/hold amplifierisnot used, the triggerpulseneeds to be onJy lOOns (min)inlengthtosatisfythe AID convertertriggerrequirements. At the fallingedge of the triggerpulse,the sample/hold amplifierisplacedin the hold mode, theAID conversion begins,and allinternallogicisreset.Once theconversion processisinitiated,itcannot bc retriggereduntilaftertheend of conversion. With thisnegativeedge of the triggerpulsethe MSB issetlow with the remainingdigitaloUtputssetto logichigh state,and the statuslineissethigh and remains high through the full conversioncycle.During conversioneach bit,startingwith the MSB, issequentiallyswitchedlow atthe risingedge of the internalclock.The DAC output isthen compared tothe analog input and the bitdecisionismade. Each comparisonlastsone clockcyclewith thecomplete l4-/15-bitconversiontaking35fLSI 44fLSmaximum forthe DAS1l52/DASl153 respectively.At this time,the STATUS linegoes low signifyingthatthe conversion iscomplete.For microprocessorbus applications,thedigital output can now be appliedto thedata bus by enablingthetri- statebuffers.For maximum data throughput,the digitaloutput datashould be read whilethe samplc/holdamplifierisacquiring the new analoginpUtsignal. TRIGGER! r-1SIH CONTROL.J t.. INPlJT +FS-r-+ SIGNAL -~J=:-I,+F5 ~SlH OUTPUT 0 - -:-fS -, EOC 35 I\\IIAX( ~~44,..I\\IIAX(0~~~:~1--t.- MSB ==~lJ SS ~ ' 81T 2 =~~~s -' IIIT3:==~~S -,'I I t I I I I I I I I lilT14 I 17-) ~ILSB FOR DASH52I L..J 'Wff$1 lilT15 ---] $$---, VJ1IJ7JJIlSIlFOR 0.0.511531__- L WQm NOTES ~ ,.OutputDataVa"d. must be 4".10.0.51152)15"0(nASU531 m!n to allow the SIH Amplifierto acquirethe Input Signal,IIthe ADC isonly used, the T,11Ige,Pulse must be 100n. min. Figure3. DA$1152/DA$1153 Timing Diagram -3- -~-~ AAalogVoltage Connel:t Connect Connect Input VINor S/H Out AnalogCommon RefOut Range To To To Oto +:5V ANA IN I, ANAINZ, Ground NC* ANAIN3 Oto + IOV ANAIN2 Ground NC* ANAIN 3 ANA IN 1 :!:5V ANA IN 1 Ground, ANA IN 2 ANA IN 3 :!:JOV ANA IN 3 Ground, ANAIN2 ANAJN 1 OBSOLETE

ANALOG DEVICES fAX-ON-DEMAND HOTLINE - Page 5 DAS1152/DAS1153 GAIN AND OFFSET ADJUSTMENT The DAS1l52/DAS1l53 containinternalgainand offset adjustmentpotentiometers.Each potentiometerhas ample adjustmentrangeso thatgain and offseterrorscan be trimmed to zero. Sinceoffsetcalibrationisnot affectedby changes ingain calibration,itshould be performed priortogaincalibration. Proper gainand offsetcalibrationrequiresgreatcareand the use of extremelysensitiveand accuratereferenceinstruments. The voltagestandardused as a signalsourcemust be very stable and be capableofbeing settowithin :tl/IOLSB of thedesired valueatany pointwithinitsrange. OFFSET CALIBRATION For a 0 to + 10V unipolarrange setthe inputvoltageprecisely For a 0 to +5V unipolarrange setthe inputto + 153j.LVforthe DAS1l52 and + 16J.1.Vforthe DAS1l53. Then adjustthe zero potentiometeruntilthe converterisjuston the vergeof switchingfrom 000 000 to000 '001. For the :tSV bipolarrangesetthe inputvoltagepreciselyto a :tIOV bipolarrange settheinputvoltagepreciselyto + 61OJ.I.V forthe DAS1152 and +30SJ.l.Vfortbe DAS1153. Adjust the zero potentiometeruntilthe offsetbinarycoded unitsarcjust on thevergeofswitchingfrom 000 000 to 000 001 and thetwo'scomplement coded W1itsare juston the vergeof switchingfrom 100 000 to 100 001. GAIN CALIBRATION Settheinputvoltagepreciselyto +9.99909V (DASllS2)1 + 9.99954V (DAS1I53) fortbe0 to + 10V units,+4.99954V (DAS1l52)/+4.99971V (DAS1l53) for0 to +SV units, +9.99817V (DASllS2)/+9.99909V (DAS1l53) for :tJOV units,or +4.99909V (DASllS2)/+4.99954V (DAS1l53) for :t5V W1its.Note thatthesevaluesare I 1/2LSBs lesstban nominal fullscale.Adjust the gainpotentiometeruntilbinary and offsetbinarycoded unitsarejuston the vergeofswitching from 11 10 to 11 11 and two'scomplement coded units arejuston thevergeof switchingfrom 011 10 to 011 .11. DAS1152/DAS1l53 INPUTIOUTPUT RELATIONSHIPS The DAS1152/DAS1153 producesa truebinarycoded output when configuredas a unipolardevice.Configuredasa bipolar device,itcan produce eitheroffsetbinaryor two'scomplement output codes.The most significantbit(MSB) isused toobtain the binaryand offsetbinarycodeswhile(MSB) isused toobtain two'scomplement coding.TableIIshows theDAS 1I52/DAS 1153 unipolaranaloginput/digitaloutputrelationships.Tables III and IV show the DAS1l52/DASllS3 bipolaranaloginput/digital output relationships. NOMINAL BIPOLAR INPUT .OUTPUT RELATIONSHIPS Table II.Unipolar Input/Output Relationships ANALOG INPUT 010 +10 DASHS2 +9,99939V + ;,oooov + !.25000V +0.0006V +O.OOOOV Dto + SV Range: DASUS2 DASHS3 +4.99969V +4.99984V +2.50000V +2.50000Y +0.62500V +O.62500V +O.0003V +O.00015V +O.OOOOV +O.OOOOY ange DASHS3 +9.9996!N + 5.00000Y + !.25000Y +O.0003V +O.OOOOV QJGIT AL OUTPUT Binary Code DASH53 111111111111111 100 000 000 000 000 00 1 000 000 000 000 000 000 000 000 00 1 000 000 000 000 000 DASllS2 11111111111111 10 000 000 000 000 00 100 000 000 000 00 000 000 000 00 I 00 000 000 000 000 Table /II.DAS1152 Bipolar Input/Ou~put Relationships Analog Input :t:SVRange z 10V Range + 4.99939V +9.99878V + 2.50000Y + 5.0000Y +0.0006IY +0.OOI22Y +O.OOOOOV +O.OOOOOV - 5.00000Y - 10.00000Y DigitalOutput OffsetBinaryCode Two's Complemcot Code 11111111111111 01111111111111 II 000 000 000 000 01 000 000 000 000 10000000 000 001 00 000 000 000 001 I0 000 000 000 000 00 000 000 000 000 00 000 000 000 000 I0 000 000 000 000 Table IV. DAS1153 Bipolar Input/Output Relationships AIIaloe Input : SV Range :!:10VRange +4.99969V +9.99939V +2.50000V +5.0000Y +O.0003V + 0.0006IV +O.OOOOOV +O.OOOOOY - 5.00000V - IO.OOOOOV DigitalOutput OllSetBlnaryCode Two'. Complement Code III III 111 111 111 011 III 111 III III 110 000 000 000 000 010 000 000 000 000 100 000 000 000 00I 000 000 000 000 001 100 000 000 000 000 000 000 000 000 000 000 000 000 000 000 I00 000 000 000 000 TRI-STATE DIGITAL OUTPUT The ADC digitaloutputsareprovidedin parallelformat to the output tri-statebuffers.The oUtpUt informationcan be applied toa databus ineithera one-byteor a two-byteformat by using theHIGH BYTE ENABLE and LOW BYTE ENABLE terminals.Ifthe tri-statefeatureisnot required,normal digital outputscan be obtainedby connectingthe enablepins to ground. POWER SUPPLY AND GROUNDING CONNECTIONS Although theanalogpower ground and the digitalground are connectedin the DAS 1152/DAS I153,caremust stillbe taken to providepropergrounding due to the high accuracynatureof thesedevices.Though only generalguidelinescan be given, groundingshould be arrangedin such a manner as to avoid ground loopsand to minimize thecouplingofvoltagedrops (on thehigh currentcarryinglogicsupply ground) to thesensitive analogcircuitsections.Analog and digitalgroW1ds should remain separatedon thePC board and terminatedatthe respectiveDASI152/DAS 1153 terminals. No power supplydecouplingisrequiredsince,theDAS1152/ DAS1l53, containhigh qualitytantalumcapacitorson each of thepower supplyinputstoground. -4- REV. 'A - -~ OBSOLETE