DAS1151_15 AD | Alldatasheet

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-..ANALOG W DEVICES Low LevelInput,12-Bit DataAcquisitionModules PRELIMINARY TECHNICAL DATA

FEATURES

Resistor-ProgrammableGain (1=1000V!V) High Accuracywith Low LevelInputSignals Low Cost High Throughput Rateand High Gain DAS1151 Software-ProgrammableGain (1,2,4,8V!V) ProvidesGain forSignalConditioningand High Throughput Rate Gain RatioError::1:0.02%FS max GENERAL DESCRIPTION The DAS1150 and DAS1151 aretwo data acquisitionmodules designed,builtand testedto meet system data acquisitionre- quirements. Each device comprises an instrumentation ampli- fier,sample-hold amplifierand 12-bitsuccessiveapproximation AID converter.These products areused on Analog Devices Real Time Interfaceboards as data acquisitionsystems to interfacewith microcomputer boards. With the DAS1150 and DAS1151, userscan apply gain to the instrumentationamplifierfor signalconditioningand still achievehigh speed data conversion.The differencebetween models ishow the gain iscontrolled.With the DAS 1150, the designersetsthe gain from 1 to 1000 V/V with a resistor,RG. The DAS1151 has gainsof 1-2-4-8that are software-program- mable. DESIGN FEATURES AND USER BENEFITS The DAS1150 and DAS1151 offertrue high-speed 12-bitper- formancewith maximum overallerrorat unity gain of :1:1least significantbit(LSB). This performance isguaranteed at a 25kHz throughput rate.There isvery littleperformance lostat' high gains.For example, atgain of 1000, the DAS1l50 has a throughput of 13kHz and an overallaccuracy of :l:2LSB.The DAS1151 with itssoftware-programmable gain provides dy- namic rangeexpansion aswellasthe flexibilityofusingdiffer- entgainsettingsto accommodate differentinputsignallevels. The resistor-programmable-gainDAS 1150 may be used for in- put rangesfrom 1OmV fullscaleto :l:10Vfullscalewith very. littlelossof speed and no degradationof linearityat high gain. THEORY OF OPERATION Block diagrams of the DAS 1150 and DAS 1151 are shown in Figures 1 and 2.Analog input signalsare appliedto the input of the instrumentationamplifier.The instrumentation ampli- .fierisgain-programmableby theuserviaa resistor(DAS1150) or TTL/CMOS logic(DAS1151). This featUrepermits the user to operate the module on any input voltagerange from :l:10mV Information furnished by Analog Devices is believedto be accurate and reliable.However, no responsibilityisassumed by Analog Devices for itsuse; nor for any infringementsof patentsor other rightsof third partieswhich may resultfrom itsuse. No licenseisgranted by implica- tion or otherwise under any patent or patent rightsof Analog Devices. to :l:10Vwith the DAS1150 or any of 4 input voltageranges with the DAS1151. The instrumentationamplifierdrivesa sample-hold amplifier,whose function isto hold the selected analog input signalat a constant levelwhile the AID converter ismaking a conversion. The AID converterisa high speed 12-bitsuccessiveapproxi- mation devicethathas been designed using Analog Devices AD562 IC DI A converterwith a precisionreferencesource,a high speed comparator and successiveapproximation logic. ADDRESS Ao ADDRESS A, CONTROl IN 'SV 0 DIGITAl 0GROUND R"'RENCE OUT O>FSET ADJ SUMMING POINT R"'RENCE IN BIPOlAR Df'SET 'OV"'AN '"V SPAN Figure 1. DAS1151 Block Diagram and Pin Designations

SPECIFICATIONS(typical@ +25°Candratedsuppliesunlessothervyisenoted) MODELS RESOLUTION CHARACTERISTICS ADC Conversion Time IA SettlingTime, 20V Input Step to O.OI%@G = 1 to 0.01 % @ G = 10 to 0.05% @ G = 1000 Throughput Rate G = 1 G = 10 G = 1000 Sample-Hold Acquisition Time Aperture Delay Time Aperture Time Aperture Uncertainty Time Droop Rate Overall Errorl @ G = 1 @ G = 1000 Nonlinearity Error Offset Error Gain Error DAS1l50 (G = 1-8) 1OMs max N.A. N.A. (G = 1-8) 28.5kHz N.A. N.A. = 8) :t2LSB max TEMPERATURE COEFFICIENTS Offset (RTI) Gain (RTI) Differential ANALOG INPUTS ( ADC FS )Voltage Input Range \\" GAIN ADC Input Ranges Instrumentation Amplifier Gain Gain Range Gain Equation Gain Ratio Error2 Input Impedance Bias Current Offset Current Offset (RTI) DIGIT AL INPUTS ADC Convert Command SHA Mode Control PGA Gain Control 25/1smax 15/1smax 15/1s 50/1s 25kHz 25kHz 13.3 kHz 3Ms 90ns 20ns 5ns 2mV/s :tlLSB max :t2LSB max :tl/2LSB (:tlLSB max) to Zero to Zero /1V/DC Reading/C :t30/1V/C* 0.625V to :tl0Y So ftw are-Programm abIe 1,2,4,8 See Table 4 :to.02% FS max 2nA 500pA TTL Compatible, DIGITAL OUTPUT ParallelData Output Unipolar Bipolar SerialData Output Unipolar Bipolar Status Output Clock POWER REQUIREMENTS 10mV to :tl0V 0 to +5V 0 to +10V :t2.5V :t5V :tl0V Resistor-Programmable ~ ~.11~00(20H2 )-- \\ RGN.A. 1O8n 20nA 2nA :t50MV PositivePulse,TTL Compatible, lOOns min Width PositivePulse TTL Compatible Logic "1" = Hold, Logic "0" = Sample N.A. 6TTL Loads/Bit PositiveTrue Binary PositiveTrue Offset Binary or Two's Complement

6 TTL Loads

PositiveTrue Binary NRZ Format, MSB First PositiveTrue Offset Binaty, NRZ Format, MSB First Logic "1" During Conversion, TTL Compatible, 4TTL Loads, Complement also Available 480kHz, TTL Compatible, 6TTL Loads +5V dc :t5% @ 130mA (170mA max) :t15V dc :t3% @ 30mA (40mA max) :t15V dc :t3% @ 30mA (40mA max) TEMPERATURE RANGE Operating Storage 0 to +70DC -55DC to +85DC PRICE (1-24) $249$199 OUTLINE DIMENSIONS Dimensions shown in inchesand (mm). I I 04~1~.71 LU UT 4.02 1102.11 MAX BOTTOM VIEW --1 1--0., 12.541GRID NOTES, TERMINAL PINS INSTALLED ONLY IN SHADED HOLE LOCATIONS. SEE TABLE BELOW FOR PIN DELETIONS. MODULE WEIGHT, 3.5 OUNCES 199.3 GRAMSI. ALL PINS ARE GOLD PLATED HALF.HARD '0.03mml DIA. MATING SOCKET: AC1577 (4 per,$3 each) NOTES I Overallerrorisspecifiedwith gainsand offsettrimmed and isdefined as the deviationfrom a straightlinepassing through the end pointsof the range. 2Once the fullscalehas been calibrated on any gain setting,switchingto any other gainsettingwillcause no more than a 0.02% shiftin fullscale. *Specificationssame as DAS1150. Specificationssubjectto change with- out notice. -~~-- OBSOLETE

ply ground and the sensitiveanalog circuitsections.

  1. Ifthe :!:15Vpower supply isfloating(foroptimum analog
  2. Connect the +5V supply common to digitalground. Ifthis
  3. Single-endedinput signalsshould only be returned to anaiog

nalsin the differentialconfiguration.

  1. Connect computer ground to digitalground. Use heavy wire
  2. The computer chassisshould be connected to the computer

and power supply grounds at only one point.

  1. Connect the thirdwire ground from main ac power input

to the computer power supply return.

  1. Biasreturn path should always be provided.

'THESE PINS APPEAR ON DAS1150 ONL Y. 'THESE PINS APPEAR ON DAS1151 ONLY. 'SHOULD BE LOCATED WITHIN 1"FROM MODULE. Figure 3. Module Connections for:!:10V Range shows connections for ADC input ranges. Table 1. ADC Input Range Connections

22 ANAGND

20 SHAOUT SHA CONTROL 53

17 REF OUT +5V 56

16 ZERO CONV COM 57

15 REF IN STATUS 58

11 ANAGNO

Table 2. Nominal Unipolar Input-Output Relationships Table 3. Nominal Bipolar Input-Output Relationships For bipolarmode setthe input voltagepreciselyto zero volts. reciprocalof IA settlingtime. put returnsto Logic "0" and the conversioncycle ends. twelve "0" to "1" clock transitions. proper code into the gain address,asshown in Table 4.