DAN-200 EXAR | Alldatasheet
Document overview
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Technical content
1.0 INTRODUCTION
2.0 MULTIDROP/9-BIT MODE
2.1 M ULTIDROP SYSTEM TOPOLOGY
FIGURE 1. MULTIDROP SYSTEM TOPOLOGY DIAGRAM data byte. The XR16Mxxx single channel UART family provides two multidrop mode to simplify the software.
2.2 N ORMAL MULTIDROP MODE AND MULTIDROP MODE WITH AUTO ADDRESS DETECTION
FIGURE 2. FLOW CHART FOR NORMAL AND AUTO ADDRESS DETECT MULTIDROP MODE
DATA COMMUNICATIONS APPLICATION NOTE DAN 200
3.0 SAMPLE CODE TO INITIALIZE UART FOR MULTIDROP MODE
Exar’s single channel XR16Mxxx UART family can oper ate in the 9th-bit (Multidrop) mode by enabling MSR bit-6. The multidrop mode features are for receiver (R X) side only. The transmitter (TX) side needs to be con - trolled manually by the software. The following sections discuss the two initialization routines for UART receiver.
3.1 N ORMAL MULTIDROP MODE
To initialize the single channel XR16Mxxx UART family to operate in the 9-bit (Multidrop) mode, here are what you need to do: Enable Multidrop mode Force Parity bit ‘0’ Disable Receiver Enable LSR RX line interrupt Here is an example to initialize the normal multidrop mode: write(LCR, 0xBF); write(EFR, 0x10); //EFR[4] = 1 to enable access to MSR bit-6; //EFR[5] = 0 to disable the special character detect feature; write(LCR,0x3B); //Force parity 0 to detect address byte; //Set data format 8-bit data, 1-bit stop write(MSR, 0x60); //Enable 9-bit mode & Disable RX write(IER, 0x4); //Enable LSR interrupt When an address byte is received, an interrupt will be generated: read(ISR); //Get 0xC6; Indicates that LSR interrupt is pending and FIFO is enabled; read(LSR); //Get 0xE5; Indicates that address data has been received; read(RHR); //Read address byte If this address byte matches its slave address byte, the control software will enable the receiver (MSR bit-5= 1) to start receiving data.
3.2 M ULTIDROP MODE WITH AUTO ADDRESS DETECTION
To initialize the UART in the auto address detection multidrop mode, there are two extra steps: Enable Multidrop mode Force Parity bit ‘0’ Write target address byte to XOFF2 register Enable Special Character Detect feature Disable Receiver Enable LSR RX line interrupt (Optional)
EXAR Corporation reserves the right to make changes to the products contained in this publication in order to improve design, performanc e or reliability. EXAR Corp oration assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infr ingement. Charts and schedules contai ned here in are only for illustration purposes and may vary depending upon a user’s specific application. While the information in this publication has been carefully checked; no responsibility, however, is assumed for inaccuracies. EXAR Corporation does not re commend the use of any of its products in life suppo rt applications where the failure or malfunction of the product can reasonably be ex pected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporation receives, in writing, assurances to its satisfaction that: (a) th e risk of injury or damage has been minimized; (b) th e user assumes all such ris ks; (c) potential liability of EXAR Corporation is adequately protected under the circumstances. Copyright 2009 EXAR Corporation Datasheet April 2009. Send your UART technical inquiry with technical details to hotline: uarttechsupport@exar.com. Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited. DATA COMMUNICATIONS APPLICATION NOTE DAN 200 Here is an example to initialize multidrop mode with auto address detection: write(LCR, 0xBF); write(EFR, 0x30); //EFR[4] = 1 to enable access to MSR bit-6; //EFR[5] = 1 to enable the special character detect feature; write(XOFF2, 0xAA); //Set the desired address to 0xaa (or other values for your application); write(LCR,0x3B); //Force parity 0 to detect address byte; //Set data format 8-bit data, 1-bit stop write(MSR, 0x60); //Enable 9-bit mode & Disable RX write(IER, 0x4); //Enable LSR interrupt When a matching target address byte is received, single channel XR16Mxxx UART family will enable receiver to start receiving data automatically. When a new address byte is received that does not match the target ad - dress byte in XOFF2 register, the receiver will be disabled automatically.
4.0 TECHNICAL SUPPORT
For any questions regarding the multidrop mode, send an email to uarttechsupport@exar.com.