DAC80-CBI-I

DAC80P TI | Alldatasheet

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FPO 41% Monolithic 12-Bit DIGITAL-TO-ANALOG CONVERTERS

FEATURES

l INDUSTRY STANDARD PINOUT l FULL ±10V SWING WITH V CC = ±12VDC l DIGITAL INPUTS ARE TTL- AND CMOS-COMPATIBLE l GUARANTEED SPECIFICATIONS WITH ±12V AND ±15V SUPPLIES l ±1/2LSB MAXIMUM NONLINEARITY: 0°C to +70°C l SETTLING TIME: 4µs max to ±0.01% of Full Scale l GUARANTEED MONOTONICITY: 0°C to +70°C l TWO PACKAGE OPTIONS: Hermetic side- brazed ceramic and low-cost molded plastic

DESCRIPTION

This monolithic digital-to-analog converter is pin-for- pin equivalent to the industry standard DAC80 first introduced by Burr-Brown. Its single-chip design in- cludes the output amplifier and provides a highly stable reference capable of supplying up to 2.5mA to an external load without degradation of D/A perfor- mance. This converter uses proven circuit techniques to pro- vide accurate and reliable performance over tempera- ture and power supply variations. The use of a buried zener diode as the basis for the internal reference contributes to the high stability and low noise of the device. Advanced methods of laser trimming result in precision output current and output amplifier feedback resistors, as well as low integral and differential lin- earity errors. Innovative circuit design enables the DAC80 to operate at supply voltages as low as ±11.4V with no loss in performance or accuracy over any range of output voltage. The lower power dissipation of this 118-mil by 121-mil chip results in higher reliability and greater long term stability. Burr-Brown has further enhanced the reliability of the monolithic DAC80 by offering a hermetic, side-brazed, ceramic package. In addition, ease of use has been enhanced by eliminating the need for a +5V logic power supply. For applications requiring both reliability and low cost, the DAC80P in a molded plastic package offers the same electrical performance over temperature as the ceramic model. The DAC80P is available with voltage output only. For designs that require a wider temperature range, see Burr-Brown models DAC85H and DAC87H. DAC80 DAC80P International Airport Industrial Park • Mailing Address: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706 Tel: (520) 746-1111 • Twx: 910-952-1111 • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 Reference Control Circuit 12-Bit Resistor Ladder Network and Current Switches Digital Inputs Reference Gain Adjustment Scaling Network Analog Output Offset Adjustment + Supply – Supply © 1986 Burr-Brown Corporation PDS-643F Printed in U.S.A. July, 1993 SBAS148

PARAMETER MIN TYP MAX UNITS DIGITAL INPUT Resolution 12 Bits Logic Levels (0°C to +70°C)(1): VIH (Logic “1”) +2 +16.5 VDC VIL (Logic “0”) 0 +0.8 VDC IIH (VIN = +2.4V) +20 µA IIL (VIN = +0.4V) –180 µA ACCURACY (at +25°C) Linearity Error ±1/4 ±1/2 LSB Differential Linearity Error ±1/2 ±3/4 LSB Gain Error(2) ±0.1 ±0.3 % Offset Error(2) ±0.05 ±0.15 % of FSR (3) DRIFT (0°C to +70°C)(4) Total Bipolar Drift (includes gain, offset, and linearity drifts) ±10 ±25 ppm of FSR/ °C Total Error Over 0°C to +70°C (5) Unipolar ±0.06 ±0.15 % of FSR Bipolar ±0.06 ±0.12 % of FSR Gain: Including Internal Reference ±10 ±30 ppm/ °C Excluding Internal Reference ±5 ±10 ppm/ °C Unipolar Offset ±1 ±3 ppm of FSR/ °C Bipolar Offset ±7 ±15 ppm of FSR/ °C Differential Linearity 0°C to +70°C ±1/2 ±3/4 LSB Linearity Error 0°C to +70°C ±1/4 ±1/2 LSB Monotonicity Guaranteed 0 +70 °C CONVERSION SPEED, V OUT Models Settling Time to ±0.01% of FSR For FSR Change (2kΩ || 500pF Load) with 10kΩ Feedback 34 µs with 5kΩ Feedback 23 µs For 1LSB Change 1 µs Slew Rate 10 V/ µs CONVERSION SPEED, I OUT Models Settling Time to ±0.01% of FSR For FSR change: 10Ω to 100Ω Load 300 ns 1kΩ Load 1 µs ANALOG OUTPUT, V OUT Models Ranges V Output Current(6) ±5m A Output Impedance (DC) 0.05 Ω Short Circuit to Common, Duration(7) Indefinite ANALOG OUTPUT, I OUT Models Ranges: Bipolar ±0.96 ±1.0 ±1.04 mA Unipolar –1.96 –2.0 –2.04 mA Output Impendance: Bipolar 2.6 3.2 3.7 k Ω Unipolar 4.6 6.6 8.6 k Ω Compliance –2.5 +2.5 V REFERENCE VOLTAGE OUTPUT +6.23 +6.30 +6.37 V External Current (constant load) 2.5 mA Drift vs Temperature ±10 ±20 ppm/ °C Output Impedance 1 Ω POWER SUPPLY SENSITIVITY VCC = ±12VDC or ±15VDC ±0.002 ±0.006 % FSR/ % V CC POWER SUPPLY REQUIREMENTS ±VCC ±11.4 ±16.5 VDC Supply Drain (no load): +VCC 81 2 m A –VCC 15 20 mA Power Dissipation (VCC = ±15VDC) 345 480 mW TEMPERATURE RANGE Specification 0 +70 °C Operating –25 +85 °C Storage: Plastic DIP –60 +100 °C Ceramic DIP –65 +150 °C SPECIFICATIONS ELECTRICAL Typical at +25°C and ±VCC = 12V or 15V unless otherwise noted. NOTES: (1) Refer to “Logic Input Compatibility” section. (2) Adjustable to zero with external trim potentiometer. (3) FSR means full scale range and is 20V for ±10V range, 10V for ±5V range for VOUT models; 2mA for IOUT models. (4) To maintain drift spec, internal feedback resistors must be used. (5) Includes the effects of gain, offset and linearity drift. Gain and offset errors externally adjusted to zero at +25°C. (6) For ±VCC less than ±12VDC, limit output current load to ±2.5mA to maintain ±10V full scale output voltage swing. For output range of ±5V or less, the output current is ±5mA over entire ±VCC range. (7) Short circuit current is 40mA, max.

3 DAC80/80P

FUNCTIONAL DIAGRAM AND PIN ASSIGNMENTS ABSOLUTE MAXIMUM RATINGS PACKAGE INFORMATION NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix D of Burr-Brown IC Data Book. PACKAGE DRAWING MODEL PACKAGE NUMBER (1) DAC80P 24-Pin Plastic DIP 167 DAC80 24-Pin Ceramic DIP 125 Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. Exposure to absolute maxi- mum conditions for extended periods may affect device reliability. NOTE: (1) Logic supply applied to this pin has no effect. (MSB) Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7 Bit 8 Bit 9 Bit 10 Bit 11 (LSB) Bit 12 6.3V Ref Out Gain Adjust CC Common Summing Junction 20V Range 10V Range Bipolar Offset Ref Input V OUT –VCC NC (1) Reference Control Circuit 12-Bit Resistor Ladder Network and Current Switches (MSB) Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7 Bit 8 Bit 9 Bit 10 Bit 11 (LSB) Bit 12 6.3V Ref Out Gain Adjust CC Common Scaling Network Scaling Network Scaling Network Bipolar Offset Ref Input I OUT –VCC NC (1) Reference Control Circuit 12-Bit Resistor Ladder Network and Current Switches Voltage Models Current Models 5kΩ 5kΩ 6.3kΩ 2kΩ 3kΩ 6.3kΩ 5kΩ BURN-IN SCREENING Burn-in screening is an option available for the models indicated in the Ordering Information table. Burn-in dura- tion is 160 hours at the maximum specified grade operating temperature (or equivalent combination of time and tem- perature). All units are tested after burn-in to ensure that grade speci- fications are met. To order burn-in, add “–BI” to the base model number.

ORDERING INFORMATION

DAC80-CBI-I Ceramic DIP Current DAC80Z-CBI-I Ceramic DIP Current DAC80-CBI-V Ceramic DIP Voltage DAC80Z-CBI-V Ceramic DIP Voltage DAC80P-CBI-V Plastic DIP Voltage BURN-IN SCREENING OPTION BURN-IN TEMP. MODEL PACKAGE (160h) (1) DAC80-CBI-V-BI Ceramic DIP +125 °C DAC80P-CBI-V-BI Plastic DIP +125 °C NOTE: (1) Or equivalent combination. See text.

15 –V CC

16 I OUT

17 Ref In

18 Bipolar Offset

19 Scale 10V FSR

20 Scale 20V FSR

21 Scale

23 COM

24 COM

26 Gain Adjust

27 6.3V Ref Out PAD FUNCTION

1 Bit 1 (MSB)

2 Bit 2

3 Bit 3

4 Bit 4

5 Bit 5

6 Bit 6

7 Bit 7

8 Bit 8

9 Bit 9

10 Bit 10

11 Bit 11

12 Bit 12 (LSB)

Substrate Bias: Isolated. NC: No Connection MECHANICAL INFORMATION MILS (0.001") MILLIMETERS Die Size 118 x 121 ± 5 3.0 x 3.07 ± 0.13 Die Thickness 20 ± 3 0.51 ± 0.08 Min. Pad Size 4 x 4 0.10 x 0.10 Metalization Aluminum 15 –V CC

16 V OUT

22 Sum Junct

27 6.3V Ref Out PAD FUNCTION Substrate Bias: Isolated. NC: No Connection MECHANICAL INFORMATION MILS (0.001") MILLIMETERS Die Size 118 x 121 ± 5 3.0 x 3.07 ± 0.13 Die Thickness 20 ± 3 0.51 ± 0.08 Min. Pad Size 4 x 4 0.10 x 0.10 Metalization Aluminum DAC80KD-V DIE TOPOGRAPHY DAC80KD-I DIE TOPOGRAPHY DICE INFORMATION

5 DAC80/80P

The DAC80 accepts complementary binary digital input codes. The CBI model may be connected by the user for any one of three complementary codes: CSB, COB, or CTC (see Table I). ACCURACY Linearity of a D/A converter is the true measure of its performance. The linearity error of the DAC80 is specified over its entire temperature range. This means that the analog output will not vary by more than ±1/2LSB, maximum, from an ideal straight line drawn between the end points (inputs all “1”s and all “0”s) over the specified temperature range of 0°C to +70°C. Differential linearity error of a D/A converter is the devia- tion from an ideal 1LSB voltage change from one adjacent output state to the next. A differential linearity error speci- fication of ±1/2LSB means that the output voltage step sizes can range from 1/2LSB to 3/2LSB when the input changes from one adjacent input state to the next. Monotonicity over a 0°C to +70°C range is guaranteed in the DAC80 to insure that the analog output will increase or remain the same for increasing input digital codes. DRIFT Gain Drift is a measure of the change in the full scale range output over temperature expressed in parts per million per °C (ppm/°C). Gain drift is established by: 1) testing the end point differences for each DAC80 model at 0°C, +25°C, and +70°C; 2) calculating the gain error with respect to the 25°C value, and; 3) dividing by the temperature change. This figure is expressed in ppm/°C and is given in the electrical specifications both with and without internal reference. Offset Drift is a measure of the actual change in output with all “1”s on the input over the specified temperature range. The offset is measured at 0°C, +25°C, and 70°C. The maximum change in Offset is referenced to the Offset at 25°C and is divided by the temperature range. This drift is expressed in parts per million of full scale range per °C (ppm of FSR/°C). SETTLING TIME Settling time for each DAC80 model is the total time (including slew time) required for the output to settle within an error band around its final value after a change in input (see Figure 1). Voltage Output Models Three settling times are specified to ±0.01% of full scale range (FSR); two for maximum full scale range changes of 20V, 10V and one for a 1LSB change. The 1LSB change is point at which the worst case settling time occurs. Current Output Models Two settling times are specified to ±0.01% of FSR. Each is given for current models connected with two different resis- tive loads: 10Ω to 100Ω and 1000Ω to 1875Ω . Internal resistors are provided for connecting nominal load resis- tances of approximately 1000Ω to 1800Ω for output voltage range of ±1V and 0 to –2V (see Figures 11 and 12). COMPLIANCE Compliance voltage is the maximum voltage swing allowed on the current output node in order to maintain specified accuracy. The maximum compliance voltage of all current output models is ±2.5V. Maximum safe voltage range of ±1V and 0 to –2V (see Figures 11 and 12). POWER SUPPLY SENSITIVITY Power supply sensitivity is a measure of the effect of a power supply change on the D/A converter output. It is defined as a percent of FSR per percent of change in either the positive or negative supplies about the nominal power supply voltages (see Figure 2). REFERENCE SUPPLY All DAC80 models are supplied with an internal 6.3V reference voltage supply. This voltage (pin 24) has a toler- ance of ±1% and must be connected to the Reference Input DIGITAL INPUT ANALOG OUTPUT CSB COB CTC (1) Complementary Complementary Complementary Straight Offset Two’s MSB LSB Binary Binary Complement 000000000000 +Full Scale +Full Scale –1LSB 011111111111 +1/2 Full Scale Zero –Full Scale 100000000000 1/2 Full Scale –1LSB –1LSB –Full Scale

111111111111 Zero –Full Scale Zero

NOTE: (1) Invert the MSB of the COB code with an external inverter to obtain CTC code. TABLE I. Digital Input Codes. FIGURE 1. Full Scale Range Settling Time vs Accuracy. 0.1 Settling Time (µs) 1 10 100 Accuracy Percent of Full-Scale Range (%) 0.3 0.1 0.03 0.01 0.003 0.001 R L= 10Ω to 100Ω R L= 1000Ω to 1875Ω 10kΩ Feedback 5kΩ Feedback V Models I Models

7 DAC80/80P

Offset potentiometer for zero output. Table II for corresponding codes. digital input that should give the maximum positive output. FIGURE 5. Relationship of Offset and Gain Adjustments for a Unipolar and Bipolar D/A Converter. 0 to +5V range divide 0 to +10V range values by 2. ±5V range: divide ±10V range values by 2. ±2.5V range: divide ±10V range values by 4. TABLE II. Digital Input/Analog Output. +5V or 0 to +10V. See Figure 6. FIGURE 6. Output Amplifier Voltage Range Scaling Circuit. NOTE: (1) Resistor Tolerances: ±2% max.

17 Bipolar

FIGURE 4. Equivalent Resistances.

±50ppm/°C plus the TCR of RL (or RF) to the total drift. to produce an output voltage. See Figure 9. NOTE: (1) Resistor Tolerances: ±2% max. FIGURE 7. Internal Scaling Resistors. FIGURE 8. Current Output Model Equivalent Output Circuit.

24 Reference Out

17 Bipolar Offset

21 Common

16 Reference Input

FIGURE 9. External Op-Amp—Using Internal Feedback NOTE: (1) For fast settling. TABLE IV. Voltage Range of Current Output. op amp may be employed with an external feedback resistor. protection diodes when a high voltage op amp is used. FIGURE 10. External Op-Amp—Using External Feedback NOTE: (1) For output voltage swings up to 290V p-p.

9 DAC80/80P

any BURR-BROWN product for use in life support devices and/or systems. above, trimming may be necessary. FIGURE 12. Current Output Model Connected for Bipolar Output Voltage with Resistive Load. FIGURE 11. Current Output Model Equivalent Circuit

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