DAC20

DAC20 ETC1 | Alldatasheet

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APM) DAC-20 2-DIGIT BCD HIGH-SPEED MULTIPLYING D/A CONVERTER (UNIVERSAL DIGITAL LOGIC INTERFACE) FEATURES between reference and full-scale currents eliminates the © Full-Scale Current Prematched to +0.3 LSB vovided borne. hon swing iijustable threshold logic © Direct Interface to TTL, CMOS, ECL, PMOS, NMOS. Pooatg ee hh Swing: adjustable threshold logic © Nonlinearity to +1/2 LSB Maximum Over Temp. inputs. © High Output Impedance and Compliance -10Vto+18V¥ Complementary current outputs with -10V to + 18V voltage © Complementary Current Outputs compliance enable resistive termination, a voltage output © Wide Range Multiplying Capability ... 1MHz Bandwidth —_without an external op amp. © Low Cost over the +4.5V to +18V power supply range, with 37mW © Available in Die Form power consumption attainable at +5V supplies. The compact size and low power consumption make the ORDERING INFORMATION ' DAC-20 attractive for portable applications. " PACKAGE OPERATING DAC-20 applications include A/D converters, audio attenua- NI iP P PERATUR: tors, analog meter drivers, programmable power supplies, L CERI LASTIC TEMPERATURE iss 16-PIN 16-PIN RANGE high-speed modems and other applications where low cost, “a _bacz0ca”—sbaGaoGP—=CSC~COMSC*~*;é«*U speed and complete input/output versatility are + Burn-in is available on commercial and industrial temperature range parts in required. CerDIP, plastic DIP, and TO-can packages. For ordering information, see 1990/91 Data Book, Section 2 PIN CONNECTIONS GENERAL DESCRIPTION ao fis] coMPENsaTION thi 7 Tan Gi [ES] Yer) 16-PIN The DAC-20 series of 2-digit BCD monolithic multiplying af Fa vento CERDIP digital to analog converters provide very high-speed pertor- ‘an Fave (@-Suffix) mance coupled with low cost and outstanding applications use: CH Fa eouse flexibility. 16-PIN = meg Advanced circuit design achieves 85ns settling times with =o fo) Be (P-Suffix) | very low “glitch” energy and at low power consumption ™ By fe es : Monotonic multiplying performance isattained over a wide 20 : to 1 reference current range. Matching to within 1 LSB EQUIVALENT CIRCUIT gv 9% 981 98 om 98k 985 omy at CESAR Cine A CN CR CS CKD a Rework a | eS our CURRENT eee eee eee we te) ppp een “as es | wlont ies Seow. dv Manutactured under one or more ofthe following patents: 4/055,773; 4,056,740, 4002,699 11-40 7/89, Rev. A2

DAC-20 2-DIGIT BCD HIGH-SPEED MULTIPLYING D/A CONVERTER ABSOLUTE MAXIMUM RATINGS (T,=+25°C, unless otherwise noted) Operating Temperature Range Reference Inputs (V, 4, Vjq) -rmriennnmnnneninniinesees Vt Vib DAC-20 CQ, CP verrnnennennennnennnnsinnnanes 0°C10+70°C Reference Input Differential Voltage (V, 4 10 V, 5) enn. #18V Junction Temperature (T)) ornnseenmmnnnns 65°C 10+150°C Reference Input Current (14) --swnvennnnnnnnnnerrrs SOMA Storage Temperature Range PACKAGE TYPE 14 (Note 2) %e ‘UNITS: P Package ...csssssessssusssessessennentecrmuestseees “B5°C to +125°C. JePin Hemet DIR(Qy eo Lead Temperature (Soldering, 60 $0) ...rnnrnnensnnne 300°C —-_16-Pin Plastic DIP (P) 82 30 sow Vs Supply to V-SUPPIY wescssstnsenestntenimnntaeannne SEV NOTES: Logic INPUtS .ensnnntnnnnntnnnennnnnesnin V=10 V= plus 36V Absolute maximum ratings apply o both DICE and packaged parts, unless Vv. Vato V. otherwise noted. Lg + enteteannatnnnnninninntnninensnrnnnt annie + 2. @ inspected for wort case mounting conions, 2, 6, specie fr <ddvice in socket for CerDIP and P-DIP packages. ELECTRICAL CHARACTERISTICS at Vs = +15V, Ine = 2.0mA, 0°C < Ta < 70°C, unless otherwise noted. Output characteristics refer to both loyr and lout. DAC-20¢ PARAMETER SYMBOL CONDITIONS MIN TYP MAX units Resolution BCD 010 99 stops 2 - Digits Monotonicity CO 99 stops 20 = Digits Nonlinearity NU (2000 0000 to 1001 1001 — = tw use To 1/2 LSB (205% FS) Settling Time ts allbits switches ON or — 180 ns OFF, T,= 25°C (Note 1) Propagation Delay Each ait tan ose _ All bits switched ta Tas 25°C (Note 11 8s ® s FullTempeo Teles wwoet = +0 +80 pom" Full-scale current change Output Voltage Compliance = < V2 LSB (< 0.5% FS) ate v (True Compliance) ‘00 Rour> 20M2 typical tne — Full Range Output = 28°0. neg = 2m om (Digital Input 1001 1001) nna Tas 28°C, Inge = 2mA 192188204 “ Zero-Scale Current les — 02 5 HA v-=-10v 22 2 Output Current Range lon Mev to -18v 3 yo ma Coole np Level 1] Logic “0” Vu Vic= ov - = 0a y Logic “1” Von 20 - Logie input Current Vie= ov 2 Logic “0” he Vn=-10V to +0.8V - 2 #0 af Logic “1” Jing Vin = 2V to 18V_ — 0.002 +10 ” ~ Logie Input Swing Vs a es v5 “Logic Threshold Range Via Vs=#15V (Note 1) 0 +135 - vg Reterence Bias Current hs = 4 wa 0 Reference Input Siew +a 48vee Le 2 eS Power supp Senatnity ——PSESH YL “eayea ctav ae cee Sez PSSirs a = 20002 +009 wav er = 1A BS a Vg= #5V, lage = 1mA > 3 38 in - - -50 65 4 Power Supply Current , = SSS m Z C V5 #18V, Iner= 2mA 7 oR OS E wer Dissipation V5= #5V, Incr = 1A — 7 w 3 Power Dissipatios Pe Vs = +18V. Inge = 2mA - 182 194 w O NOTE: 1. Guaranteed by design. 11-41 7/89, Rev. A2

EMD DAC-20 2-DIGIT BCD HIGH-SPEED MULTIPLYING D/A CONVERTER a _PAC-20 2:DIGIT BCD HIGH-SPEED MULTIPLYING D/A CONVERTER DICE CHARACTERISTICS roo Oo. o.4 tee a Os ie 1 Mc 9 BITS (Exe eR ed 2 Tour 1. pire Cra OS ey y Se Ie aS i 3 1. BIT7 = i! i sity ple 4. lour 12. BIT (LSB) aie SESS i [34 5. BIT1(MSB) 13. V+ SSS Ty FE Van gl 6. BIT2 14. Vag (+) tee ey ners fons eeanate| aa @ BITS 16. COMP eee St Ppa We eel a For additional DICE ordering information, DIE SIZE 0.086 x 0.064 inch, 5,504 sq. mits _‘éfer to 1990/91 Data Book, Section 2. (2.184 x 1.625 mm, 3.55 sq. mm) WAFER TEST LIMITS at Vs = + 15V, Incr = 2.0mA, Ta = 25°C, unless otherwise noted. Output characteristics refer to both lour and our. oO DAC-206 PARAMETER SYMBOL ConoITions ur units —sa SO commimions. es Resolution - BOD0 10.99 steps 2 Digits MIN “Monotonicity - BC 99 steps 2 Digits MIN Nonlinearity NU _FS= 1001 1001 212 USB MAX Full-Scale Current Change +18 VMAX Output Voltage Compliance Yoo faperale “ eine TO_—— a ooo MIN Ver = 10¥ 204 mA MAX Full-Scale Current lesa ree san sel mun i Rem Zero-Seale Current les 5 HAMAX eer ee v-=—10v 24 Output Current Range Jon Mee to -ev a mA MIN Logie "0" Input Level Vi 08 VMAX ae re a Logic “1” Input Levet Vn 2 vMIN ee vin Logie Input Current Logie “0” he Vin=-10V t0 +0.8V +10 tome te Ms avtotpy +8 vMax Logie Input Swing Vis v-=-15v “ Vane a 2) V-=-45Vt0-18V PSSies¢ +003 Seles Power Supply Sensitivity V-=-45Vt0-10V = Max tage tm ae ' Vo= 216v 38 Power Supply Current r : _ - aa 33 mAMAX Ve" 210¥ Power Dissipation Po ‘ner 2mA 98 mW MAX NOTE: Electrical tests are performed at water probe tothe limits shown. Due to variations in assembly methods and normal yield lose, yield after packaging is not ‘uaranteed for standard product dice, Consul fctory to negotiate specifications based on dice lot quaificetion through sample lot assembly and testing TYPICAL ELECTRICAL CHARACTERISTICS at Vs = +15V, Incr = 2.0mA, unless otherwise noted specified. Output characteristics refer to both lou and Tour. SS DAC-206 PARAMETER SYMBOL CONDITIONS TYPICAL units Reterence Input Slew Rate avat : 3 mus Propagation Oelay tun ton Ta= 25°C, Any Bit _ 5 ns To* 286, Al Bits Switched Setting Time ts Oncor teusete 8s ne ner tare 11-42 7/89, Rev. A2

DAC-20 2-DIGIT BCD HIGH-SPEED MULTIPLYING D/A CONVERTER TYPICAL REFERENCE PERFORMANCE CHARACTERISTICS REFERENCE AMP FULL-SCALE CURRENT vs COMMON-MODE RANGE REFERENCE CURRENT LOGIC INPUT CURRENT (DIGITAL INPUT 1001 1001) (DIGITAL INPUT 1001 1001) vs INPUT VOLTAGE JESS “APS gant voy eel | Lebo] EPP er ae ie porta ELE ie "COTTE ET ETT TT ba, te Pe a . peeeeees “eo Ee ol we. |] ITT OUTPUT CURRENT REFERENCE INPUT FREQUENCY vs OUTPUT VOLTAGE RESPONSE (DIGITAL INPUT (OUTPUT VOLTAGE COMPLIANCE) Vt — Vic v8 TEMPERATURE 1001 1001) (DIGITAL INPUT 1001 1001) CoOOOCee Coon Loom [1 te PJ omy Neri “ pres |

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gu <a el CoNyE.. : a COE na HA Peery ICANN) Ss Beeueeee w Ll TTP itt 4 CL LOM TT a fi +200mV, SMALL SIGNAL. wa POWER SUPPLY POWER SUPPLY zg CURRENT vs V+ CURRENT vs V- 3 [_[atswowron sor T TT] [ srswivetniow onion |] ] 8 Fei ee Fool | |p wer | 8 : || | 3 ft naman | z : : ¢ Looe. Seadersery 5 eer TT TTT CO é wt ti tt | wl TTT TTT | 8 11-43 7/89, Rev. A2

Exp DAC-20 2-DIGIT BCD HIGH-SPEED MULTIPLYING D/A CONVERTER TYPICAL REFERENCE PERFORMANCE CHARACTERISTICS OUTPUT VOLTAGE COMPLIANCE POWER SUPPLY CURRENT vs TEMPERATURE ve TEMPERATURE | EES “[Rateeceee] TT]

3 SHADED AREA INDICATES 5

2 4 Lif rermasioce vorrace naxoe 2 a6 3 omen er sti | ? LLL E! -| ? Coo CE 4 ; SCE TT TT | 9 eee wLLL TTT ttt ‘ys 50 250 as 50 75 100 125 180 75 a0 0S WS TO Tas 150 TEMPERATURE Cc) TEMPERATURE €) BASIC OUTPUT CONNECTIONS The unused output must be connected to ground or some With complementary current outputs, the DAC-20 may be _Voltage source capable of sourcing 1.65 times Iner. A detailed used with either positive true or negative true (complemen. __@’Scussion of reference input operation begins on the next tary) logic. Current appears at the “true” output (Io) whena page. “{" is applied to @ logic input. As the BCD-coded input Both outputs have an extremely wide voltage compliance increases, the sink current at Pin 4 increases proportionately, enabling fast direct current-to-voltage conversion through a in the fashion of a “positive logic" D/A converter. When a0” _resistor tied to ground or other voltage source. Positive is applied to a logic input, that currentis turned OFF at Pin4 compliance is 36V above V- and is independent of the and ON at Pin 2 (To) which is used for negative true or positive supply. Negative compliance is given by V- plus “negative logic” D/A converters. (Iner X 8002) plus 2.5V. POSITIVE VOLTAGE OUTPUT POSITIVE TRUE LOGIC INPUTS NEGATIVE TRUE Loate iNpUTS wo 1s Mo 190. 9 som erazeaecaspea7oe \\ = — BruzaaeaBs pear Oe \\ = | 5.000% aw 8.0048 4 it ousy = ae 20 tar a Tner 200 a) > rate eM . vey. co Mc f= veo fe Mic J. © our oouF i = 4 3 = Fe 6 = o 8 = Fe baw vv av aay 8 DECIMAL ‘BCD INPUT 1 DECIMAL ‘BCD INPUT z E INPUT MSD .sD ° ° INPUT MSD” iso ° hd ° ‘0000 (0000 ° ° 0 TH mH ° ° 10 0001 (0000 020mA SS +1.0V 0 1110 m1 020mA 4 4.0V 20 0010 0000 o4omA 42.00 20 1103 m1 O4omA—42.0V 30 cont ‘0000 O60mA—+30V 0 1100 m1 O¢oma —+a0V Ey 0100 ‘0000 O80mA——+40V 0 101 rr Oe0mA—+40V 80 1000 ‘0000 Teoma +80V ont mo 160mA—«+8.0V 9 007 T00t 196mA—«+09V * orto ono 188mA «+8. 11-44 7/89, Rev. A2

DAC-20 2-DIGIT BCD HIGH-SPEED MULTIPLYING D/A CONVERTER NEGATIVE VOLTAGE OUTPUT rosrrive TRUE Loci meUTS eGATive TRUE LOGIE PUTS aes eau ow ao ME 9 se ss & ws se Con 2 ‘Bi e283 e485 088788 \\ ~— (Low 2) ‘81 6263 64 86 866768 \\ « ° 50008 44 \\ 3 som 4, \\ — fo = fo Oot caenid or on vv sw av 8 iw ‘Decmat——ecoweuT—SSSS:C(ié‘“‘i ALCON (NPUT MSD isp hd INPUT ‘MSD isp o ° 0000 0000 o ° @ aH a ° 5 0 001 0000 O20mA—-1.0V a 110 wi 020mA—— 10 20 010 (0000 O4omA——-a.0V 20 101 wi 040ma__—_-20¥ 20 oon (000 0.60mA 8.0 20 1100 11H 060ma__ 80 0 0100 (0000 O.80mA—4.0V 0 or 1 080mA——40v % 1000 (000 —*160mA~—— BOW 20 on ii 160mA_—-80v A 701 a 98 ‘ono ONO _188maA—-8.8V REFERENCE OPERATION POSITIVE NEGATIVE o_o ms so rrr Geunauee vers i” vnerey 8 inet inet on wae | = oe “ia | 0 slat nerenencr, aan (a ER D _ FOR sDaEO REFERENCE, ee —_ Mees” [ ane ner: tage [ on 2 wer LL | od ed w 5 Me"Winomo FF OF 8 ge Keen F FSFE ee % ‘sree eg REE = - 8° rer 3 fo "io * tne * 195 to *ig = tee * 165 FOR ALL LOGIC INPUT STATES: Se ‘or tee input stares: oO | < REFERENCE AMPLIFIER SETUP E | The DAC-20 is a multiplying converter in which the output In positive reference applications an external positive reter- fo) ! current is the product of a digital number and the input refer- ence voltage forces current through Ryq into the Vrerit+) = | ence current. The reference current may be fixed or may vary terminal (Pin 14) of the reference amplifier. Alternatively, a) | from nearly zero to +4.0mA. The full range output currentisa negative reference may be applied to Vaeri-) at Pin 15; refer- < linear function of the reference current and is given by: ence current flows from ground through Ry4 into Vperi+), as fe] lem = 99/100 X Iner, where Inee= ha in the positive reference case. This negative reference con- = 11-45 7/89, Rev. A2

DAC-20 2-DIGIT BCD HIGH-SPEED MULTIPLYING D/A CONVERTER nection has the advantage of a very high impedance pres- _ For V- =~ 18V, the logic inputs may swing between—10V and ented at Pin 15, The voltage at Pin 14is equal toandtracksthe + 18V. This enables direct interface with a + 15V CMOS logic, voltage at Pin 15 due to the high gain of the internal reference even when the DAC-20 is powered from a +5V supply. Min- amplifier. Rys(nominally equal to Ry4) is used to cancel bias. imum logic threshold voltage are given by: V- plus (Iner X current errors and may be eliminated with only a minor 8002) plus 2.5V. The logic threshold may be adjusted over a increase in error. wide range by placing an appropriate voltage at the logic Whena DC reference in used, a reference bypasscapacitoris _‘‘NFeshold control pin (Pin 1, Vic). recommended. A 5V TTL logic supply is not recommended _—The logic input threshold is 1.4V above Vic. For TTLand DTL as reference. If a regulated power supply is used asa reter-__ interface, simply ground Pin 1. When interfacing ECL, an ence, R14 should be split into two resistors with the junction 'ner = 1mA is recommended. For interfacing other logic bypassed to ground with a 0.1uF capacitor, families, see the figure. Pin 1 will source 100uA typically, so the external circuitry must be designed to accommodate this He wa elpainate he Mees tor trirenine ata current. Note that the threshold voltage has the temperature full-scale trimming may be accomplished by adjusting the ‘Pendence of two forward biased diodes. The two Vic 'g may pI 'y adjusting setting circuits shown, include temperature compensation. value of Ry, : i i Fastest settling times are obtained when Pin 1 sees a low The reference amplifier must be compensated by USING @ impedance. If Pin 1 is connected to a 1kN divider, for exam- capacitor form Pin 16 to V-. For fixed reference operation, a Te it should be b Sto ground by a0.01uF it applications, see section entitled “Multiplying Operation.” MULTIPLYING OPERATION The DAG-20 provides excellent multiplying performance LOGIC INPUT OPERATION AND INTERFACING with an extremely linear relationship between Irs and Iner over a range of 2mA to 4uA. Monotonic operation is main- vrs veg enay tained over a typical range of Iner from 100uA to 2mA. vm otuy ao Bipolar references may be accommodated by offsetting Vrer or Pin 15. The negative common-mode range of the reference ame amplifier is given by: Vow-= V- plus (Iper X 8002) plus 2.5V. paccze we The positive common mode range is V+ less 1.5V. + AC reference applications will require the reference amplifier j enn hous to be compensated using a capacitor from Pin 16 to V-. The we T value of this capacitor depends on the impedance presented ~ + + to Pin 14: for Ry4 values of 1.0, 2.5 and 5.0kM, minimum value of Cc are 15, 37, and 75pF. Larger values of Ry4 require ECL ‘CMOS, NMOS, PMOS rm ACCOMMODATING BIPOLAR REFERENCES |= ve ny 22 net soot noo — Fw eR —Konanoe Fa Kinane vn mw oe | ow ar ant 1s sean : | Torn zx sors Me we 6D 0A V

1 Inge > PEAK NEGATIVE SMG OF ly

Vrertt) Bree A yg (OPT oac-20 LOGIC THRESHOLD CONTROL Ying os The DAC-20 design incorporates a unique logic input circuit which enables directinterface to all popular logic families and nce = Rs provides maximum noise immunity. This feature is made age MIST 8 ABOVE PEAK POSITIVE possible by the large input swing capability, 2uA logic input ra OF Vin current and completely adjustable logic threshold voltage. 11-46 7/89, Rev. A2

Exp DAC-20 2-DIGIT BCD HIGH-SPEED MULTIPLYING D/A CONVERTER proportionately increased values of Cc for proper phase however, an artificial ground may be useful to insure logic margin. swings, etc., remain between acceptable limits, For fastest response to a pulse, low values of Ry4 enabling Power Consumption may be calculated as follows: small Cc values should be used. If Pin 14is driven byahigh Py=(I+) x (V+) + (I-) X (V-). A useful feature of the DAC-20 impedance such as a transistor current source, none of the _design is that supply current is constant and independent of above values will suffice and the amplifier must be heavily _input logic states; this reduces the size of the power supply compensated, which will decrease overall bandwidth and bypass capacitors. slew rate. For Ry4= 1kM and Cc = 15pF, the reference ampli- fier slews at 4mA/ys enabling a transition trom Iper= Oto laer = 2mA in 500ns. BURN-IN CIRCUIT Operation with pulse inputs to the reference amplifier may be Sone accommodated by the alternate compensation scheme shown coh above. This technique provides lowest full-scale transition = 8, times. An internal clamp allows quick recovery of the refer- ence amplifier for a cutoff (Iper = 0) condition. Full-scale nana transition (0 to 2mA) occurs in 120ns when the equivalent impedance at Pin 14 is 2009 and C¢ = 0. This yields a refer- wes ee ee 8 ence slew rate of 16mV/us, which is relatively independent of oac20 Rin and Viy values. t2aesors [TTT TTT puns nerenence openaes Ap dw TEGSERSAMEEE Ahn u EEonecs aciet soy caracivons Pho Vaer) = bour elAND Vv" TO GROUND FOR EACH davies % — orrionas nesisror 9

5 Ron esse RRS

‘DFace m tw Fo ‘TEMPERATURE PERFORMANCE ° = 7 The nonlinearity and monotonicity specification of the ro BPs DAC-20 are guaranteed to apply over the entire rated operat- otL?” | ing temperature range. Full-scale output current driftis tight, qwecat vawues, } typically +10ppm/°C, with zero-scale output current and Ay Be Vv Sear 6 Vv drift essentially negligible compared to 1/2 LSB. Yweron The temperature coefficient of the reference resistor Rig should match and track that of the output resistor for min- imum overall full-scale drift. POWER SUPPLY CONSIDERATIONS The DAC-20 operates over a wide range of power supply SETTLING TIME OPTIMIZATION voltages from a total supply of 9V to 36V. When operating at The DAC-20 is capable of extremely fast settling times, typi- supplies of =5V or less, Iner < 1MA is recommended. Low _cally 85ns at Iner = 2.0mA. Judicious circuit design and reference current operation decreases power consumption _careful board layout must be employed to obtain full perfor- and increases negative compliance, reference amplifier mance potential during testing and application. The output @ negative common-mode range, negative logic input range, __capacitance of the DAC-20, including the package, isapprox- and negative logic threshold range; consult the various _imately 15pF; therefore the output RC time constant domi- figures for guidance. For example, operation at-4.5V with _nates settling time if Ry > 5000. a Iner = 2mA is not recommended because negative output —_ Fastest operation can be obtained by using short leads, min-. Z compliance would be reduced to near zero. Operation from imizing output capacitance and load resistor values, and by 8 fower supplies is possible. However, at least 8V total mustbe —_agequate bypassing at the supply. reference and Vic termi- applied to insure turn-on of the internal bias network. nals. Supplies do not require large electrolytic bypass Symmetrical supplies are not required, as the DAC-20 is _capacitorsas the supply current drains independent of input — quite insensitive to variations in supply voltage. Battery logic states; 0.1uF capacitors at the supply pins provide full operation is feasible as no ground connection is required: transient protection. a g é Q fa) 11-47 7/89, Rev. A2