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Technical content

General description The DAC1003D160 is optimized to reduce architecture complexity and overall system cost. The Digital-to-Analog Converter (DAC) leads dynamic performance in multi-carrier support because of its direct IF conversion capabilities. With an internal sampling rate up to 160 MHz, the DAC1003D160 is an extremely competitive solution for broadband wireless systems transmitters, as well as a wide range of applications. 2. Features n Dual 10-bit resolution n Spurious Free Dynamic Range (SFDR) = 80 dBc at 2.5 MHz n Input data rate up to 80 MHz n 2 × interpolation ﬁlter n Output data rate up to 160 Mhz n Single 3.3 V power supply n Low noise capacitor free integrated Phase-Locked Loop (PLL) n Low power dissipation n HTQFP80 package n Ambient temperature from−40 °C to +85°C 3. Applications n Broadband wireless systems n Digital radio links n Cellular base stations n Instrumentation n Cable modems n Cable Modem Termination System (CMTS)/Data Over Cable Service Interface Speciﬁcation (DOCSIS) DAC1003D160 Dual 10 bits DAC, up to 160 MHz, 2 x interpolation Rev. 02 — 13 August 2008 Product data sheet

72 IOUT

57 GAPD

60 IVIRES

59 QVIRES

6.1 Pinning

6.2 Pin description

Table 2. Pin description

DAC1003D160_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 13 August 2008 6 of 19 NXP Semiconductors DAC1003D160 Dual 10 bits DAC, up to 160 MHz, 2 x interpolation 7. Functional description The DAC1003D160 is a segmented architecture composed of a 7-bit thermometer sub-DAC and the remaining 3-bit in a binary weighted sub-DAC. The device produces two complementary current outputs on both channels, respectively pins IOUT/IOUTN and QOUT/QOUTN which need to be connected via a load resistor to the ground. Figure3 shows the equivalent analog output circuit of one DAC, which consists of a parallel combination of PMOS current sources and associated switches for each segment. The cascade source conﬁguration enables the increase of the output impedance of the source and the improvement of the dynamic performance of the DAC by introducing less distortion. Figure4 shows the internal reference conﬁguration. In this case the bias current is given by the output of the internal regulator connected to the inverting input of the internal operational ampliﬁers, while external resistors R I and RQ are connected respectively to pins IVIRES and QVIRES. Thus the output current of the two DACs is typically ﬁxed to 20 mA with an appropriate choice of these resistors. This conﬁguration is optimal for temperature drift compensation because the band gap can be matched with the voltage on the feedback resistors. The relation between full-scale output current I O(fs) and the RI (RQ ) is: The output current can also be adjusted by imposing an external reference voltage to the inverting input pin GAPOUT and disabling the internal band gap with pin GAPD set to HIGH. At a voltage lower than 1.2 V the current can be set at values lower than 20 mA. The input references at pins IVIRES and QVIRES may also be driven by separate reference voltages to adjust independently the two DAC currents. R I

2048 V GAPOUT×

Fig 3. Equivalent analog output circuit Fig 4. Internal reference conﬁguration 014aaa537 AGND R L R L AGND IOUT/QOUT IOUTN/QOUTN DAC1003D160 014aaa538 QVIRES IVIRES GAPOUT AGND GAPD INTERNAL BAND GAP I DAC current sources array DAC1003D160 Q DAC current sources array R I R Q

DAC1003D160_2 © NXP B.V. 2008. All rights reserved. [1] All supplies are connected together. Table 3. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Table 4. Thermal characteristics Table 5. Characteristics Figure10; unless otherwise speciﬁed.

DAC1003D160_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 13 August 2008 10 of 19 NXP Semiconductors DAC1003D160 Dual 10 bits DAC, up to 160 MHz, 2 x interpolation Fig 5. Input timing diagram 014aaa534 Q0 to Q9 tsu(i) th(i) CLKN CLK IOUT/IOUTN, QOUT/QOUTN 50 % I0 to I9,

DAC1003D160_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 13 August 2008 12 of 19 NXP Semiconductors DAC1003D160 Dual 10 bits DAC, up to 160 MHz, 2 x interpolation 11. Application information Fig 8. Single-ended clock schematic Fig 9. Differential clock schematic 014aaa539 1 kW 100 nF Vth 1 kW AGND CLKN VCCA CLK DAC1003D160 R s 014aaa540 1 kW 100 nF 1 kW CLKN VCCA AGND AGND AGND CLK DAC1003D160 1 kW 1 kW 100 nF 100 nF

DAC1003D160_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 13 August 2008 13 of 19 NXP Semiconductors DAC1003D160 Dual 10 bits DAC, up to 160 MHz, 2 x interpolation All resistors are 1 % precision resistors. C = 100 nF . Fig 10. Application diagram C DAC1003D160 VCCA IVIRES i.c. QVIRES VCCA GAPOUT AGND GAPD CLK DGND CLKN DGND AGND DGND AGND 3.3 V AGND 3.3 V AGND DGND 3.3 V DGND DGND DGND DGND DGND 3.3 V DGND DGND i.c. DGND DGND DGND VCCD VCCD I9 DGND I8 DGND I7 n.c. I6 n.c. I5 n.c. I4 n.c. DGND DGND DEC DEC I3 Q0 I2 Q1 I1 VCCA I0 AGND n.c. DEC n.c. AGND DGND VCCA DEC AGND n.c. AGND n.c. IOUT DGND IOUTN DGND AGND Q9 AGND Q8 QOUT Q7 QOUTN Q6 AGND DGND DEC AGND VCCA Q5 AGND Q4 DEC Q3 AGND Q2 VCCA 014aaa541 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 C C C C C 1.5 kW 1.5 kW C C C AGND AGND AGND AGND AGNDAGNDAGND 3.3 V 3.3 V 3.3 V 3.3 V CCC C CC C 50 W 50 W (RLOAD) 50 W AGND AGND C 50 W 50 W (RLOAD) 50 W AGND AGND AGND AGND 1:1 1:1

11.1 Alternative parts

Table 8. Alternative parts

DAC1003D160_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 13 August 2008 15 of 19 NXP Semiconductors DAC1003D160 Dual 10 bits DAC, up to 160 MHz, 2 x interpolation 12. Package outline Fig 11. Package outline SOT841-1 (HTQFP80) REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA SOT841-1 MS-026 SOT841-1 04-01-15 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included UNIT A max mm 1.2 0.15 0.05 1.05 0.95 0.27 0.17 0.20 0.09 12.1 11.9 12.1 11.9 14.15 13.85 14.15 13.85 0.75 0.45 1.45 1.05 1.45 1.05 A 1 DIMENSIONS (mm are the original dimensions) HTQFP80: plastic thermal enhanced thin quad flat package; 80 leads; body 12 x 12 x 1 mm; exposed die pad 80 21 61 40 12 0 60 41 bp bp D H D EH E B AD h Eh y ZD ZE e e w M w M pin 1 index vBM vAM c exposed die pad X θ A Lp detail X L (A3)A 2 A 1 0 5 10 mm scale A 2 A 3 0.25 bp c D (1) E (1) e 0.5 H D 6.05 5.95 D h 6.05 5.95 E h H E L Lp v 0.2 w 0.08 y 0.1 ZD (1) ZE(1) θ

14.1 Static parameters

output value between successive DAC codes. line (linear regression computation).

14.2 Dynamic parameters

(harmonic and non-harmonic, excluding DC component) in the frequency domain. wave to the RMS value of the noise excluding the harmonics and the DC component. THD is done on the ﬁrst 5 harmonics. Table 9. Abbreviations

Added condition to ts inTable5.
Correction toFigure10. DAC1003D160_1 20080612 Product data sheet - -

DAC1003D160_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 13 August 2008 18 of 19 NXP Semiconductors DAC1003D160 Dual 10 bits DAC, up to 160 MHz, 2 x interpolation 16. Legal information

16.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Deﬁnitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.

16.2 Deﬁnitions

Draft —The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modiﬁcations or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet —A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales ofﬁce. In case of any inconsistency or conﬂict with the short data sheet, the full data sheet shall prevail.

16.3 Disclaimers

General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes —NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation speciﬁcations and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use —NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications —Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the speciﬁed use without further testing or modiﬁcation. Limiting values —Stress above one or more limiting values (as deﬁned in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale —NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/proﬁle/terms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conﬂict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license —Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.

16.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 17. Contact information For more information, please visit:http://www.nxp.com For sales ofﬁce addresses, please send an email to:salesaddresses@nxp.com Document status[1][2] Product status[3] Deﬁnition Objective [short] data sheet Development This document contains data from the objective speciﬁcation for product development. Preliminary [short] data sheet Qualiﬁcation This document contains data from the preliminary speciﬁcation. Product [short] data sheet Production This document contains the product speciﬁcation.

NXP Semiconductors DAC1003D160 Dual 10 bits DAC, up to 160 MHz, 2 x interpolation © NXP B.V. 2008. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 13 August 2008 Document identifier: DAC1003D160_2 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. 18. Contents

Product Information

DAC1003D160 specifications and overview.

Summary

Dual 10 bits DAC, up to 160 MHz, 2 x interpolation Rev. 02-13 August 2008

Description

Dual 10 bits DAC, up to 160 MHz, 2 x interpolation Rev. 02-13 August 2008

Source title DAC1003D160 Datasheet(PDF) - NXP Semiconductors

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