DAC0800LCM/NOPB.B

DAC0802 TI | Alldatasheet

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DAC0800,DAC0802 www.ti.com SNAS538C –JUNE 1999–REVISED FEBRUARY 2013 DAC0800/DAC08028-BitDigital-to-AnalogConverters Check forSamples: DAC0800 ,DAC0802 1FEATURES DESCRIPTION The DAC0800 seriesare monolithic8-bithigh-speed 2• FastSettlingOutput Current:100 ns current-outputdigital-to-analogconverters (DAC)• FullScaleError:±1 LSB featuringtypicalsettlingtimesof100 ns.When used

• NonlinearityOver Temperature:±0.1% as a multiplyingDAC, monotonicperformanceovera 40 to 1 referencecurrentrange is possible.The• FullScaleCurrentDrift:±10 ppm/ °C DAC0800 series also featureshigh compliance• High Output Compliance: −10V to+18V complementary currentoutputsto allowdifferential
• Complementary CurrentOutputs outputvoltagesof20 Vp-p withsimpleresistorloads. The reference-to-full-scalecurrentmatchingofbetter• InterfaceDirectlywithTTL, CMOS, PMOS and than±1 LSB eliminatestheneed forfull-scaletrimsinOthers most applications,whilethe nonlinearitiesof better• 2 Quadrant Wide Range MultiplyingCapability than±0.1% overtemperatureminimizessystem error
• Wide Power Supply Range: ±4.5Vto±18V accumulations.
• Low Power Consumption: 33 mW at±5V The noiseimmune inputswillaccepta varietyoflogic
• Low Cost levels.The performanceand characteristicsof the deviceare essentiallyunchanged over the ±4.5V to ±18V power supplyrange and power consumptionat only33 mW with±5V suppliesisindependentoflogic inputlevels. The DAC0800, DAC0802, DAC0800C and DAC0802C are a directreplacementfortheDAC-08, DAC-08A, DAC-08C, and DAC-08H, respectively.For singlesupplyoperation,refertoAN-1525. TypicalApplication Pinnumbers representthePDIP package.The SOIC package pinnumbers differfromthatofthePDIP package. Figure1. ±20 VP-P Output Digital-to-AnalogConverter These deviceshave limitedbuilt-inESD protection.The leadsshouldbe shortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamage totheMOS gates. Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsof Texas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2Alltrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 1999–2013,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.

DAC0800,DAC0802 SNAS538C –JUNE 1999–REVISED FEBRUARY 2013 www.ti.com AbsoluteMaximum Ratings (1) SupplyVoltage(V+ − V−) ±18V or36V Power Dissipation(2) 500 mW ReferenceInputDifferentialVoltage (V14 toV15) V− toV+ ReferenceInputCommon-Mode Range (V14,V15) V− toV+ ReferenceInputCurrent 5 mA LogicInputs V− toV− plus36V AnalogCurrentOutputs (VS− = −15V) 4.25mA ESD Susceptibility(3) TBD V StorageTemperature −65°C to+150°C Lead Temp. (Soldering,10 seconds) SurfaceMount Package Vapor Phase (60seconds) 215°C Infrared(15seconds) 220°C (1) AbsoluteMaximum Ratingsindicatelimitsbeyond whichdamage tothedevicemay occur.DC and AC electricalspecificationsdo not applywhen operatingthedevicebeyond itsspecifiedoperatingconditions. (2) The maximum junctiontemperatureoftheDAC0800 and DAC0802 is125°C. Foroperatingatelevatedtemperatures,devicesinthe CDIP package must be deratedbased on a thermalresistanceof100°C/W, junction-to-ambient,175°C/W forthemolded PDIP package and 100°C/W fortheSOIC package. (3) Human body model,100 pF dischargedthrougha 1.5kΩ resistor. OperatingConditions(1) Min Max Units Temperature(TA) DAC0800L −55 +125 °C DAC0800LC 0 +70 °C DAC0802LC 0 +70 °C V− −15 −5 V IREF (V− = −5V) 1 2 mA IREF (V− = −15V) 1 4 mA (1) AbsoluteMaximum Ratingsindicatelimitsbeyond whichdamage tothedevicemay occur.DC and AC electricalspecificationsdo not applywhen operatingthedevicebeyond itsspecifiedoperatingconditions.

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DAC0800,DAC0802 www.ti.com SNAS538C –JUNE 1999–REVISED FEBRUARY 2013 ElectricalCharacteristics The followingspecificationsapplyforVS = ±15V,IREF = 2 mA and TMIN ≤ TA ≤ TMAX unlessotherwisespecified.Output characteristicsrefertobothIOUT and IOUT . DAC0800L/DAC0802LC DAC0800LCParameter TestConditions Units Min Typ Max Min Typ Max Resolution 8 8 8 8 8 8 Bits Monotonicity 8 8 8 8 8 8 Bits Nonlinearity ±0.1 ±0.19 %FS To ±½ LSB, AllBitsSwitched“ON ” 100 135 nsor“OFF ”,TA=25°C ts SettlingTime DAC0800L 100 135 ns DAC0800LC 100 150 ns tPLH , PropagationDelay TA=25°C tPHL Each Bit 35 60 35 60 ns AllBitsSwitched 35 60 35 60 ns TCIFS FullScaleTempco ±10 ±50 ±10 ±50 ppm/°C FullScaleCurrentChange <½VOC OutputVoltageCompliance −10 18 −10 18 VLSB, R OUT >20 M Ω,Typical VREF = 10.000V, TA=25°C IFSS FullScaleSymmetry IFS4 −IFS2 ±0.5 ±4.0 ±1 ±8.0 μA IZS ZeroScaleCurrent 0.1 1.0 0.2 2.0 μA LogicInputLevels VLC = 0V VIL Logic“0” 0.8 0.8 V VIH Logic“1” 2.0 2.0 V LogicInputCurrent VLC = 0V IIL Logic“0” −10V ≤ VIN ≤ +0.8V −2.0 −10 −2.0 −10 μA IIH Logic“1” 2V ≤ VIN ≤ +18V 0.002 10 0.002 10 μA VIS LogicInputSwing V− = −15V −10 18 −10 18 V VTHR LogicThresholdRange VS = ±15V −10 13.5 −10 13.5 V I15 ReferenceBiasCurrent −1.0 −3.0 −1.0 −3.0 μA dl/dt ReferenceInputSlew Rate (Figure26) 4.0 8.0 4.0 8.0 mA/μs I+ 2.3 3.8 2.3 3.8 mA Power SupplyCurrent VS = ±5V,IREF = 1 mA I+ 2.4 3.8 2.4 3.8 mA Power SupplyCurrent VS = +5V, −15V,IREF = 2 mA I+ 2.5 3.8 2.5 3.8 mA Power SupplyCurrent VS = ±15V,IREF = 2 mA ±5V,IREF = 1 mA 33 48 33 48 mW PD Power Consumption +5V, −15V,IREF = 2 mA 108 136 108 136 mW ±15V,IREF = 2 mA 135 174 135 174 mW Copyright© 1999–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:DAC0800 DAC0802

DAC0800,DAC0802 SNAS538C –JUNE 1999–REVISED FEBRUARY 2013 www.ti.com Connection Diagrams Figure2. PDIP,CDIP Packages -Top View Figure3. SOIC Package -Top View (See Package Number NFG0016E or NFE0016A) (See Package Number D0016A) Block Diagram Pinnumbers representthePDIP package.The SOIC package pinnumbers differfromthatofthePDIP package. Figure4.

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DAC0800,DAC0802 www.ti.com SNAS538C –JUNE 1999–REVISED FEBRUARY 2013 TypicalPerformance Characteristics FullScaleCurrent LSB PropagationDelay vs. vs. ReferenceCurrent IFS Figure5. Figure6. ReferenceInput ReferenceAmp Frequency Response Common-Mode Range Curve 1:C C =15 pF,VIN=2 Vp-p centeredat1V. Note.Positivecommon-mode rangeisalways(V+)− 1.5V. Curve 2:C C =15 pF,VIN=50 mVp-p centeredat200 mV. Curve 3:C C =0 pF,VIN=100 mVp-p centeredat0V and applied through50Ω connectedtopin14.2VappliedtoR14. Figure7. Figure8. VTH — VLC Logic InputCurrentvs. vs. InputVoltage Temperature Figure9. Figure10. Copyright© 1999–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:DAC0800 DAC0802

DAC0800,DAC0802 SNAS538C –JUNE 1999–REVISED FEBRUARY 2013 www.ti.com TypicalPerformance Characteristics(continued) Output Current vs. Output Voltage(OutputVoltage Output VoltageCompliance vs. Compliance) Temperature Figure11. Figure12. BitTransfer Power Supply Current Characteristics vs.+V Note.B1–B8 have identicaltransfercharacteristics.Bitsarefully switchedwithlessthan½ LSB error,atlessthan±100 mV fromactual threshold.These switchingpointsareguaranteedtoliebetween 0.8 and 2V overtheoperatingtemperaturerange(VLC = 0V). Figure13. Figure14. Power Supply Current Power Supply Current vs.−V vs.Temperature Figure15. Figure16.

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DAC0800,DAC0802 www.ti.com SNAS538C –JUNE 1999–REVISED FEBRUARY 2013 EQUIVALENT CIRCUIT Figure17. EquivalentCircuit Copyright© 1999–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:DAC0800 DAC0802

DAC0800,DAC0802 SNAS538C –JUNE 1999–REVISED FEBRUARY 2013 www.ti.com TYPICAL APPLICATIONS Pinnumbers representthePDIP package.The SOIC package pinnumbers differfromthatofthePDIP package. IO + IO = IFS foralllogicstates Forfixedreference,TTL operation,typicalvaluesare: VREF = 10.000V R REF = 5.000k R15 ≈ R REF C C = 0.01μF VLC = 0V (Ground) Figure18. Basic PositiveReferenceOperation Figure19.Recommended FullScaleAdjustment Figure20.Basic NegativeReferenceOperation Circuit Pinnumbers representthePDIP package.The SOIC package pinnumbers differfromthatofthePDIP package.

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DAC0800,DAC0802 www.ti.com SNAS538C –JUNE 1999–REVISED FEBRUARY 2013 Pinnumbers representthePDIP package.The SOIC package pinnumbers differfromthatofthePDIP package. Figure21. Basic UnipolarNegativeOperation Table1.Basic UnipolarNegativeOperation B1 B2 B3 B4 B5 B6 B7 B8 IO mA IO mA EO EO FullScale 1 1 1 1 1 1 1 1 1.992 0.000 −9.960 0.000 FullScale−LSB 1 1 1 1 1 1 1 0 1.984 0.008 −9.920 −0.040 HalfScale+LSB 1 0 0 0 0 0 0 1 1.008 0.984 −5.040 −4.920 HalfScale 1 0 0 0 0 0 0 0 1.000 0.992 −5.000 −4.960 HalfScale−LSB 0 1 1 1 1 1 1 1 0.992 1.000 −4.960 −5.000 ZeroScale+LSB 0 0 0 0 0 0 0 1 0.008 1.984 −0.040 −9.920 ZeroScale 0 0 0 0 0 0 0 0 0.000 1.992 0.000 −9.960 Pinnumbers representthePDIP package.The SOIC package pinnumbers differfromthatofthePDIP package. Figure22. Basic BipolarOutput Operation Table2.Basic BipolarOutput Operation B1 B2 B3 B4 B5 B6 B7 B8 EO EO Pos.FullScale 1 1 1 1 1 1 1 1 −9.920 +10.000 Pos.FullScale−LSB 1 1 1 1 1 1 1 0 −9.840 +9.920 ZeroScale+LSB 1 0 0 0 0 0 0 1 −0.080 +0.160 ZeroScale 1 0 0 0 0 0 0 0 0.000 +0.080 ZeroScale−LSB 0 1 1 1 1 1 1 1 +0.080 0.000 Neg. FullScale+LSB 0 0 0 0 0 0 0 1 +9.920 −9.840 Neg. FullScale 0 0 0 0 0 0 0 0 +10.000 −9.920 Copyright© 1999–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:DAC0800 DAC0802

DAC0800,DAC0802 SNAS538C –JUNE 1999–REVISED FEBRUARY 2013 www.ti.com (1) Pinnumbers representthePDIP package.The SOIC package pinnumbers differfromthatofthePDIP package. (2) IfR L = R L within±0.05%,outputissymmetricalaboutground. Figure23. SymmetricalOffsetBinaryOperation Table3.SymmetricalOffsetBinaryOperation B1 B2 B3 B4 B5 B6 B7 B8 EO Pos.FullScale 1 1 1 1 1 1 1 1 +9.960 Pos.FullScale−LSB 1 1 1 1 1 1 1 0 +9.880 (+)ZeroScale 1 0 0 0 0 0 0 0 +0.040 (−)ZeroScale 0 1 1 1 1 1 1 1 −0.040 Neg. FullScale+LSB 0 0 0 0 0 0 0 1 −9.880 Neg. FullScale 0 0 0 0 0 0 0 0 −9.960 (1) Pinnumbers representthePDIP package.The SOIC package pinnumbers differfromthatofthePDIP package. (2) For complementaryoutput(operationas negativelogicDAC), connectinvertinginputofop amp toIO (pin2),connect IO (pin4)toground. Figure24. PositiveLow Impedance Output Operation (1) Pinnumbers representthePDIP package.The SOIC package pinnumbers differfromthatofthePDIP package. (2) For complementaryoutput(operationas a negativelogicDAC) connectnon-invertinginputof op am to IO (pin2); connectIO (pin4)toground. Figure25. NegativeLow Impedance Output Operation

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DAC0800,DAC0802 www.ti.com SNAS538C –JUNE 1999–REVISED FEBRUARY 2013 Typicalvalues:R IN=5k,+VIN=10V Pinnumbers representthePDIP package.The SOIC package pinnumbers differfromthatofthePDIP package. Figure26. Pulsed ReferenceOperation VTH = VLC + 1.4V 15V CMOS, HTL, HNIL VTH = 7.6V Note.Do notexceed negativelogicinputrangeofDAC. Figure27. InterfacingwithVariousLogic Families (a)IREF ≥ peak negativeswing ofIIN (b)+VREF must be above peak positiveswing ofVIN Pinnumbers representthePDIP package.The SOIC package pinnumbers differfromthatofthePDIP package. Figure28. Accommodating BipolarReferences Copyright© 1999–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:DAC0800 DAC0802

DAC0800,DAC0802 SNAS538C –JUNE 1999–REVISED FEBRUARY 2013 www.ti.com Pinnumbers representthePDIP package.The SOIC package pinnumbers differfromthatofthePDIP package. Figure29. SettlingTime Measurement (1) For 1 μs conversiontimewith8-bitresolutionand 7-bitaccuracy,an LM361 comparatorreplacestheLM319 and the referencecurrentisdoubledby reducingR1, R2 and R3 to2.5kΩ and R4 to2 M Ω. (2) Pinnumbers representthePDIP package.The SOIC package pinnumbers differfromthatofthePDIP package. Figure30. A Complete 2 μs Conversion Time,8-BitA/D Converter

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DAC0800,DAC0802 www.ti.com SNAS538C –JUNE 1999–REVISED FEBRUARY 2013

REVISION HISTORY

Changes from RevisionB (February2013)toRevisionC Page Copyright© 1999–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:DAC0800 DAC0802

www.ti.com 23-May-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) DAC0800LCM/NOPB Active Production SOIC (D) | 16 48 | TUBE Yes SN Level-1-260C-UNLIM 0 to 70 DAC0800LCM DAC0800LCM/NOPB.B Active Production SOIC (D) | 16 48 | TUBE Yes SN Level-1-260C-UNLIM 0 to 70 DAC0800LCM DAC0800LCMX/NOPB Active Production SOIC (D) | 16 2500 | LARGE T&R Yes SN Level-1-260C-UNLIM 0 to 70 DAC0800LCM DAC0800LCMX/NOPB.B Active Production SOIC (D) | 16 2500 | LARGE T&R Yes SN Level-1-260C-UNLIM 0 to 70 DAC0800LCM DAC0800LCN/NOPB Active Production PDIP (NFG) | 16 25 | TUBE Yes SN Level-1-NA-UNLIM 0 to 70 DAC0800LCN DAC-08EP DAC0800LCN/NOPB.B Active Production PDIP (NFG) | 16 25 | TUBE Yes SN Level-1-NA-UNLIM 0 to 70 DAC0800LCN DAC-08EP DAC0802LCMX/NOPB Active Production SOIC (D) | 16 2500 | LARGE T&R Yes SN Level-1-260C-UNLIM 0 to 70 DAC0802LCM DAC0802LCMX/NOPB.B Active Production SOIC (D) | 16 2500 | LARGE T&R Yes SN Level-1-260C-UNLIM 0 to 70 DAC0802LCM (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative Addendum-Page 1

www.ti.com 23-May-2025 and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DAC0800LCMX/NOPB SOIC D 16 2500 367.0 367.0 35.0 DAC0802LCMX/NOPB SOIC D 16 2500 356.0 356.0 35.0 Pack Materials-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TUBE L - Tube length T - Tube height W - Tube width B - Alignment groove width *All dimensions are nominal Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) DAC0800LCM/NOPB D SOIC 16 48 495 8 4064 3.05 DAC0800LCM/NOPB.B D SOIC 16 48 495 8 4064 3.05 DAC0800LCN/NOPB NFG PDIP 16 25 502 14 11938 4.32 DAC0800LCN/NOPB.B NFG PDIP 16 25 502 14 11938 4.32 Pack Materials-Page 3

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