DAC0800LCM

DAC0800_51 NSC | Alldatasheet

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Technical content

rent matching of better than 1 LSB eliminates the need for inearity pera . FIGURE 1. £20 Vp.p Output Digital-te-Analog Converter (Note 4) 4 | “Devices may be ordered by using either order number.

NATL SEMICOND (LINEAR) 22— D Mm™™ 6501124 0069670 9 a T-51-09-10 Absolute Maximum Ratings (note 1) If Military/Aerospace specified devices are required, Lead Temp. (Soldering, 10 seconds) | please contact the National Semiconductor Sales Dual-In-Line Package (plastic) 260°C | _ Office/Distributors for availability and specifications. Dual-In-Line Package (ceramic) 300°C Supply Voltage (V+ — V-) £18V or 36V ‘Surface Mount Package Power Dissipation (Note 2) 500 mW Vapor mhaae (ep accor) Bad | Reterence input Ditferential Voltage rared (16 seconds) a 14 to V15) V-tov+ S| ndterence input Common-Mode Range Operating Conditions (note 1) (14, V18) V-tov+ Min = Max Unite Reference Input Current 5mA Temperature (Ta) Z| Logic inputs V- toV- plus 36V DACosO2L 85 (+125 ey | Analog Current Outputs (Vs~ = —15V) 4.25 mA DACOBOOL. 85 +125 ce ESD Susceptibility (Note 3) TeDV DACaB0oLC ° +70 <c Storage Temperature 65°C to + 160°C DACOBO1LC ° +70 “<c DACoBO2LC 0 +70 °C Electrical Characteristics the following specitications apply forVg = + 15V, Iner = 2mAand Twin < Ta S$ Twax unless otherwise specified, Output characteristics refer to both lout and toe DACOSO2L/ ‘DACOBOOL/ syn [ame |__| ats [tts mewn vote Fresolito ie y+eye;sey eye, 8 8 |e i UU GeGEEE Nonlinear £0.19 £0.99] %FS ry To = % LSB, AllBits Switched 400 ns MON" of "OFF", Ta= 25°C IDACOBOOL 100 } 136 ns DACOBOOLC. 400 | 160 ns ii Ee w— 3 | | lelel | A {PHL Each Bit 60 60 60 ns AILBits Switched 60 60 60 | ns Toes [FullScalo Tempco |_| | #10{sso[ | s1o | sso| | +10] £60 [ppm a ee <%4LS8, Rout> 20 M0 Typ a a a a a Wa a a F1=6.000 kA, Ta= 26°C Tess [FulSeaio Srmmety —lirsales2 =~! ~~ 208 [ao] | et [oo] | 2 | 216] ig [zero Scalecuren | | |o1lrol [o2taol {oz | 40] ya rafter (Es Bn fee El aU V-= -8V to —18V 42 mA Logic input Levels Vin Logic “0” Vic 0V v Vin Logic "1" Vv Logie Input Current Vio=0v te Logic “0” —10V<Vin< +0,8V =20 2.0 -20| -10] pA ig Logio "1" av<Vvs +18V 0.002 0,002 0.002] 10 Vis [WesicinputSwingv-=-1v 10] te [volt [vol te TV Vin [Logic Threshoid Range |Ve=ziev_ + -10| _ |ia6[-so]_ | 135 |-tof | va6 |v lig [Reference BiesGurent_| |__| -10[-aol__[=10|-s0] | -10] -a0| ‘a/at |Rotorence inputSiow Rate |(Fiueta | 4o[eo| [aol eo | [ao] eo | [may PSSIpgz|Power Supply Sonsitviy |4svev+=tev | __|o.000| 00x|[o.oooi| oor |” [o.oooi| 0.01 | 4/2 = Fl lO ll pep=imA Power Supply Current |Vs= £8V,Iner= 1 mA 1+ 38 38 mA I- -53 -58 mA Vs=6V, ~18V, Iner=2mA I+ 24 | 98 38 24 | 38 | mA Ve= £16V, laer=2 mA I+ 38 38 38 mA i -78 -78 =78|_mA 4.22

NATL SEMICOND (LINEAR) 2@2— D MM 6501124 0069671 0 mm -51-09-. > Electrical Characteristics (continuec) T-51-09-10 The following specifications apply for Vg = +1V, Inez = 2mA and Tain < Ta < TMax unless otherwise specified. Output characteristics refer to both lour and Tour. a es ‘Symbol DACOB02LC DACO800LC Units | > Po Power Dissipation | £6V, Inee= 1 mA. aa | 48 a3 | 48 mw |S BV, —15V, Inee=2mA 108 | 136 jos | 136 mW | 216V, Inge=2 mA 135 | 174 135 | 174 mW |G ‘Note 13 Absolute Maximum Ratings indicato limits beyond which damage to the device may occur, DC and AC electrical specifications do not apply when operating =| > the device beyond its specified operating conditions, ‘Note 2: The maximum Junction temperature of the DAC0800, DACO801 and DACO802 Is 125°C. For operating at elevated temperatures, devices In the Oual-in-Line Z J package must be derated based on a thermal resistance of 100°C/W, |unction-to-ambient, 175°C/W for the molded Dual-In-Line N package and 100°C/W for the ‘Small Outline M package. Hote 3: Human body model, 100 pF dacharged though a 1.8 kn resistor Note 4: Pin-out numbers for the DACO8OX represent tho Dual-In-Line package. The Small Outine package pin-out differs trom the Dual-in-Line package, Connection Diagrams Dual-in-Line Package ‘Smail Outline Package ay, commie S comrensarion vas 16 FB LSB wie tS Veer) Veer) 42 13-8, ye veer VreX-)— 3 14g

4 A COMPENSATION 4 138,

‘our wt 5 A 2 THRESHOLD CONTROL, Vip —4 5 12)—8, wot an wade es @ a7 vo? 10;—B) at on tour 48 ofa, use ut 5 TUHrE68e—14 TUH/S686~19 Top View Top View See Ordering Information Block Diagram (note 4) Py w CTA (A FN CD CC CO CS TOC J | EE PE PS PE egour sD Lh Th Sh OE SN nest M4 ™ PACT LLL g ‘TLH/5686-2 4-23

NATL SEMICOND (LINEAR) 22— D M@™@ 6501124 00b5b72 2 mm a : Typical Performance Characteristics T-51-09-10 Ss Full Scate Current Reference Input = vs Reference Current oa LSB Propagation Delay Vs Irg e Frequency Response « Farrage ae So 1a fe aise om matt FN aire 2S COC TT gt fate fC aus Coen col Eigse Pad =< Cor PS = i) f=] ‘ Eee a Zw AS A E H Een —E A s ja E A CoocoAteer) ™ Herat 3 Eo SO >of ae Hatt . 7 a ON iri § CCAR I CNT TTT hsses ea] 3 EA S| & epee 2 CO Ty 3 CoN | a CEE + COLT 2 EH Sa oo, r aa cover emosom est 2 8 “aos rt ose ‘Curve 1: Co=15 pF, Vin=2 Vp-p : contered at 1V. | Curve 2 Co= 15 pF, Vin 60 mVp-p contered at 200 mV. Curve 3: Co=0 pF, Vin= 100 m¥p-p ‘at OV and applied through 50 11 con- nected fo pn 14.2V appt to R14. Reference Amp Logic Input Current | ‘ ‘Common-Mode Range ve Input Voltage 2s Nu Vig ve Temperetare | shetty A Bee | Pere Perec UOT 2 EEE EEE a CO 3 BREE pg A a 2 4 CRSSecr rere 2 pee CTT 7 FCEPBAE oe maa | Tec : PS Pececoe =p UF ee i. -._—s AEREEVAEROOEL 8 EEE

2 TT ingen + eee

0 a cc LOO @ EERE t+ er) “tate “sa aa-84-202 CCU TNTTIE TE rr a a) ‘VIS ~ REFERENCE COMMON-MODE VOLTAGE (VP ‘Vj — LOGIC INPUT VOLTAGE (V) ‘Ta — TEMPERATURE ('C) Not, Postive common-mode rango is aways (V+) — 1.8 Output Current vs Output Voltage (Output Voltage Output Voitage Compliance Bit Transfer Compliance) vs Temperature Characteristics u bad ieee 4 coo i "Tote hel TT) ge NSSF I Tie 5 oH temantoene | 1 | Ba Eee “ EA iz La es an Hy eee ieee a Let E ‘A en an & oo PH PRR Et orerceme ty] Bt cor ee : aan 8 “RANG pine 7 anny Saree oe EES » EOCCORE EEE errr rr a oe See weer rrr rT) Vo ~ouTPuT vaLTAGe Ta TEMPERATURE ED Vi ~oaic nrurvotrase (v TUMise00-3 Note, 81-B8 have Kdontca transtor charactors- tice. Bits. ‘switched with less than Yz LSB ores tino ta 00m etal sh old. These switching to he Scere wots fw boca ture range (Vic = 4-24

1 At] od ETH 1S

FIGURE 4. Recommended Full ~~“ Adjustment Circult FIGURE 5. Basic Negative Reference Operation (Note 4)

3 Typical Applications (continued) T-51-09-10

FIGURE 6. Basic Unipolar Negative Operation (Note 4) FIGURE 7. Basic Bipolar Output Operation (Note 4) FIGURE 8. Symmetrical Offset Binary Operation (Note 4)

3 Pe) |x (b) +Vpee must be above peak positive swing of Vin

FIGURE 13. Accommodating Bipolar References (Note 4) FIGURE 14. Settling Time Measurement (Note 4) TUNE

“ by reducing At, R2 and RS to 2.6 kf and Ré to 2 MA. FIGURE 15. A Complete 2 18 Conversion Time, &-Bit A/D Converter (Note 4)