STD1NC60 STMICROELECTRONICS | Alldatasheet
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Technical content
N-CHANNEL 600V - 7Ω - 1.4A - DPAK/IPAK PowerMesh™II MOSFET ■ TYPICAL R DS (on) = 7 Ω ■ EXTREMELY HIGH dv/dt CAPABILITY ■ 100% AVALANCHE TESTED ■ NEW HIGH VOLTAGE BENCHMARK ■ GATE CHARGE MINIMIZED
DESCRIPTION
The PowerMESH ™ II is the evolution of the first generation of MESH OVERLAY™. The layout re- finements introduced greatly improve the Ron*area figure of merit while keeping the device at the lead- ing edge for what concerns swithing speed, gate charge and ruggedness.
APPLICATIONS
■ HIGH CURRENT, HIGH SPEED SWITCHING ■ SWITH MODE POWER SUPPLIES (SMPS) ■ DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVER ABSOLUTE MAXIMUM RATINGS (•)Pulse width limited by safe operating area TYPE V DSS R DS(on) ID STD1NC60 600 V < 8 Ω 1.4 A Symbol Parameter Value Unit VDS Drain-source Voltage (VGS = 0) 600 V VDGR Drain-gate Voltage (RGS = 20 kΩ ) 600 V VGS Gate- source Voltage ±30 V ID Drain Current (continuos) at TC = 25°C 1.4 A ID Drain Current (continuos) at TC = 100°C 0.9 A IDM (1) Drain Current (pulsed) 5.6 A PTOT Total Dissipation at TC = 25°C 35 W Derating Factor 0.28 W/°C dv/dt Peak Diode Recovery voltage slope 3.5 V/ns Tstg Storage Temperature –65 to 150 °C Tj Max. Operating Junction Temperature 150 °C (1)ISD ≤1.4A, di/dt ≤100A/µs, VDD ≤ V(BR)DSS , Tj ≤ TJMAX IPAK DPAK TO-251 TO-252 INTERNAL SCHEMATIC DIAGRAM
ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF ON (1) DYNAMIC Rthj-case Thermal Resistance Junction-case Max 3.6 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 100 °C/W Rthj-sink Thermal Resistance case-sink Typ 1.5 °C/W Tl Maximum Lead Temperature For Soldering Purpose 275 °C Symbol Parameter Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) 1.4 A EAS Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR , VDD = 50 V) 70 mJ Symbol Parameter Test Conditions Min. Typ. Max. Unit V(BR)DSS Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 600 V IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating 1µ A VDS = Max Rating, TC = 125 °C 10 µA IGSS Gate-body Leakage Current (VDS = 0) VGS = ±30V ±100 nA Symbol Parameter Test Conditions Min. Typ. Max. Unit VGS(th) Gate Threshold Voltage VDS = VGS , ID = 250µA 234V R DS(on) Static Drain-source On Resistance VGS = 10V, ID = 0.7 A 78 Ω ID(on) On State Drain Current V DS > ID(on) x RDS(on)max, VGS =1 0 V 1.4 A Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs (1) Forward Transconductance V DS > ID(on) x RDS(on)max, ID = 0.7A 1.25 S C iss Input Capacitance VDS = 25V, f = 1 MHz, VGS = 0 160 pF C oss Output Capacitance 26 pF C rss Reverse Transfer Capacitance 3.8 pF
ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON SWITCHING OFF SOURCE DRAIN DIODE Note: 1.Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) Turn-on Delay Time V DD = 300V, ID = 0.7 A R G = 4.7Ω VGS = 10V (see test circuit, Figure 3) 8n s tr Rise Time 8 ns Q g Total Gate Charge VDD = 480V, ID = 1.4 A, VGS = 10V 8.5 11.5 nC Q gs Gate-Source Charge 2.8 nC Q gd Gate-Drain Charge 2.8 nC Symbol Parameter Test Conditions Min. Typ. Max. Unit tr(Voff) Off-voltage Rise Time VDD = 480V, ID = 1.4 A, R G =4 . 7Ω, VGS = 10V (see test circuit, Figure 5) 25 ns tf Fall Time 9 ns tc Cross-over Time 34 ns Symbol Parameter Test Conditions Min. Typ. Max. Unit ISD Source-drain Current 1.4 A ISDM (2) Source-drain Current (pulsed) 5.6 A VSD (1) Forward On Voltage ISD = 1.4 A, VGS = 0 1.6 V trr Reverse Recovery Time ISD = 1.4 A, di/dt = 100A/µs, VDD = 100V, Tj = 150°C (see test circuit, Figure 5) 500 ns Q rr Reverse Recovery Charge 950 nC IRRM Reverse Recovery Current 3.8 A Thermal ImpedanceSafe Operating Area
Gate Charge vs Gate-source Voltage Capacitance Variations Static Drain-source On Resistance Output Characteristics Transfer Characteristics
Source-drain Diode Forward Characteristics Normalized On Resistance vs TemperatureNormalized Gate Thereshold Voltage vs Temp.
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times Fig. 4: Gate Charge test Circuit Fig. 2: Unclamped Inductive WaveformFig. 1: Unclamped Inductive Load Test Circuit Fig. 3: Switching Times Test Circuit For Resistive Load
DIM. mm inch A 2.2 2.4 0.086 0.094 A1 0.9 1.1 0.035 0.043 A3 0.7 1.3 0.027 0.051 B 0.64 0.9 0.025 0.031 B2 5.2 5.4 0.204 0.212 B3 0.85 0.033 B5 0.3 0.012 B6 0.95 0.037 C 0.45 0.6 0.017 0.023 C2 0.48 0.6 0.019 0.023 D 6 6.2 0.236 0.244 E 6.4 6.6 0.252 0.260 G 4.4 4.6 0.173 0.181 H 15.9 16.3 0.626 0.641 L 9 9.4 0.354 0.370 L1 0.8 1.2 0.031 0.047 L2 0.8 1 0.031 0.039 A C H D LL2 1 3 = = B E G = = = = TO-251 (IPAK) MECHANICAL DATA 0068771-E
DIM. mm inch A 2.20 2.40 0.087 0.094 A1 0.90 1.10 0.035 0.043 A2 0.03 0.23 0.001 0.009 B 0.64 0.90 0.025 0.035 B2 5.20 5.40 0.204 0.213 C 0.45 0.60 0.018 0.024 C2 0.48 0.60 0.019 0.024 D 6.00 6.20 0.236 0.244 E 6.40 6.60 0.252 0.260 G 4.40 4.60 0.173 0.181 H 9.35 10.10 0.368 0.398 L2 0.8 0.031 L4 0.60 1.00 0.024 0.039 V2 0 o 8o 0o 0o P032P_B TO-252 (DPAK) MECHANICAL DATA
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