D1703L

STD1703L STMICROELECTRONICS | Alldatasheet

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Technical content

N-CHANNEL 30V - 0.038Ω - 17A - DPAK STripFET™ II MOSFET I TYPICAL R DS (on) = 0.038Ω I APPLICATION ORIENTED CHARACTERIZATION

DESCRIPTION

This MOSFET is the latest development of STMi- croelectronics unique “Single Feature Size™” strip-based process. The resulting transistor shows extremely high packing density for low on- resistance, rugged avalance characteristics and less critical alignment steps therefore a remark- able manufacturing reproducibility.

APPLICATIONS

ORDERING INFORMATION

TYPE V DSS R DS(on) ID STD1703L 30 V <0.05 Ω 17 A SALES TYPE MARKING PACKAGE PACKAGING STD1703LT4 D1703L DPAK TAPE & REEL DPAK INTERNAL SCHEMATIC DIAGRAM

(G ) Pulse width limited by safe operating area (1) ISD ≤17A, di/dt≤300A/µs, VDD ≤ V(BR)DSS ,Tj≤ TJMAX. (2) Starting Tj=25°C, ID =11A, VDD =15V THERMAL DATA ELECTRICAL CHARACTERISTICS (TCASE =2 5°C UNLESS OTHERWISE SPECIFIED) OFF ON (1) DYNAMIC Symbol Parameter Value Unit VDS Drain-source Voltage (VGS =0 ) 30 V VDGR Drain-gate Voltage (RGS =2 0kΩ ) 30 V VGS Gate- source Voltage ± 20 V ID Drain Current (continuous) at TC =2 5°C 17 A ID Drain Current (continuous) at TC = 100°C 12 A IDM (/circle6 ) Drain Current (pulsed) 68 A PTOT Total Dissipation at TC =2 5°C 20 W Derating Factor 0.13 W/ °C dv/dt (1) Peak Diode Recovery voltage slope 6 V/ns EAS (2) Single Pulse Avalanche Energy 200 mJ Tstg Storage Temperature –65 to 175 °C Tj Max. Operating Junction Temperature 175 °C Rthj-case Thermal Resistance Junction-case Max 7.5 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W Tl Maximum Lead Temperature For Soldering Purpose 275 °C Symbol Parameter Test Conditions Min. Typ. Max. Unit V(BR)DSS Drain-source Breakdown Voltage ID =2 5 0µ A ,VGS =0 30 V IDSS Zero Gate Voltage Drain Current (VGS =0 ) VDS =M a xR a t i n g 1µ A VDS =M a xR a t i n g ,TC = 125°C 10 µA IGSS Gate-body Leakage Current (VDS =0 ) VGS = ± 15V ±100 nA Symbol Parameter Test Conditions Min. Typ. Max. Unit VGS(th) Gate Threshold VoltageVDS =V GS ,ID =2 5 0 µ A 1V R DS(on) Static Drain-source On Resistance VGS = 10V, ID =8 . 5A 0.038 0.05 Ω VGS =5V ,ID =8 . 5A 0.045 0.06 Ω Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs(1) Forward Transconductance V DS >ID(on)xR DS(on)max, ID =11A C iss Input Capacitance VDS =2 5 V ,f =1M H z ,VGS =0 330 pF C oss Output Capacitance 90 pF C rss Reverse Transfer Capacitance 40 pF

ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON SWITCHING OFF SOURCE DRAIN DIODE Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) Turn-on Delay Time VDD =1 5 V ,ID =8 . 5 A R G =4 . 7Ω VGS =4 . 5 V (see test circuit, Figure 3) 11 ns tr Rise Time 100 ns Q g Q gs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD =2 4 V ,ID =1 7 A , VGS =1 0 V 6.5 3.6 9n C nC nC Symbol Parameter Test Conditions Min. Typ. Max. Unit td(off) tf Turn-off-Delay Time Fall Time VDD =1 5 V ,ID =8 . 5 A , R G =4 . 7Ω, VGS =4 . 5 V (see test circuit, Figure 3) ns ns tr(off) tf tc Off-voltage Rise Time Fall Time Cross-over Time Vclamp =24V, I D =17A R G =4 . 7Ω, VGS =4 . 5 V (see test circuit, Figure 5) ns ns ns Symbol Parameter Test Conditions Min. Typ. Max. Unit I SD Source-drain Current 17 A ISDM (1) Source-drain Current (pulsed) 68 A VSD (2) F o r w a r dO nV o l t a g eISD =1 7 A ,VGS =0 1.5 V trr Q rr IRRM Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD =1 7 A ,d i / d t=1 0 0 A / µ s , VDD =1 5 V ,Tj= 150°C (see test circuit, Figure 5) 1.2 ns nC A Safe Operating Area

Static Drain-source On Resistance Transfer Characteristics Transconductance Gate Charge vs Gate-source Voltage Capacitance Variations

Source-drain Diode Forward Characteristics Normalized Gate Thereshold Voltage vs Temp. Normalized On Resistance vs Temperature

Fig. 5:Test Circuit For Inductive Load Switching And Diode Recovery Times Fig. 4:Gate Charge test Circuit Fig. 2:Unclamped Inductive WaveformFig. 1:Unclamped Inductive Load Test Circuit Fig. 3:Switching Times Test Circuit For Resistive Load

DIM. mm inch A 2.20 2.40 0.087 0.094 A1 0.90 1.10 0.035 0.043 A2 0.03 0.23 0.001 0.009 B 0.64 0.90 0.025 0.035 B2 5.20 5.40 0.204 0.213 C 0.45 0.60 0.018 0.024 C2 0.48 0.60 0.019 0.024 D 6.00 6.20 0.236 0.244 E 6.40 6.60 0.252 0.260 G 4.40 4.60 0.173 0.181 H 9.35 10.10 0.368 0.398 L2 0.8 0.031 L4 0.60 1.00 0.024 0.039 V2 0 o 8o 0o 0o P032P_B TO-252 (DPAK) MECHANICAL DATA

DIM. mm. inch A 2.20 2.40 0.087 0.094 A1 0.00 0.127 0.00 0.005 B 1.350 1.650 0.053 0.065 b 0.50 0.70 0.020 0.028 b1 0.70 0.90 0.028 0.035 c 0.430 0.580 0.017 0.023 c1 0.430 0.580 0.017 0.023 D 6.350 6.650 0.250 0.262 D1 5.20 5.40 0.205 0.213 E 5.40 5.70 0.213 0.224 e2 . 3 0 0 . 0 9 1 e1 4.50 4.70 0.177 0.185 L 9.50 9.90 0.374 0.390 L1 2.550 2.900 0.10 0.114 L2 1.40 1.780 0.055 0.070 L3 0.35 0.65 0.014 0.026 V 3.80 REF 0.150 REF TO-252 (DPAK) MECHANICAL DATA

TO-252 (DPAK) MECHANICAL DATA

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