D16NE10L

STD16NE10L STMICROELECTRONICS | Alldatasheet

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Technical content

N - CHANNEL 100V - 0.07Ω - 16A DPAK STripFET POWER MOSFET PRELIMINARY DATA n TYPICAL RDS(on) = 0.07Ω n AVALANCHE RUGGED TECHNOLOGY n LOW GATE CHARGE n HIGH CURRENT CAPABILITY n 175 oC OPERATING TEMPERATURE n LOW THRESHOLD DRIVE n ADD SUFFIX ”T4” FOR ORDERING IN TAPE & REEL

DESCRIPTION

This Power MOSFET is the latest development of STMicroelectronics unique ”Single Feature Size ” strip-based process. The resulting transi- stor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a re- markable manufacturing reproducibility.

APPLICATIONS

n HIGH CURRENT, HIGH SPEED SWITCHING n SOLENOID AND RELAY DRIVERS n DC-DC & DC-AC CONVERTERS n AUTOMOTIVE ENVIRONMENT INTERNAL SCHEMATIC DIAGRAM May 2000 ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit V DS Drain-source Voltage (VGS = 0) 100 V V DGR Drain- gate Voltage (RGS =2 0k Ω ) 100 V VGS Gate-source Voltage ± 20 V ID Drain Current (continuous) at Tc =2 5 oC1 6 A ID Drain Current (continuous) at Tc = 100 oC1 1 A IDM (•) Drain Current (pulsed) 64 A P tot Total Dissipation at Tc =2 5 oC5 5 W Derating Factor 0.36 W/ oC dv/dt (1) Peak Diode Recovery voltage slope 7 V/ns Tstg Storage Temperature -65 to 175 oC Tj Max. Operating Junction Temperature 175 oC (•) Pulse width limited by safe operating area ( 1)ISD ≤16A, di/dt≤ 300 A/µs, VDD ≤ V(BR)DSS ,T j≤ TJMAX TYPE V DSS R DS(o n) ID STD16NE10L 100 V < 0.10 Ω 16 A DPAK TO-252 (Suffix ”T4”)

Thermal Resistance Junction-PC Board Max Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature For Soldering Purpose 2.73 100 1.5 275 oC/W oC/W oC/W oC AVALANCHE CHARACTERISTICS Symbol Parameter Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) 16 A E AS Single Pulse Avalanche Energy (starting Tj =2 5 oC, ID =I AR ,V DD =3 0V ) 75 mJ ELECTRICAL CHARACTERISTICS (Tcase =2 5oC unless otherwise specified) OFF Symbol Parameter Test Conditions Min. Typ. Max. Unit V (BR)DSS Drain-source Breakdown Voltage ID =2 5 0µ AV GS = 0 100 V IDSS Zero Gate Voltage Drain Current (VGS =0 ) V DS =M a xR a t i n g V DS =M a xR a t i n g T c = 125 oC µ A µ A IGSS Gate-body Leakage Current (VDS =0 ) V GS = ± 20 V ± 100 nA ON (∗) Symbol Parameter Test Conditions Min. Typ. Max. Unit V GS(th) Gate Threshold Voltage VDS =V GS ID = 250 µ A1 1 . 7 2 . 5 V R DS(on) Static Drain-source On Resistance V GS =1 0V I D =8A V GS =5V I D =8A 0.07 0.085 0.085 0.1 Ω Ω ID(on) On State Drain Current VDS >I D(on) xR DS(on )max V GS =1 0V 16 A DYNAMIC Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs (∗)F o r w a r d Transconductance V DS >I D(on) xR DS(on )max ID =8A 5 9 S C iss C oss C rss Input Capacitance Output Capacitance Reverse Transfer Capacitance V DS =2 5V f=1M H z V GS = 0 V 1750 165 pF pF pF STD16NE10L

ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Delay Time Rise Time V DD =5 0V I D =8A R G =4 . 7 Ω V GS =4 . 5V (Resistive Load, see fig. 3) ns ns Q g Q gs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge V DD =8 0V I D =1 6A V GS =5V 2 4 5.5 32 nC nC nC SWITCHING OFF Symbol Parameter Test Conditions Min. Typ. Max. Unit td(off) tf Turn-off Delay Time Fall Time V DD =5 0V I D =8A R G =4 . 7 Ω V GS =4 . 5V (Resistive Load, see fig. 3) ns ns tr(Voff) tf tc Off-voltage Rise Time Fall Time Cross-over Time V DD =8 0V I D =1 6A R G =4 . 7 Ω V GS =4 . 5V (Inductive Load, see fig. 5) ns ns ns SOURCE DRAIN DIODE Symbol Parameter Test Conditions Min. Typ. Max. Unit ISD ISDM (•) Source-drain Current Source-drain Current (pulsed) A A V SD (∗)F o r w a r d O n V o l t a g e ISD =1 6A V GS =0 1 . 5 V trr Q rr IRRM Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 16 A di/dt = 100 A/ µ s V DD =4 0V T j =1 5 0oC (see test circuit, fig. 5) 100 300 ns nC A (∗) Pulsed: Pulse duration = 300µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area STD16NE10L

Fig. 1: Unclamped Inductive Load Test Circuit Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 2: Unclamped Inductive Waveform Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times STD16NE10L

DIM. mm inch A 2.2 2.4 0.086 0.094 A1 0.9 1.1 0.035 0.043 A2 0.03 0.23 0.001 0.009 B 0.64 0.9 0.025 0.035 B2 5.2 5.4 0.204 0.212 C 0.45 0.6 0.017 0.023 C2 0.48 0.6 0.019 0.023 D 6 6.2 0.236 0.244 E 6.4 6.6 0.252 0.260 G 4.4 4.6 0.173 0.181 H 9.35 10.1 0.368 0.397 L2 0.8 0.031 L4 0.6 1 0.023 0.039 DL2 B E G A C H A1DETAIL ”A” DETAIL ”A” TO-252 (DPAK) MECHANICAL DATA 0068772-B STD16NE10L

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequence s of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics  2000 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com STD16NE10L