CX74001 SKYWORKS | Alldatasheet
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Data Sheet Skyworks Doc. No. 101134A Proprietary Information and Specifications are Subject to Change March 5, 2002 CX74001 Rx ASIC for CDMA, AMPS, and PCS Applications The CX74001 Application-Specific Integrated Circuit (ASIC) is a triple-mode, dual- band receiver (Rx) intended for use in Code Division Multiple Access (CDMA) portable phones in both cellular and Personal Communications System (PCS) bands, as well as Advanced Mobile Phone System (AMPS) mode. The device is a highly integrated super-heterodyne receiver. It incorporates all the components required to implement the receiver chain, from the low-noise amplifier (LNA) to the In-Phase and Quadrature (I/Q) demodulator stages, except for the external Surface Acoustic Wave (SAW) filters and matching components. There are two internal Low Noise Amplifiers (LNAs). The Cellular LNA has three-step gain stages, and the PCS LNA gain has a bypass feature. After RF signal amplification and filtering, the received signal is mixed down from RF to the Intermediate Frequency (IF). There are separate mixers for AMPS, CDMA, and PCS bands. The CDMA cellular and PCS mixers have balanced outputs for the IF SAW filters, while the AMPS differential output can be combined externally to mate to a single-ended SAW filter. After IF filtering, the IF signal is amplified by a Variable Gain Amplifier (VGA) and fed to an I/Q demodulator resulting in baseband I/Q signals at the output. The VGA has a minimum dynamic range of 90 dB with a control voltage range from 0.5 to 2.5 Volts, and it is common to all modes. There are two VHF oscillators which operates with external tank circuits to provide Local Oscillator (LO) frequencies for the I/Q demodulator in the cellular and PCS bands. The noise figure, gain, and third order Input Intercept Point (IIP3) of each stage in the receiver chip are optimized to meet the system requirements for AMPS and CDMA modes as per TIA/EIA-98-C. Employing BiCMOS technology, the ASIC is designed for low cost, high performance, and a high level of integration. The device package and pinout are shown in Figure 1. A system block diagram of the CX74001 is shown in Figure 2. Distinguishing Features
- Supports single and dual-band, and tri-mode handsets
- Battery cell operation (2.7 V < Vcc < 3.3 V)
- Dual Low Noise Amplifiers (800 MHz / 1900 MHz)
- PCS LNA With Bypass Feature
- Three-Step Cellular LNA Gain
- I/Q Interface
- Dual 200-600 MHz VHF Oscillators
- VCO On/Off control For Standby Current Optimization
- CDMA Single IF Feature
- 48-pin, 7 x 7 mm RF Land Grid Array (RFLGA™) package with down-set paddle.
Applications
- Cellular and PCS band phones
- CDMA and AMPS modes in the cellular band
- AMPS
- CDMA-US
- CDMA-Japan
- CDMA mode in the PCS band
- PCS-US
- PCS-Korea CNXT061 VCC_MIX PCS_MIXER_OUT+ PCS_MIXER_OUT- AMPS_MIX_OUT+ AMPS_MIX_OUT- CDMA_MIX_OUT+ CDMA_MIX_OUT- PCS_VGA_IN+ PCS_VGA_IN- AMPS_VGA_IN CDMA_VGA_IN+ CDMA_VGA_IN- PCS_LNA_BIAS_RES CELL_LNA_ OUT NC PCS_LNA_OUT CELL_LNA_BIAS_RES RF_BIAS_RES CELL_MIX_IN PCS_MIX_IN PCSMIX_BYPASS CELL_LO PCS_LO VCC_IF LNA_CTRL1 PCS_LNAIN LNA_CTRL0 CELL_LNA_IN VCC_RF_BIAS CELL_LNA_EMIT CELL/PCS FM/CDMA VCO_VCC VCO_ON CELL_TANK- CELL_TANK+ PCS_TANK- PCS_TANK+ LOD PLL+ PLL- SIF SLEEP VGA_CONTROL
Figure 1. CX74001 Rx ASIC Pin-Out (Top View)
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Figure 2. CX74001 Rx ASIC Block Diagram the PCS band and two for the cellular band (AMPS and CDMA). single-ended input IF SAW filter. and is fed directly to the I/Q Demodulator. The VGA stage is internally AC coupled to the I/Q demodulator. fed to a divider block that divides the VCO frequency by two. when cascaded with the baseband processor.
Rx ASIC for CDMA, AMPS, and PCS Applications CX74001 101134A Skyworks 3 March 5, 2002 Proprietary Information and Specifications are Subject to Change The active cores of the two VCOs are present on the CX74001, requiring only differential external LC tanks and a PLL synthesizer. The VCO core current is automatically adjusted to give a constant VCO output swing, regardless of the external tank Q. The operation of the chip is controlled by signals CELL/PCS, FM, and SLEEP. The Single IF (SIF) is added to use a common IF frequency for CDMA mode in cellular and PCS band. This allows the use of one IF SAW filter for the PCS and CDMA modes to reduce system implementation cost. The logic blocks are powered off of the Vcc_IF, so it must be present to obtain chip functionality. Electrical and Mechanical Specifications. Signal pin assignments and functional pin descriptions are described in Table 1. The absolute maximum ratings of the CX74001 are provided in Table 2. The recommended operating conditions are specified in Table 3. Electrical specifications are provided in Table 4. Tables 5, 6, 7, and 8 provide logic and mode control information for the CX74001. Figures 3 through 46 provide typical performance characteristics. A schematic diagram of the CX74001 is provided in Figure 47 and the package dimensions of the 48-pin RFLGA are shown in Figure 48. ESD Sensitivity The CX74001 is a JEDEC Class 1 device. The following extreme Electrostatic Discharge (ESD) precautions are required according to the Human Body Model (HBM):
- Protective outer garments.
- Handle device in ESD safeguarded work area.
- Transport device in ESD shielded containers.
- Monitor and test all ESD protection equipment. The HBM ESD withstand threshold value, with respect to ground, is ±1.5 kV. The HBM ESD withstand threshold value, with respect to VDD (the positive power supply terminal) is also ±1.5 kV.
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Table 1. CX74001 Pin Assignments and Signal Descriptions (1 of 4) DC blocking capacitor is required. a DC blocking capacitor is required. should be connected from the pin to ground with minimal trace length. 6 CELL_LNA_EMIT Ground directly to ground with minimum trace length. 7 CELL/PCS Digital signal used for band selection: 0 = cellular (800 MHz), 1 = PCS (1900 MHz). 8 FM/CDMA Digital signal used in cellular band for mode selection: 0 = AMPS, 1 = CDMA. from pin 9 to ground with minimal trace length.
10 VCO_ON VCO control signal to turn VCO and PLL buffer ON/OFF during slotted paging modes, thereby
tank circuit to prevent parasitic oscillations. tank circuit to prevent parasitic oscillations. tank circuit to prevent parasitic oscillations. tank circuit to prevent parasitic oscillations. current consumption at the expense of input IP3.
Table 1. CX74001 Pin Assignments and Signal Descriptions (2 of 4) 16 PLL+ Differential buffered VCO output. 17 PLL– Differential buffered VCO output. 18 SIF Digital control signal for SIF selection: 1 = SIF, 0 = Normal. 19 I– I channel differential output. 20 I+ I channel differential output. 21 Q+ Q channel differential output. 22 Q– Q channel differential output. 23 SLEEP Digital signal used to activate the receiver ASIC: 0 = sleep, 1= enable. bypassed to prevent signal modulation to the supply line.
26 CDMA_VGA_IN– CDMA differential VGA input
27 CDMA_VGA_IN+ CDMA differential VGA input
28 AMPS_VGA_IN AMPS VGA input
29 PCS_VGA_IN– PCS differential VGA input
30 PCS_VGA_IN+ PCS differential VGA input
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Table 1. CX74001 Pin Assignments and Signal Descriptions (3 of 4) the output impedance is set by an external matching network. the output impedance is set by an external matching network. impedance is set by an external matching network. impedance is set by an external matching network. impedance is set by an external matching network. impedance is set by an external matching network. 38 PCS_LO The local oscillator input for the PCS band mixer. 39 CELL_LO The local oscillator input for the cellular band mixer. 40 PCSMIX_BYPASS Low frequency bypass for the PCS mixer. Typically, a 47 nF is connected from pin to ground.
42 CELL_MIX_IN Cellular mixer input
43 RF_BIAS_RES This sets the RF bias current. Typically, a 15 kΩ resistor is connected from the pin to ground. 44 CELL_LNA_BIAS_RES This sets the cellular LNA bias current. Typically, 27 kΩ is connected to ground.
Table 1. CX74001 Pin Assignments and Signal Descriptions (4 of 4) Table 2. Absolute Maximum Ratings Table 3. Recommended Operating Conditions
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Table 4. CX74001 Rx ASIC Electrical Specifications (1 of 3)
800 MHz LNA CDMA
800 MHz LNA AMPS
1900 MHz LNA
Table 4. CX74001 Rx ASIC Electrical Specifications (2 of 3)
800 MHz Mixer
1900 MHz Mixer (1930-1990 MHz)
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Table 4. CX74001 Rx ASIC Electrical Specifications (3 of 3)
Table 5. Mode Control Select Signal Switching
0 X X OFF (Note 1) OFF (Note 1) OFF (Note 1)
Note 1: All blocks except VCO, which is i ndependently controlled by VCO_ON in this state. Table 6. VCO_ON Control (SIF = 0)
1 X 0 ON
1 X 1 ON
Table 7. SIF Control – Single IF (SLEEP = 1)
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Table 8. Logic Control for LNA Gain Step Note 1: These modes are available but not used to meet the IS-98 Specifications. Figure 3. PCS LNA Gain at 1960 MHz Figure 5. PCS LNA IIP3 at 1960 MHz Figure 4. PCS LNA NF at 1960 MHz Figure 6. PCS LNA Gain at 1960 MHz(Bypass Mode)
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Figure 13. Cell CDMA LNA Noise Figure (Mid Gain) at 881 MHz Figure 15. Cell CDMA LNA Gain (Bypass Mode) at 881 MHz Figure 14. Cell CDMA LNA IIP3 (Mid Gain) at 881 MHz Figure 16. Cell CDMA LNA Noise Figure (Bypass Mode) at 881 MHz Figure 18. AMPS LNA Gain at 881 MHz
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Figure 25. Cell CDMA Mixer Noise Figure at 881 MHz Figure 27. AMPS Mixer Gain at 881 MHz Figure 29. AMPS Mixer IIP3 at 881 MHz Figure 26. Cell CDMA Mixer IIP3 at 881 MHz Figure 28. AMPS Mixer Noise Figure at 881 MHz Figure 30. PCS VGA+IQ Gain (VCC = 2.5 V) at 210.38 MHz
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Figure 37. CDMA VGA+I/Q IIP3 (Vc = 2.5 V) at 85.38 MHz Figure 39. AMPS VGA+IQ Gain (Vc = 2.5 V) at 85.38 MHz Figure 41. AMPS VGA+I/Q IIP3 (Vc = 2.5 V) at 85.38 MHz Figure 38. AMPS VGA+IQ Gain (Vc = 0.5 V) at 85.38 MHz Figure 40. AMPS VGA+I/Q Noise Figure (Vc = 2.5 V) at 85.38 MHz Figure 42. Supply Current in PCS Mode (LNA Bypassed)
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- COMPONENT VALUES MAY CHANGE
Figure 47. CX74001 Schematic Diagram
Figure 48. Package Dimensions – 48-pin RFLGA Package
CX74001 Rx ASIC for CDMA, AMPS, and PCS Applications
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Proprietary Information and Specifications are Subject to Change March 5, 2002
Ordering Information
Model Name Manufacturing Part Number Product Revision Dual-band, tri-mode Rx ASIC CX74001-12 © 2002, Skyworks Solutions, Inc. All Rights Reserved. Information in this document is provided in connection with Skyworks Solutions, Inc. ("Skyworks") products. These materials are provided by Skyworks as a service to its customers and may be used for informational purposes only. Skyworks assumes no responsibility for errors or omissions in these materials. Skyworks may make changes to its products, specifications and product descriptions at any time, without notice. Skyworks makes no commitment to update the information and shall have no responsibility whatsoever for conflicts, incompatibilities, or other difficulties arising from future changes to its products and product descriptions. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as may be provided in Skyworks’ Terms and Conditions of Sale for such products, Skyworks assumes no liability whatsoever. THESE MATERIALS ARE PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, RELATING TO SALE AND/OR USE OF SKYWORKS™ PRODUCTS INCLUDING WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, PERFORMANCE, QUALITY OR NON-INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. SKYWORKS FURTHER DOES NOT WARRANT THE ACCURACY OR COMPLETENESS OF THE INFORMATION, TEXT, GRAPHICS OR OTHER ITEMS CONTAINED WITHIN THESE MATERIALS. SKYWORKS SHALL NOT BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, INCLUDING WITHOUT LIMITATION, LOST REVENUES OR L OST PROFITS THAT MAY RESULT FROM THE USE OF THESE MATERIALS. Skyworks™ products are not intended for use in medical, lifesaving or life-sustaining applications. Skyworks’ customers using or selling Skyworks™ products for use in such applications do so at their own risk and agree to fully indemnify Skyworks for any damages resulting from such improper use or sale. RFLGA is a trademark of Conexant Systems, Inc. The following are trademarks of Skyworks Solutions, Inc.: Skyworks™, the Skyworks symbol, and “Breakthrough Simplicity”™. Produ ct names or services listed in this publication are for identification purposes only, and may be trademarks of third parties. Third-party brands and names are the property of their respective owners. Additional information, posted at www.skyworksinc.com, is incorporated by reference.
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