CSPST CALMIRCO | Alldatasheet
Document overview
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Technical content
Features
- 8 or 16 integrated high frequency series terminations Ultra small footprint Chip Scale Package Ceramic substrate 0.35mm Eutectic Solder Bumps, 0.65mm pitch Product Description The CSPST is a high performance Integrated Passive Device (IPD) which provides series terminations suitable for use in high speed bus applications. Eight (8) or sixteen (16) series termination versions are provided. These resistors provide excellent high frequency performance in excess of 3GHz and are manufactured to an absolute tolerance as low as ±1%. The Chip Scale
Applications
Series resistive bus termination Isolated resistor array C1300700 SCHEMATIC DIAGRAMS Package provides an ultra small footprint for this IPD and provides minimal parasitics compared to conven- tional packaging. T ypical bump inductance is less than 25pH. The large solder bumps and ceramic substrate allow for standard attachment to laminate printed circuit boards without the use of underfill. CSPST08 D C B A 12 3 4 R1 R1 R1 R1 R1 R1 R1 D C B A 12 3 4 R1 R1 R1 R1 R1 R1 CSPST16 SEULAVDRADNATS eulaVrotsiseR2 2=1R ,Ω 33 ,Ω 93 ,Ω74,Ω 15 ,Ω 65 ,Ω RecnareloTetulosbA% 5±,%1± srotsiseRfoRCTm pp001± rotsiseR/gnitaRrewoPW m001 egnaRerutarepmeTgnitarepOC °58otC°04–
©2000 California Micro Devices Corp. All rights reserved. 11/10/2000215 Topaz Street, Milpitas, California 95035 Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com2 CSPSTCALIFORNIA MICRO DEVICES Package Diagram (Bumps Up View) A B C D 23 4 2.3968mm 0.381mm 0.65 mm 0.65 mm 0.643mm 0.35mm Dia. Bumps 0.2234mm 2.3968mmmm A B C D 234567 8 2.3968mm 0.381mm 0.65 mm 0.65 mm 0.643mm 0.35mm Dia. Bumps 0.2234mm 4.9968mm CSPST08 CSPST16 SNOITADNEMMOCERDRAOBTIUCRICDETNIRP BCPnoeziSdaPm m003.0 epahSdaPd nuoR noitinifeDdaP )DMSN(sdaPdenifeDksaMredloSnoN gninepOksaMredloSm m053.0 ssenkcihTlicnetSredloSm m251.0 gninepOerutrepAlicnetSredloS) .qs(mm063.0 oitaRxulFredloS0 5/05 etsaPredloSn aelCoN hsiniFecarTdnoB) A601sulPuCketnE(PSO
© 2000 California Micro Devices Corp. All rights reserved. 11/10/2000 3 CSPSTCALIFORNIA MICRO DEVICES 215 T opaz Street, Milpitas, California 95035 T el: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com Typical PCB Routing Diagram (Bumps Down View) Typical Solder Reflow Thermal Profile (No Clean Flux) 250 225 200 175 150 125 100 0 48 97 145 Time (s) Temperature ( o 194 242 290 339 387 435 EXHRFZ5Z4EXH PH Z2 Z3 CD D C B A 1 8
©2000 California Micro Devices Corp. All rights reserved. 11/10/2000215 Topaz Street, Milpitas, California 95035 Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com4 CSPSTCALIFORNIA MICRO DEVICES PART NUMBER KEY NOITAMROFNIGNIREDROTRAPDRADNATS egakcaP rebmuNtraPgniredrO elytSs noitanimreTl eeR&epaTg nikraMtraP elacSpihC8 F 022-80TSPSCe noN elacSpihC8 J 022-80TSPSCe noN elacSpihC8 F 033-80TSPSCe noN elacSpihC8 J 033-80TSPSCe noN elacSpihC8 F 093-80TSPSCe noN elacSpihC8 J 093-80TSPSCe noN elacSpihC8 F 074-80TSPSCe noN elacSpihC8 J 074-80TSPSCe noN elacSpihC8 F 015-80TSPSCe noN elacSpihC8 J 015-80TSPSCe noN elacSpihC8 F 065-80TSPSCe noN elacSpihC8 J 065-80TSPSCe noN elacSpihC6 1F 022-61TSPSCe noN elacSpihC6 1J 022-61TSPSCe noN elacSpihC6 1F 033-61TSPSCe noN elacSpihC6 1J 033-61TSPSCe noN elacSpihC6 1F 093-61TSPSCe noN elacSpihC6 1J 093-61TSPSCe noN elacSpihC6 1F 074-61TSPSCe noN elacSpihC6 1J 074-61TSPSCe noN elacSpihC6 1F 015-61TSPSCe noN elacSpihC6 1J 015-61TSPSCe noN elacSpihC6 1F 065-61TSPSCe noN elacSpihC6 1J 065-61TSPSCe noN EGAKCAP NOITAMROFNIGNIREDROTRAPDRADNATS-NON seireStraPs noitanimreT) XXX(1R:edoCeulaVe cnareloT )TSPSC(elpmaxE) 8() 102() J( TSPSC8 .eulavtnacifingiserastigid2tsriF forebmunstneserpertigiddrihT wollofotsorez %1±=F %5±=JTSPSC6 1 PACKAGE TYPE APPLICATION Tolerance CSP = Chip Scale Package Series Termination Number of Terminations 08 = 8 16 = 16 F = ±1% J = ±5% Resistor Value Code R1 Value First 2 digits are significant value. 3rd digit represents number of zeros CSP ST YY XXX T