CSPEMI200A CALMIRCO | Alldatasheet
Document overview
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Technical content
Features
- Four channels of EMI filtering
- Pi-style EMI filters in a capacitor-resistor-capacitor (C-R-C) network
- Includes 1 channel of ESD-only protection
- Greater than 30dB attenuation at 1GHz +8kV ESD protection on each channel (IEC 61000-4-2 Level 4, contact discharge)
- +15kV ESD protection on each channel (HBM)
- Supports bipolar signals—ideal for audio applications
- 11-bump, 2.046mm X 1.436mm footprint Chip Scale Package (CSP)
- Chip Scale Package features extremely low lead inductance for optimum filter and ESD performance
- Lead-free version available
Applications
- EMI filtering and ESD protection for audio ports
- Wireless Handsets
- Handheld PCs / PDAs
- MP3 Players
- Digital Camcorders
- Notebooks
- Desktop PCs Product Description The CSPEMI200A is a quad low- pass filter array inte- grating four pi-style filters (C-R-C) that reduce EMI/RFI emissions while at the same time providing ESD pro- tection. This device is cu stom-designed to interface with the headset port on a cellular telephone, and con- tains 3 different filter valu es. Each high quality filter provides more than 20dB attenuation in the 800-2700 MHz range. These pi-style f ilters support bidirectional filtering, controlling EMI both to and from the micro- phone and speaker elements. They also support bipo- lar signals, enabling audio signals to pass through without distortion. In addition, the CSPEMI200A provi des a very high level of protection for sensitive electronic components that may be subject to electrostatic discharge (ESD). The CSPEMI200A can safely dissipate ESD strikes of +8kV, the maximum requirement of the IEC 61000-4-2 international standard. Using the MIL-STD-883 (Method 3015) specification for Human Body Model (HBM) ESD, the device provi des protection for contact discharges to greater than +15kV. The CSPEMI200A is particular ly well suited for porta- ble electronics (e.g., cellular telephones, PDAs, note- book computers) because of its small package format and low weight. The CSPEMI 200A is available in a space-saving, low-profile Chip Scale Package with optional lead-free finishing. Electrical Schematic 10Ω 100pF 100pF 100Ω 47pF 47pF MIC_IN1 B3 ESD Channel MIC_IN2 SPKR_OUT1 SPKR_OUT2 GND GND SPKR_IN2 SPKR_IN1 MIC_OUT2 MIC_OUT1B1 68Ω 47pF 47pF 10Ω 100pF 100pF
© 2005 California Micro Devices Corp. All rights reserved. CSPEMI200A
Ordering Information
Note 1: Parts are shipped in Tape & Reel form unless otherwise specified. Note 2: Lead-free devices are specified by using a "+" character for the top side orientation mark. PIN DESCRIPTIONS PIN NAME DESCRIPTION A1 N.B. No Bump – used for orientation / alignment A2 MIC_IN2 Microphone Input 2 (from microphone) A3 SPKR_OUT1 Speaker Output 1 (to speaker) A4 SPKR_OUT2 Speaker Output 2 (to speaker) B1 MIC_IN1 Microphone Input 1 (from microphone) B2 ESD1 ESD Protection Input. Provides a channel specifically for ESD protection purposes. B3 GND Device Ground B4 GND Device Ground C1 MIC_OUT1 Microphone Output 1 (to audio circuitry) C2 MIC_OUT2 Microphone Output 2 (to audio circuitry) C3 SPKR_IN1 Speaker Input 1 (from audio circuitry) C4 SPKR_IN2 Speaker Input 2 (from audio circuitry) MIC_IN2 MIC_IN1 SPKR_OUT1 SPKR_OUT2 ESD1 GND GND MIC_OUT1 MIC_OUT2 SPKR_IN1 SPKR_IN2 A3A2 Orientation Marking A4 B4B3B2B1 C4C3C2C1 200A 4321 C B A Orientation Marking (see note 2) PACKAGE / PINOUT DIAGRAMS Notes: TOP VIEW CSPEMI200A BOTTOM VIEW (Bumps Down View) (Bumps Up View) 2) Lead-free devices are specified by using a "+" character for the top side orientation mark. 1) These drawings are not to scale. PART NUMBERING INFORMATION Bumps Package Standard Finish Lead-free Finish2 Ordering Part Number1 Part Marking Ordering Part Number1 Part Marking
11 CSP CSPEMI200A 200A CSPEMI200AG 200A
© 2005 California Micro Devices Corp. All rights reserved. CSPEMI200A Specifications Note 1: T A=25°C unless otherwise specified. Note 2: ESD applied to input pins with respect to GND, one at a time, pins A2, A3, A4, B1 and B2 only. Note 3: Clamping voltage is measured at the opposite side of the EM I filter to the ESD pin. For example, if ESD is applied to Pin B1, then clamping voltage is measured at Pin C1. Note 4: Unused pins are left open Note 5: The parameters are guaranteed by design and characterization. Note 6: Z SOURCE=50Ω, ZLOAD=50Ω. ABSOLUTE MAXIMUM RATINGS PARAMETER RATING UNITS Storage Temperature Range -65 to +150 °C DC Power per Resistor 100 mW STANDARD OPERATING CONDITIONS PARAMETER RATING UNITS Operating Temperature Range -40 to +85 °C ELECTRICAL OPERATING CHARACTERISTICS (NOTE 1) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS R1 Resistance 1 90 100 110 Ω R2 Resistance 2 61 68 75 Ω R3 Resistance 3 9 10 11 Ω C1 Capacitance 1 38 47 57 pF C2 Capacitance 2 80 100 120 pF ILEAK Diode Leakage Current V IN=5.0V 1.0 μA VSIG Signal Voltage Positive Clamp Negative Clamp I LOAD = 10mA -10 -15 V V VESD In-system ESD Withstand Voltage a) Human Body Model, MIL-STD-883, Method 3015 b) Contact Discharge per IEC 61000-4-2 Level 4 Notes 2,4 and 5 ±15 kV kV VCL Clamping Voltage during ESD Discharge MIL-STD-883 (Method 3015), 8kV Positive Transients Negative Transients Notes 2,3,4 and 5 +15 -19 V V fC1 Cut-off frequency 1; Note 6 R = 100 Ω, C = 47pF 53 MHz fC2 Cut-off frequency 2; Note 6 R = 68 Ω, C = 47pF 61 MHz fC3 Cut-off frequency 3; Note 6 R = 10 Ω, C = 100pF 33 MHz
© 2005 California Micro Devices Corp. All rights reserved. Figure 8. Tape and Reel Mechanical Data P1Only including Draft.Concentric Around B.