CSMS05 CENTRAL | Alldatasheet
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Technical content
DESCRIPTION: The CENTRAL SEMICONDUCTOR CSMS05 Series is a
4 Line TVS/Zener Array packaged in the SOT-26 surface
mount case. These devices are designed to protect sensitive equipment against ESD and prevent latch-up events in CMOS circuitry operating at 5V, 12V, 15V, and 24V.
FEATURES
- Very low Clamping Voltage
- Low Leakage Current
- 350W Power Dissipation
- SMD SOT-26 Package
- IEC61000-4-2 ESD 20kV air, 15kV Contact Compliance APPLICATIONS:
- PDA’s
- Cell Phones
- Memory Card Ports
- Instrumentation CSMS05 CSMS12 CSMS15 CSMS24 SURFACE MOUNT QUAD SILICON TVS/ZENER ARRAY
5 THRU 24 VOLTS
Semiconductor Corp. TM R0 (13-September 2005) STAND-OFF VOLTAGE Specified by TYPE NO. Reverse Stand-Off Voltage Reverse Breakdown Voltage Reverse Leakage Current Clamping Voltage 8 x 20μμs Clamping Voltage 8 x 20μμs Off State Junction Capacitance (VR=0V, f=1MHz) VWRM MAX (V) VBR MIN (V) IBR (mA) IR MAX (μμA) VR (V) Vcl MAX (V) IPP (A) Vcl MAX (V) IPP (A) CJ MAX (pF) CSMS12 12 13.3 1.0 5.0 12 17 5.0 21 24 90 CSMS15 15 16.7 1.0 5.0 15 22 5.0 27 24 70 CSMS24 24 26.7 1.0 5.0 24 35 5.0 40 24 50 MAXIMUM RATINGS: (TA=25°C unless otherwise noted) SYMBOL UNITS Peak Pulse Power P pp 350 W ESD Voltage (HBM) V ESD >25 kV Operating Temperature Range T J -50 to +125 °C Storage Temperature Range T stg -50 to +150 °C ELECTRICAL CHARACTERISTICS: (TA=25°C unless otherwise noted) MARKING CODES CSMS05: CS05 CSMS12: CS12 CSMS15: CS15 CSMS24: CS24
Semiconductor Corp. TM CSMS05 CSMS12 CSMS15 CSMS24 SURFACE MOUNT QUAD SILICON TVS/ZENER ARRAY R0 (13-September 2005) SOT-26 - CASE - MECHANICAL OUTLINE Pin Configuration Circuit Diagram Suggested mounting pad layout for maximum power dissipation (Dimensions in mm) Lead code: 1) Cathode D1 2) Anode D1, D2, D3, D4 3) Cathode D2 4) Cathode D3 5) Anode D1, D2, D3, D4 6) Cathode D4 For Standard mounting, refer to SOT-26 Package Details.