CSD95410RRB TI | Alldatasheet
Document overview
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Technical content
CSD95410 Synchronous Buck NexFET™ Smart Power Stage
1 Features
- 90-A peak continuous current
- Over 95% system efficiency at 30 A
- High-frequency operation (up to 1.75 MHz)
- Diode emulation function
- Temperature compensated bi-directional current sense
- Analog temperature output
- Fault monitoring
- 3.3-V and 5-V PWM signal compatible
- Tri-state PWM input
- Integrated bootstrap switch
- Optimized dead-time for shoot-through protection
- High-density industry common QFN 5-mm × 6-mm footprint
- Ultra-low-inductance package
- System optimized PCB footprint
- Thermally enhanced topside cooling
- RoHS compliant: lead-free terminal plating
- Halogen free
2 Applications
- Multiphase synchronous buck converters – High-frequency applications – High-current, low-duty cycle applications
- Point-of-load DC-DC converters
- Memory and graphic cards
- Desktop and server VR12.x / VR13.x / VR14.x V- core synchronous buck converters
3 Description
The CSD95410 NexFET™ power stage is a highly optimized design for use in a high-power, high-density synchronous buck converter. This product integrates the driver IC and power MOSFETs to complete the power stage switching function. This combination produces high-current, high-efficiency, and high-speed switching capability in a small 5-mm × 6-mm outline package. It also integrates the accurate current sensing and temperature sensing functionality to simplify system design and improve accuracy. In addition, the PCB footprint has been optimized to help reduce design time and simplify the completion of the overall system design. Device Information DEVICE MEDIA QTY PACKAGE(1) SHIP CSD95410 13-Inch Reel 2500 QFN 5.00-mm × 6.00-mm Tape and ReelCSD95410T 7-Inch Reel 250 (1) For all available packages, see the orderable addendum at the end of the data sheet. Controller PWM1 CSD95410 PMBus CSP1 PWM2 CSD95410 CSP2 CSD95410 PWM8 CSP8 Simplified Application CSD95410RRB SLPS723 – SEPTEMBER 2020 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.
6 Mechanical, Packaging, and Orderable Information....4
6.4 Alternate Industry Standard Compatible PCB
6.5 Alternate Industry Standard Compatible Stencil
4 Revision History
September 2020 * Initial release. CSD95410RRB SLPS723 – SEPTEMBER 2020 www.ti.com
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5 Device and Documentation Support
5.1 Device Support
5.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
5.2 Documentation Support
5.3 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Subscribe to updates to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.
5.4 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.
5.5 Trademarks
NexFET™ and TI E2E™ are trademarks of Texas Instruments. All trademarks are the property of their respective owners.
5.6 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
5.7 Glossary
TI Glossary This glossary lists and explains terms, acronyms, and definitions. www.ti.com CSD95410RRB SLPS723 – SEPTEMBER 2020 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 3 Product Folder Links: CSD95410RRB
6 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
6.1 Mechanical Drawing
- All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pads must be soldered to the printed circuit board for optimal thermal and mechanical performance. CSD95410RRB SLPS723 – SEPTEMBER 2020 www.ti.com
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6.2 Recommended PCB Land Pattern
www.ti.com EXAMPLE BOARD LAYOUT .000 0 .000 PKG 0 3X ( )1.275 ( ) 0.5 ( )2.05 ( )0.375 ( ) 2.4 ( ) 2 ( )1.75 ( )1.55 3X ( )0.875 ( ) 0.2 ( ) TYP 2.18 ( ) TYP 2.7 2X ( )2.05 ( ) 2.9 3X ( ) 0.3 5X ( )1.15 5X ( ) 2 ( ) 2.6 ( ) TYP 3.2 ( )0.025 ( ) 2.2 ( ) 0.8 ( ) 0.4 ( ) 0.1 ( ) 0.3 ( )2.25 16X (0.6) 16X (0.25) 14X (0.45) 3X ( ) 2 3X ( ) 1 2X ( ) 1 2X ( ) 2 ( )1.75 ( ) 1.3 ( ) TYP 2.7 19X (0.45) ( )1.05 ( )2.025 ( )2.05 ( ) TYP 2.75 23X (0.25) ( ) TYP 2.225 ( ) TYP 2.225 (R0.05) TYP ( ) 0.9 (0.05) MIN TYP ( 0.2) VIA TYP (R0.05) TYP VQFN-CLIP - 1.05 mm max height RRB0041A PLASTIC QUAD FLATPACK - NO LEAD 4224073/A 03/2018 NOTES: (continued) 4. This package is designed to be soldered to thermal pads on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. LAND PATTERN EXAMPLE SOLDER MASK DEFINED SCALE: 20X PKG METAL UNDER SOLDER MASK TYP SOLDER MASK OPENING, TYP 10 19 30 39 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This package is designed to be soldered to thermal pads on the board. For more information, see QFN/SON PCB Attachment (SLUA271). www.ti.com CSD95410RRB SLPS723 – SEPTEMBER 2020 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 5 Product Folder Links: CSD95410RRB
6.3 Recommended Stencil Opening
www.ti.com EXAMPLE STENCIL DESIGN .000 PKG .000 PKG 0 ( ) 2.9 ( )1.175 ( )0.305 ( )1.375 ( )2.245 29X (0.6) 16X (0.25) 14X (0.45) ( ) 2.4 ( ) 2 2X ( )1.665 2X ( )0.975 2X ( )0.775 2X ( )0.085 ( ) 2.4 3X ( )0.13 3X ( )1.05 3X ( )1.25 4X ( )2.17 ( ) 2.6 ( ) TYP 3.2 ( ) TYP 2.75 ( )0.375 ( )0.25 ( )0.025 ( ) 0.1 ( ) 0.4 ( )0.84 ( )1.05 2X ( ) 1.9 2X ( ) 1.1 2X ( ) 0.9 2X ( ) 0.1 2X ( ) 0.1 2X ( ) 0.9 ( ) 1.1 ( ) 1.9 10X (0.25) 19X (0.45) ( )2.025 ( )1.75 ( ) 1.3 23X (0.25) (R0.05) TYP (R0.05) TYP VQFN-CLIP - 1.05 mm max height RRB0041A PLASTIC QUAD FLATPACK - NO LEAD 4224073/A 03/2018 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. SOLDER PAST EXAMPLE BASED ON 0.125 mm THICK STENCIL PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE PADS 7-9 & 20-24: 70% PAD 40: 70% SCALE: 20X EXPOSED METAL TYP METAL UNDER SOLDER MASK TYP SOLDER MASK EDGE TYP EXPOSED METAL TYP 30 39 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. CSD95410RRB SLPS723 – SEPTEMBER 2020 www.ti.com
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Product Folder Links: CSD95410RRB
6.4 Alternate Industry Standard Compatible PCB Land Pattern
www.ti.com EXAMPLE BOARD LAYOUT .0000 .000 PKG 0 ( ) 2.4 ( ) 2 ( )1.75 ( )1.55 3X ( )0.875 ( ) 0.2 ( ) 0.4 3X ( )1.15 ( ) TYP2.22 ( ) TYP2.7 2X ( )2.11 ( ) 2.9 ( )2.25 ( )2.05 ( )1.275 ( ) 0.5 ( ) 0.3 ( ) 0.3 5X ( )1.15 5X ( ) 2 ( ) 2.6 ( ) TYP3.2 ( )0.025 ( ) 2.2 ( ) 0.8 ( ) 0.4 ( ) 0.1 ( ) 0.3 ( )2.25 16X (0.6) 16X (0.25) 14X (0.45) 3X ( ) 2 3X ( ) 1 2X ( ) 1 2X ( ) 2 ( )1.75 ( ) 1.3 ( ) TYP2.7 19X (0.45) ( )1.05 ( )2.025 ( )2.05 ( )2.175 ( ) TYP2.75 20X (0.25) ( ) TYP 2.225 ( ) TYP 2.225 (R0.05) TYP ( ) 0.9 (0.05) MIN TYP ( 0.2) VIA TYP VQFN-CLIP - 1.05 mm max height RWJ0041A PLASTIC QUAD FLATPACK - NO LEAD 4221590/D 04/2019 NOTES: (continued) 4. This package is designed to be soldered to thermal pads on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). LAND PATTERN EXAMPLE SOLDER MASK DEFINED SCALE: 20X PKG METAL UNDER SOLDER MASK TYP SOLDER MASK OPENING, TYP 10 19 30 39 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com CSD95410RRB SLPS723 – SEPTEMBER 2020 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 7 Product Folder Links: CSD95410RRB
6.5 Alternate Industry Standard Compatible Stencil Opening
www.ti.com EXAMPLE STENCIL DESIGN .000 PKG .000 PKG 0 29X (0.6) 29X (0.25) 24X (0.45) ( ) TYP2.4 ( ) 2 2X ( )1.665 2X ( )0.975 2X ( )0.775 2X ( )0.085 2X ( )0.42 2X ( )1.05 2X ( )1.25 2X ( ) 1.9 ( ) TYP2.4 4X ( )2.245 4X ( )1.375 4X ( )1.175 4X ( )0.305 3X ( )0.13 3X ( )1.05 3X ( )1.25 4X ( )2.17 ( ) 2.6 ( ) TYP3.2 ( ) TYP2.75 ( )0.375 ( )0.25 ( )0.025 ( )0.12 ( )0.38 ( )0.84 ( )1.05 2X ( ) 1.9 2X ( ) 1.1 2X ( ) 0.9 2X ( ) 0.1 2X ( ) 0.1 2X ( ) 0.9 ( ) 1.1 ( ) 1.9 10X (0.25) 9X (0.45) ( )2.025 (R0.05) TYP ( )1.71 ( )1.34 VQFN-CLIP - 1.05 mm max height RWJ0041A PLASTIC QUAD FLATPACK - NO LEAD 4221590/D 04/2019 NOTES: (continued) 5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. SOLDER PAST E EXAMPLE BASED ON 0.125 mm THICK STENCIL PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE PADS 7-9 & 20-24: 70%; PADS 25-29: 70% PAD 40: 70%; PAD 41: 71% SCALE: 20X EXPOSED METAL METAL UNDER SOLDER MASK TYP SOLDER MASK OPENING TYP EXPOSED METAL EXPOSED METAL 1 30 39 CSD95410RRB SLPS723 – SEPTEMBER 2020 www.ti.com
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6.6 Package Option Addendum
www.ti.com CSD95410RRB SLPS723 – SEPTEMBER 2020 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 9 Product Folder Links: CSD95410RRB
www.ti.com 23-May-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) CSD95410RRB Active Production VQFN-CLIP (RRB) | 41 2500 | LARGE T&R ROHS Exempt NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 95410RRB CSD95410RRB.A Active Production VQFN-CLIP (RRB) | 41 2500 | LARGE T&R ROHS Exempt NIPDAU Level-2-260C-1 YEAR -40 to 125 95410RRB CSD95410RRB.B Active Production VQFN-CLIP (RRB) | 41 2500 | LARGE T&R ROHS Exempt NIPDAU Level-2-260C-1 YEAR -40 to 125 95410RRB CSD95410RRBT Active Production VQFN-CLIP (RRB) | 41 250 | SMALL T&R ROHS Exempt NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 95410RRB CSD95410RRBT.A Active Production VQFN-CLIP (RRB) | 41 250 | SMALL T&R ROHS Exempt NIPDAU Level-2-260C-1 YEAR -40 to 125 95410RRB CSD95410RRBT.B Active Production VQFN-CLIP (RRB) | 41 250 | SMALL T&R ROHS Exempt NIPDAU Level-2-260C-1 YEAR -40 to 125 95410RRB (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1
www.ti.com 23-May-2025 Addendum-Page 2
PACKAGE MATERIALS INFORMATION www.ti.com 25-Sep-2024 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant CSD95410RRB VQFN- CLIP CSD95410RRBT VQFN- CLIP Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION www.ti.com 25-Sep-2024 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CSD95410RRB VQFN-CLIP RRB 41 2500 367.0 367.0 38.0 CSD95410RRBT VQFN-CLIP RRB 41 250 213.0 191.0 35.0 Pack Materials-Page 2
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