CSD75204W15 TI | Alldatasheet

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−VGS − Gate to Source Voltage − V 100 150 200 250 300 0 1 2 3 4 5 6 R D1D2(on) − On-State Resistance − mW G006 ID1D2 = −1A TJ = 125°C TJ = 25°C Qg − Gate Charge − nC −VGS − Gate to Source Voltage − V G003 ID1D2 = −1A VD1D2 = −10V CSD75204W15 DualP-ChannelNexFET™ PowerMOSFET Check forSamples: CSD75204W15 1FEATURES Table1.PRODUCT SUMMARY• Dual P-Ch MOSFETs

  • Common Source Configuration VD1D2 DraintoDrainVoltage –20 V Q g Gate Charge Total(-4.5V) 2.8 nC• Small Footprint1.5-mm × 1.5-mm Q gd Gate Charge Gate toDrain 0.6 nC• Gate-SourceVoltageClamp VGS = –1.8V 140 m Ω• Gate ESD Protection–3kV R D1D2(on) DraintoDrainOn Resistance VGS = –2.5V 105 m Ω
  • Pb Free VGS = –4.5V 80 m Ω
  • RoHS Compliant VGS(th) ThresholdVoltage –0.7 V
  • Halogen Free

ORDERING INFORMATION

APPLICATIONS Device Package Media Qty Ship

  • BatteryManagement 1.5-mm × 1.5-mm 7-Inch Tape andCSD75204W15 3000Wafer LevelPackage Reel Reel• BatteryProtection ABSOLUTE MAXIMUM RATINGSDESCRIPTION TA = 25°C unlessotherwisestated VALUE UNITThe devicehas been designedto deliverthe lowest VD1D2 DraintoDrainVoltage –20 Von resistanceand gatechargeinthesmallestoutline VGS Gate toSourceVoltage -6 Vpossiblewithexcellentthermalcharacteristicsin an ultralow profile.Low on resistancecoupledwiththe ContinuousDraintoDrainCurrent, –3 ATC = 25°C (1) smallfootprintand low profilemake thedeviceideal ID1D2 PulsedDraintoDrainCurrent,forbatteryoperatedspace constrainedapplications. -28 ATC = 25°C (2) ContinuousSourcePinCurrent -1.2 ATop View IS PulsedSourcePinCurrent(2) -15 A ContinuousGate Clamp Current -0.5 A IG PulsedGate Clamp Current(2) -7 A PD Power Dissipation(1) 0.7 W TJ, OperatingJunctionand Storage –55 to150 °CTSTG TemperatureRange (1) Per device,bothsidesinconduction (2) Pulseduration10μs,dutycycle≤2% R D1D2(on) vs VGS Gate Charge (PerMOSFET) Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsofTexas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2009,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.

ELECTRICAL CHARACTERISTICS

(TA = 25°C unlessotherwisestated).Specificationsand graphsarePer MOSFET unlessotherwisestated.DraintoDrain measurements aredone withbothMOSFETs inseries(common sourceconfiguration. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT StaticCharacteristics BV D1D2 DraintoDrainVoltage VGS = 0V,ID1D2 = –250μA –20 V BV GSS Gate toSourceVoltage VD1D2 = 0V,IG = -250μA -6.1 -7.2 V IDDS DraintoSourceLeakage Current VGS = 0V,VD1D2 = –16V –1 μA IGSS Gate toSourceLeakage Current VD1D2 = 0V,VGS = -6V –100 nA VGS(th) Gate toSourceThresholdVoltage VD1D2 = VGS ,IDS = –250μA –0.5 –0.7 –0.9 V VGS = –1.8V,ID1D2 = –1A 140 175 m Ω R D1D2(on) DraintoDrainOn Resistance VGS = –2.5V,ID1D2 = –1A 105 130 m Ω VGS = –4.5V,ID1D2 = –1A 80 100 m Ω gfs Transconductance VD1D2 = –10V,ID1D2 = –1A 5.3 S Dynamic Characteristics C ISS InputCapacitance 315 410 pF VGS = 0V,VD1D2 = –10V,C OSS OutputCapacitance 128 165 pFf= 1MHz C RSS ReverseTransferCapacitance 43 55 pF Q g Gate Charge Total(–4.5V) 2.8 3.9 nC Q gd Gate Charge -Gate toDrain 0.6 nCVD1D2 = –10V, ID1D2 = –1AQ gs Gate Charge -Gate toSource 0.5 nC Q g(th) Gate Charge atVth 0.2 nC Q OSS OutputCharge VD1D2 = –9.5V,VGS = 0V 2.2 nC td(on) TurnOn DelayTime 7.8 ns tr RiseTime 6.7 nsVD1D2 = –10V,VGS = –4.5V, ID1D2 = –1A,R G = 30Ωtd(off) TurnOffDelayTime 45 ns tf FallTime 26 ns Diode Characteristics VSD DiodeForwardVoltage ID1D2 = –1A,VGS = 0V 0.75 1 V Q rr ReverseRecoveryCharge Vdd = –9.5V,IF = –1A,di/dt= 200A/μs 10.5 nC trr ReverseRecoveryTime Vdd = –9.5V,IF = –1A,di/dt= 200A/μs 23 ns THERMAL CHARACTERISTICS (TA = 25°C unlessotherwisestated) PARAMETER MIN TYP MAX UNIT ThermalResistanceJunctiontoAmbient(1)(2) 200 °C/W R θJA ThermalResistanceJunctiontoAmbient (3)(2) 94 °C/W (1) Devicemounted on FR4 materialwithMinimum Cu mountingarea. (2) Measured withbothdevicesbiasedina parallelcondition. (3) Devicemounted on FR4 materialwith1-inch2 ofCu (2oz).

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tP − Pulse□Duration − s ZθJA Normalized Thermal□Impedance 0.0001 0.01 10 1k 0.0001 0.1 0.001 0.1 1001 G012 Single□Pulse 0.01 0.02 0.05 0.1 0.3 0.5 0.01 0.001 Duty□Cycle□=□t1/t2 Typical□R =□161 C/W□(min□Cu) T =□P x□Z x□R /c113 /c113 /c113 JA J JA JA o P CSD75204W15 Max R θJA = 94°C/W Max R θJA = 200°C/W when mounted on when mounted on 1 inch2 (6.45cm 2)of minimum pad areaof 2-oz.(0.071-mmthick) 2-oz.(0.071-mmthick) Cu. Cu. TYPICAL MOSFET CHARACTERISTICS Graphs arePer MOSFET atTA = 25°C, unlessstatedotherwise.DraintoDrainmeasurements aredone withbothMOSFETs inseries(common sourceconfiguration). Figure1. TransientThermal Impedance Copyright© 2009,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLink(s):CSD75204W15

−V D1D2 − Drain□to□Drain□V oltage − V 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 D1D2 − Drain□to□Drain□Current − A G001 VGS = −4.5V VGS = −2V VGS = −1.5V VGS = −1.8V VGS = −2.5V −VGS − Gate to Source Voltage − V 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 −ID1D2 − Drain to Drain Current − A G002 VD1D2 = −5V TJ = −55°C TJ = 25°C TJ = 125°C Qg − Gate Charge − nC −VGS − Gate to Source Voltage − V G003 ID1D2 = −1A VD1D2 = −10V −VD1D2 − Drain to Drain Voltage − V 100 150 200 250 300 350 400 0 5 10 15 20 C − Capacitance − pF G004 f = 1MHz VGS = 0V C RSS = CGD C OSS = CDS + CGD C ISS = CGD + CGS TJ − Junction Temperature − °C 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 −75 −25 25 75 125 175 −VGS(th) − Threshold Voltage − V G005 ID1D2 = −250mA −VGS − Gate to Source Voltage − V 100 150 200 250 300 0 1 2 3 4 5 6 R D1D2(on) − On-State Resistance − mW G006 ID1D2 = −1A TJ = 125°C TJ = 25°C CSD75204W15 TYPICAL MOSFET CHARACTERISTICS (continued) Graphs arePer MOSFET atTA = 25°C, unlessstatedotherwise.DraintoDrainmeasurements aredone withbothMOSFETs inseries(common sourceconfiguration). Figure2.SaturationCharacteristics Figure3.TransferCharacteristics Figure4.Gate Charge Figure5.Capacitance Figure6.ThresholdVoltagevs.Temperature Figure7.On-StateResistancevs.Gate toSource Voltage

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TJ − Case Temperature − °C 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 −75 −25 25 75 125 175 Normalized On-State Resistance G007 ID1D2 = −1A VGS = −4.5V −VSD − Source to Drain Voltage − V −ISD − Source to Drain Current − A G008 0.1 0.001 0.0001 0.01 TJ = 25°C TJ = 125°C − VD1D2 − Drain□to□Drain□Voltage − V G009 100 0.01 −ID1D2 Drain□to□Drain□Current A 0.1 0.1 10 1001 Area□Limited by□RD1D2(on) 1ms 10ms 100ms DCSingle□Pulse Typical□R =□161 C/W□(min□Cu)/c113JA o TJ − Junction Temperature − °C 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 −50 −25 0 25 50 75 100 125 150 175 −ID1D2 − Drain to Drain Current − A G011 CSD75204W15 TYPICAL MOSFET CHARACTERISTICS (continued) Graphs arePer MOSFET atTA = 25°C, unlessstatedotherwise.DraintoDrainmeasurements aredone withbothMOSFETs inseries(common sourceconfiguration). Figure8.NormalizedOn-StateResistancevs.Temperature Figure9.TypicalDiode Forward Voltage Figure10.Maximum Safe OperatingArea Figure11. Maximum DrainCurrentvs.Temperature Copyright© 2009,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLink(s):CSD75204W15

Side□View 0.62□Max Pin□1 Mark Seating□Plate 0.50 0.50 1.00 0.04 0.62□Max 0.35 ±0.10 Solder□Ball ±0.075Ø□0.31 1 13 3 Bottom□ViewTop□View Front□View A C A C 2 2 B B 1.50 +0.00 –0.08 1.50 +0.00 –0.08 CSD75204W15 MECHANICAL DATA NOTE: Alldimensionsareinmm (unlessotherwisespecified) Pinout POSITION DESIGNATION A1 Gate1 A2,A3,B3 Drain1 C1 Gate2 C2, C3, B2 Drain2 B1 SourceSense

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0.50 1 3 2 Ø□0.25 0.50 1.00B A C 1.75□±0.10 Ø□0.50□±0.05 M0173-01 8.00 +0.30 –0.10 4.00□±0.10 4.00□±0.10 3.50□±0.05 5°□Max 5°□Max 1.60□±0.05 1.60□±0.05 CSD75204W15 Land PatternRecommendation NOTE: Alldimensionsareinmm (unlessotherwisespecified) Tape and Reel Information NOTE: Alldimensionsareinmm (unlessotherwisespecified) Copyright© 2009,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLink(s):CSD75204W15

Pin□1 Identifier NNNNN XXXXX CSD75204W15 Package Marking Information Location 1stLine ProductCode = NNNNN, First5 digitsafter CSD (FixedText) 2nd Line XXXXX = Last5 digitsoflotnumber (VariableText)

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Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) CSD75204W15 ACTIVE DSBGA YZF 9 3000 TBD Call TI Call TI (1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2)Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 11-Nov-2009 Addendum-Page 1

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