CS8371 ONSEMI | Alldatasheet

Document overview

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Technical content

Features

  • Two Regulated Outputs
  • Independent ENABLE for Each Output
  • Seperate Sense Feedback Lead for 8.0 V Output
  • < 10 /C0109A Sleep Mode Current
  • Fault Protection − Overvoltage Shutdown − +45 V Peak Transient V oltage − Short Circuit − Thermal Shutdown
  • CMOS Compatible, Low Current ENABLE Inputs
  • Pb−Free Packages are Available* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PIN CONNECTIONS AND MARKING DIAGRAM Device Package Shipping

ORDERING INFORMATION

50 Units/RailCS8371ET7 TO−220

50 Units/RailCS8371ETVA7 TO−220

TO−220 SEVEN LEAD T SUFFIX CASE 821E TO−220 SEVEN LEAD TVA SUFFIX CASE 821J A = Assembly Location WL = Wafer Lot Y = Year WW = Work Week G = Pb−Free Package Tab = GND Pin 1. ENABLE 2. ENABLE2 3. VOUT2 4. GND 5. Sense 6. V CC 7. VOUT1 http://onsemi.com

50 Units/RailCS8371ETVA7G TO−220

(Pb−Free)

50 Units/RailCS8371ET7G TO−220

(Pb−Free) CS 8371 AWLYWWG CS 8371 AWLYWWG

Figure 1. Block Diagram

1.2 V Pre−Regulator

http://onsemi.com ELECTRICAL CHARACTERISTICS: (−40°C ≤ TA ≤ +85°C, 10.5 V ≤ VCC ≤ 16 V, ENABLE 1 = ENABLE 2 = 5.0 V, IOUT1 = IOUT2 = 5.0 mA, unless otherwise stated.) Characteristic Test Conditions Min Typ Max Unit PRIMARY OUTPUT (VOUT1) Output Voltage IOUT1 = 1.0 A 7.60 8.00 8.40 V Line Regulation 10.5 V ≤ VCC ≤ 26 V − − 50 mV Load Regulation 5.0 mA ≤ IOUT1 ≤ 1.0 A − − 150 mV Sleep Mode Quiescent Current VCC = 14 V, ENABLE1 = ENABLE2 = 0 V 0 0.2 10.0 /C0109A Quiescent Current VCC = 14 V, IOUT1 = 1.0 A, IOUT2 = 250 mA − − 30 mA Dropout Voltage IOUT1 = 250 mA IOUT1 = 1.0 A − − 1.2 1.5 V V Quiescent Bias Current IOUT1 = 5.0 mA, ENABLE2 = 0 V, VCC = 14 V, IQ = ICC − IOUT1 IOUT1 = 1.0 A, ENABLE2 = 0 V, VCC = 14 V, IQ = ICC − IOUT1 mA mA Ripple Rejection f = 120 Hz, VCC = 14 V with 1.0 VPP AC, COUT = 0 /C0109F f = 10 kHz, VCC = 14 V with 1.0 VPP AC, COUT = 0 /C0109F f = 20 kHz, VCC = 14 V with 1.0 VPP AC, COUT = 0 /C0109F dB dB dB Current Limit VCC = 16 V 1.1 − 2.5 A Overshoot Voltage 5.0 mA ≤ IREG1 ≤ 1.0 A − − 6.0 V Output Noise 10 Hz − 100 kHz − 300 − /C0109Vrms SECONDARY OUTPUT (VOUT2) Output Voltage IOUT2 = 250 mA 4.75 5.00 5.25 V Line Regulation 7.0 V ≤ VCC ≤ 26 V − − 40 mV Load Regulation 5.0 mA ≤ IOUT2 ≤ 250 mA − − 100 mV Dropout Voltage IOUT2 = 5.0 mA IOUT2 = 250 mA − − 2.2 2.5 V V Quiescent Bias Current IOUT2 = 5.0 mA, ENABLE1 = 0 V, VCC = 14 V, IQ = ICC − IOUT2 IOUT2 = 250 mA, ENABLE1 = 0 V, VCC = 14 V, IQ = ICC − IOUT2 7.0 8.0 mA mA Ripple Rejection f = 120 Hz, VCC = 14 V with 1.0 VPP AC, COUT = 0 /C0109F f = 10 kHz, VCC = 14 V with 1.0 VPP AC, COUT = 0 /C0109F f = 20 kHz, VCC = 14 V with 1.0 VPP AC, COUT = 0 /C0109F dB dB dB Current Limit VCC = 16 V 270 − 600 mA Overshoot Voltage 5.0 mA ≤ IREG2 ≤ 250 mA − − 4.3 V Output Noise 10 Hz − 100 kHz − 170 − /C0109Vrms ENABLE FUNCTION (ENABLE) Input Current VCC = 14 V, 0 V ≤ ENABLE ≤ 5.5 V −150 − 150 /C0109A Input Voltage Low High 2.0 0.8 5.0 V V PROTECTION CIRCUITRY ESD Threshold Human Body Model ±2.0 ±4.0 − kV Overvoltage Shutdown − 24 − 30 V Thermal Shutdown Guaranteed by Design 150 180 − °C Thermal Hysteresis − − 30 − °C

7 Lead TO−220 LEAD SYMBOL FUNCTION

1 ENABLE1 ENABLE control for the 8.0 V, 1.0 A output. 2 ENABLE2 ENABLE control for the 5.0 V, 250 mA output. 3 VOUT2 5.0 V ±5.0%, 250 mA regulated output. 5 Sense Sense feedback for the primary 8.0 V output. 6 VCC Supply voltage, usually from battery. 7 VOUT1 8.0 V ±5.0%, 1.0 A regulated output. Figure 2. Regulator 1 Output Voltage Figure 3. Regulator 2 Output Voltage Figure 4. Regulator 1 Dropout Voltage Figure 5. Regulator 2 Dropout Voltage

load current and junction temperature. terminals with respect to ground. output voltage for which the regulator will operate. change in load current at constant chip temperature. maximum rated voltage and junction temperature. over a specified frequency range. current that does not contribute to the positive load current. The regulator ground lead current. ripple voltage to the peak−to−peak output ripple voltage. temperature to either temperature extreme. Figure 23. Applications Circuit

  • C1 is required if the regulator is far from the power source filter.

output supplies the Tuner IC and memory. bandwidth, display overshoot and poor ripple rejection. amplifier (large phase margin and no overshoot).

http://onsemi.com cause small signal oscillations at the output. This will depend on the load conditions. With these types of loads, a traditional output stage may be better suited for proper operation. Output 1 employs NOCAP. Refer to the plots in the Typical Performance Characteristics section for appropriate output capacitor selections for stability if an external capacitor is required by the switching characteristics of the load. Output 2 has a Darlington NPN−type output structure and is inherently stable with any type of capacitive load or no capacitor at all. Calculating Power Dissipation in a Dual Output Linear Regulator The maximum power dissipation for a dual output regulator (Figure 24) is PD(max) /C0043/C0458VIN(max) /C0042VOUT1(min)/C0459IOUT1(max) /C0041 /C0458VIN(max) /C0042VOUT2(min)/C0459IOUT2(max) /C0041VIN(max)IQ (1) where: VIN(max) is the maximum input voltage, VOUT1(min) is the minimum output voltage from VOUT1, VOUT2(min) is the minimum output voltage from VOUT2, IOUT1(max) is the maximum output current, for the application, IOUT2(max) is the maximum output current, for the application, and IQ is the quiescent current the regulator consumes at IOUT(max). Once the value of P D(max) is known, the maximum permissible value of R/C0113JA can be calculated: R/C0113JA /C0043150°C /C0042TA PD (2) The value of R /C0113JA can be compared with those in the package section of the data sheet. Those packages with R /C0113JA’s less than the calculated value in equation 2 will keep the die temperature below 150°C. In some cases, none of the packages will be sufficient to dissipate the heat generated by the IC, and an external heatsink will be required. Figure 24. Dual Output Regulator With Key Performance Parameters Labeled. A heat sink effectively increases the surface area of the package to improve the flow of heat away from the IC and into the surrounding air. Each material in the heat flow path between the IC and the outside environment will have a thermal resistance. Like series electrical resistances, these resistances are summed to determine the value of R /C0113JA: R/C0113JA /C0043R/C0113JC /C0041R/C0113CS /C0041R/C0113SA (3) where: R/C0113JC = the junction−to−case thermal resistance, R/C0113CS = the case−to−heatsink thermal resistance, and R/C0113SA = the heatsink−to−ambient thermal resistance. R/C0113JC appears in the package section of the data sheet. Like R/C0113JA, it too is a function of package type. R/C0113CS and R/C0113SA are functions of the package type, heatsink and the interface between them. These values appear in heat sink data sheets of heat sink manufacturers. PACKAGE THERMAL DATA Parameter TO−220 SEVEN LEAD Unit R/C0113JC Typical 2.4 °C/W R/C0113JA Typical 50 °C/W

http://onsemi.com PACKAGE DIMENSIONS DIM A MIN MAX MIN MAX MILLIMETERS 0.600 0.610 15.24 15.49 INCHES B 0.386 0.403 9.80 10.23 C 0.170 0.180 4.32 4.56 D 0.028 0.037 0.71 0.94 G 0.045 0.055 1.15 1.39 H J 0.018 0.026 0.46 0.66 K 1.028 1.042 26.11 26.47 L 0.355 0.365 9.02 9.27 M 5 NOM Q 0.142 0.148 3.61 3.75 U 0.490 0.501 12.45 12.72 V 0.045 0.055 1.15 1.39 NOTES: /Em/figure1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. /Em/figure2. CONTROLLING DIMENSION: INCH. /Em/figure3. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.003 (0.076) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. /Em/figure4. 821E−01 THRU 821−03 OBSOLETE, NEW STANDARD 821E−04. /C0095 5 NOM/C0095 0.088 0.102 2.24 2.59 A K U L Q D G B C M M V M J HSEATING PLANE OPTIONAL CHAMFER 175 /C0095

7 LEAD, TO−220

CASE 821E−04 ISSUE D NOTES: /Em/figure1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. /Em/figure2. CONTROLLING DIMENSION: INCH. /Em/figure3. DIMENSION D DOES NOT INCLUDE INTERCONNECT BAR (DAMBAR) PROTRUSION. DIMENSION D INCLUDING PROTRUSION SHALL NOT EXCEED 10.92 (0.043) MAXIMUM. A U D G B TM0.356 (0.014) MQ 7 PL −Q− K F J C E −T− N L M W DIM MIN MAX MIN MAX MILLIMETERSINCHES A 0.560 0.590 14.22 14.99 B 0.385 0.415 9.77 10.54 C 0.160 0.190 4.06 4.82 D 0.023 0.037 0.58 0.94 E 0.045 0.055 1.14 1.40 F 0.540 0.555 13.72 14.10 G 0.050 BSC 1.27 BSC J 0.014 0.022 0.36 0.56 K 0.785 0.800 19.94 20.32 L 0.322 0.337 8.18 8.56 M 0.073 0.088 1.85 2.24 N 0.090 0.115 2.28 2.91 Q 0.146 0.156 3.70 3.95 S 0.164 0.179 4.17 4.55 U 0.460 0.475 11.68 12.07 W 33°° R S H H 14.48 15.110.570 0.595 R 0.289 0.304 7.34 7.72 CASE 821J−02 ISSUE A

http://onsemi.com ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 CS8371/D NOCAP is a trademark of Semiconductor Components Industries, LLC (SCILLC). LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative SMART REGULATOR are registered trademarks of Semiconductor Components Industries, LLC (SCILLC).