CS70 STMICROELECTRONICS | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 24
Technical content
Datasheet sections
- 1 Application schematic and pin description
- 2 Absolute maximum ratings and operating conditions
- 3 Electrical characteristics
- 4 Electrical characteristics curves: current sense amplifier
- 5 Parameter definitions
- 5.1 Common-mode rejection ratio (CMR)
- 5.2 Supply voltage rejection ratio (SVR)
- 5.3 Gain (Av) and input offset voltage (V os)
- 5.4 Output voltage drift versus temperature
- 5.5 Input offset drift versus temperature
- 5.6 Output voltage accuracy
- 6 Maximum permissible voltages on pins
- 7 Application information
- 8 Package information
- 8.1 TSSOP8 package information
- 9 Revision history
Features
Independent supply and input common-mode voltages Wide common-mode operating range: 2.9 V to 70 V in single-supply configuration, -2.1 V to
65 V in dual-supply configuration
Wide common-mode surviving range: -16 V to
75 V (reversed battery and load-dump
conditions) Supply voltage range: 2.7 to 5.5 V in single- supply configuration Low current consumption: I CC max = 360 µA Pin selectable gain: 20 V/V, 25 V/V, 50 V/V or
100 V/V
Buffered output
Applications
Wireless battery chargers Chargers for portable equipment Precision current sources Wearable
Description
The CS70 measures a small differential voltage on a high-side shunt resistor and translates it into a ground-referenced output voltage. The gain is adjustable to four different values from 20 V/V up to 100 V/V by two selection pins. Wide input common-mode voltage range, low quiescent current, and tiny TSSOP8 packaging enable use in a wide variety of applications. The input common-mode and power-supply voltages are independent. The common-mode voltage can range from 2.9 V to 70 V in the single- supply configuration or be offset by an adjustable voltage supplied on the Vcc- pin in the dual- supply configuration. With a current consumption lower than 360 µA and a virtually null input leakage current in standby mode, the power consumption in the applications is minimized. 3SEL2 Vm SEL1 Gnd Vp 4Out
7 Vcc-
5 Vcc+
(Plastic package) Pin connections (top view) Table 1. Device summary
1 Application schematic and pin description
Figure 1. Single-supply configuration schematic
cover page and in Figure 1 on page 3. Table 2. Pin description Vcc+ Positive power supply line. Vcc- Negative power supply line. enters the shunt on the Vp side. exits the shunt on the Vm side.
2 Absolute maximum ratings and operating conditions
Table 3. Absolute maximum ratings
- These voltage values are measured with respect to the Vcc - pin.
- These voltage values are measured with respect to the Gnd pin.
- Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a
while the other pins are floating.
- Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between
connected pin combinations while the other pins are floating.
- Charged device model: all pins plus package are charged together to the specified voltage and then
discharged directly to ground. Table 4. Operating conditions
3 Electrical characteristics
test conditions unless otherwise specified. Tamb =2 5 ° C , Vcc+ =5V , Vcc- connected to Gnd (single-supply configuration). Vsense =V p-Vm =5 0m V , Vm = 12 V, no load on Out, all gain configurations. Table 5. Supply Table 6. Input
2.9 V< Vm < 70 V
2.9 V< V
1.2 V CC
- See Section 5: Parameter definitions for the definition of CMR.
- See Section 5 for the definition of SVR.
- See Section 5 for the definition of Vos.
Table 7. Output
- See Section 5: Parameter definitions for the definition of output voltage drift versus temperature.
- Output voltage accuracy is the difference with the expected theoretical output voltage Vout-th=Av*Vsense. See Section 5 for
Table 8. Frequency response
30 V or 30 V to -2 V
Table 9. Noise
4 Electrical characteristics curves: current sense
Figure 4. Output voltage vs. Vsense Figur e 5. Output voltage accuracy vs. Vsense Figure 6. Supply current vs. supply voltage Figure 7. Supply current vs. Vsense
CS70 Parameter definitions
5 Parameter definitions
5.1 Common-mode rejection ratio (CMR)
The common-mode rejection ratio (CMR) measures the ability of the current-sensing amplifier to reject any DC voltage applied on both inputs Vp and Vm. The CMR is referred back to the input so that its effect can be compared with the applied differential signal. The CMR is defined by the formula:
5.2 Supply voltage re jection ratio (SVR)
The supply-voltage rejection ratio (SVR) measures the ability of the current-sensing amplifier to reject any variation of the supply voltage VCC. The SVR is referred back to the input so that its effect can be compared with the applied differential signal. The SVR is defined by the formula:
5.3 Gain (Av) and input offset voltage (V os)
The input offset voltage is defined as the intersection between the linear regression of the Vout vs. Vsense curve with the X-axis (see Figure 17). If Vout1 is the output voltage with Vsense =V sense1 and Vout2 is the output voltage with Vsense =V sense2, then Vos can be calculated with the following formula. CMR 20 – Vout SVR 20 – Vout Vos Vsense1 Vsense1 Vsense2– –=
Figure 17. Vout versus Vsense characteristics: detail for low Vsense values Table 10. Test conditions for Vos voltage calculation
5.4 Output voltage drift versus temperature
Vout versus T, and T = 25 °C is considered to be the reference. Figure 18. Output voltage drift versus temperature (Av = 50 V/V Vsense =5 0m V )
5.5 Input offset drif t versus temperature
versus T, and T = 25 °C is considered to be the reference. Figure 19. Input offset drift versus temperature (Av = 50 V/V)
5.6 Output voltage accuracy
input differential voltage multiplied by the theoretical gain, as in the following formula.
Figure 20. Vout vs. Vsense theoretical and actual characteristics
6 Maximum permissible voltages on pins
the maximum voltage between Vcc- and Vcc+ is limited to 15 V. Figure 21. Maximum voltages on pins
7 Application information
Figure 22. Single-supply configuration schematic g1 so that the voltage drop across Rg1 matches Vsense exactly. negligible). Therefore, the voltage drop on the Rg3 resistor can be calculated as follows. VRg3 =R g3.IRg1 =( Rg3/Rg1).Vsense= K1.Vsense with K1=Rg3/Rg1.
The resistor ratio, K1 = Rg3/Rg1, is internally set to 20 V/V, and the voltage buffer gain, K2, can be set to 1, 1.25, 2.5, or 5 depending on the voltage applied on the SEL1 and SEL2 pins. Since they define the full-scale output range of the application, the R sense resistor and the amplification gain Av are important parameters and must therefore be selected carefully.
8 Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.
8.1 TSSOP8 package information
Figure 23. TSSOP8 package mechanical drawing Table 11. TSSOP8 package mechanical data
9 Revision history
Table 12. Document revision history 06-Mar-2014 1 Initial release.