CS4192 ONSEMI | Alldatasheet
Document overview
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- PDF pages: 8
Technical content
Features
- Serial Input Bus
- 2.0 MHz Operating Frequency
- Tangential Drive Algorithm
- 70 mA Drive Circuits
- 0.5° Accuracy (Typ.)
- Power–On–Reset
- Protection Features – Output Short Circuit – Overtemperature
- Internally Fused Leads in SO–16L Package http://onsemi.com A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week PIN CONNECTION AND MARKING DIAGRAM Device Package Shipping
ORDERING INFORMATION
CS4192XDWF16 SO–16L 46 Units/Rail CS4192XDWFR16 SO–16L 1000 Tape & Reel SO–16L DWF SUFFIX CASE 751G CS4192 AWLYYWW SCLKOE 1 16 CSVCC STSI GNDGND GNDGND SOVBB COS–SIN+ COS+SIN–
7 Bit
Figure 1. Block Diagram
- 60 seconds max above 183°.
*The maximum package power dissipation must be observed.
http://onsemi.com ELECTRICAL CHARACTERISTICS (–40°C ≤ TJ ≤ 105°C; 7.5 V ≤ VBB ≤ 14 V, 4.5 V ≤ VCC ≤ 5.5 V; unless otherwise specified. Note 2.) Characteristic Test Conditions Min Typ Max Unit Supply Voltages and Currents VBB Quiescent Current Output disabled (OE = 0 V) [RCOS , RSIN = RL(MIN)] @ 45° (code = X’080) VBB = 14 V 1.0 5.0 175 mA mA VCC Quiescent Current OE, CS, DI = high, VBB = 0 V, SCLK = 2.0 MHz – – 1.15 mA Digital Inputs and Outputs Output High Voltage SO, IOH = 0.8 mA VCC – 0.8 – – V Output Low Voltage SO, IOL = 0.8 mA ST, IOL = 2.5 mA 0.4 0.8 V V Output Off Leakage ST, VCC = 5.0 V – – 25 µA Input High Voltage CS, SCLK, SI, OE 0.7 × VCC – – V Input Low Voltage CS, SCLK, SI, OE – – 0.3 × VCC V Input High Current CS, SCLK, SI, OE; VIN = 0.7 × VCC – – 1.0 µA Input Low Current CS, SCLK, SI, OE; VIN = 0.3 × VCC – – 1.0 µA Analog Outputs Output Function Accuracy – –1.2 ±0.5 +1.2 deg Output Shutdown Current, SourceVBB = 14 V 70 125 250 mA Output Shutdown Current, Sink VBB = 14 V 70 125 250 m Α Output Shutdown Current, SourceVBB = 7.5 V 43 125 250 m Α Output Shutdown Current, Sink VBB = 7.5 V 43 125 250 m Α Thermal Shutdown – – 170 – °C Thermal Shutdown Hysteresis – – 20 – °C Coil Drive Output Voltage – – 0.748× VBB – V Minimum Load Resistance TA = 105°C TA = 25°C TA = –40°C 229 171 150 Ω Ω Ω Shift Clock Frequency – – – 2.0 MHz SCLK High Time – 175 – – ns SCLK Low Time – 175 – – ns SO Rise Time 0.75 V to VCC – 1.2 V; CL = 90 pF – – 150 ns SO Fall Time 0.75 V to VCC – 1.2 V; CL = 90 pF – – 150 ns SO Delay Time C L = 90 pF – – 150 ns SI Setup Time – 75 – – ns SI Hold Time – 75 – – ns CS Setup Time Note 3. 0 – – ns CS Hold Time – 75 – – ns 2. Designed to meet these characteristics over the stated voltage and temperature ranges, though may not be 100% parametrically tested in production. 3. OE must be high at falling edge of CS. This condition ensures valid output for any given input.
http://onsemi.com PIN FUNCTION DESCRIPTION PACKAGE PIN # PIN SYMBOL FUNCTION
16 Lead SO Wide
1 SIN– Negative output for SINE coil. 2 SIN+ Positive output SINE coil. 3 VBB Analog supply. Nominally 13.5 V. 4, 5, 12, 13 GND Ground. 6 SI Serial data input. Data present at the rising edge of the clock signal is shifted into the internal shift register. 7 VCC 5.0 V logic supply. The internal registers and latches are reset by a POR generated by the rising edge of the voltage on this pin. 8 OE Controls the state of the output buffers. A logic low on this pin turns them off. 9 SCLK Serial clock for shifting in/out of data. Rising edge shifts data on SI into the shift register and the falling edge changes the data on SO.
10 CS When high allows data at SI to be shifted into part with the
rising edges of SCLK. The falling edge transfers the shift register contents into the DAC and multiplexer to update the output buffers. The falling edge also reenables the output drivers if they have been disabled by a fault.
11 ST STATUS reflects the state of the outputs and is low anytime
the outputs are disabled, either by OE or the internal protec- tion circuitry. Requires external pull–up resistor. 14 SO Serial data output. Existing 10–bit data is shifted out when new data is shifted in. Allows cascading of multiple devices on common serial port. 15 COS– Negative output for COSINE coil. 16 COS+ Positive output for COSINE coil.
varies in any 45 degree range. Figure 2. SIN, COS Outputs
0.748 VBB
Figure 3. Gauge Response port. These 10 bits are divided as shown in Figure 4. Figure 4. Definition of Serial Word 360° circle is divided into 1024 equal parts of 0.35° each. updated and the outputs change accordingly. Figure 5. Serial Data Timing Diagram Figure 6 shows the power–up sequence for the CS4192. before the falling edge of CS to enable the output buffers. Figure 6. Power Up Sequence
Figure 7. Application Diagram
http://onsemi.com PACKAGE DIMENSIONS SO–16L DWF SUFFIX CASE 751G–03 ISSUE B D 14X B16X SEATING PLANE SAM0.25 B ST 16 9 h X 45 MBM0.25 H8X E B A e T A L C NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INLCUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM MIN MAX MILLIMETERS A 2.35 2.65 A1 0.10 0.25 B 0.35 0.49 C 0.23 0.32 D 10.15 10.45 E 7.40 7.60 e 1.27 BSC H 10.05 10.55 h 0.25 0.75 L 0.50 0.90 0 7 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION JAPAN : ON Semiconductor, Japan Customer Focus Center 4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031 Phone : 81–3–5740–2700 Email: r14525@onsemi.com ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative. CS4192/D Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone : 303–675–2175 or 800–344–3860 Toll Free USA/Canada Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada Email: ONlit@hibbertco.com N. American Technical Support: 800–282–9855 Toll Free USA/Canada