CS3842B CHERRY | Alldatasheet
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S R PWM Latch Current Sense Comparator Oscillator 1 VR 2 R VCError Amplifier 2.50V Set/ Reset Undervoltage Lock-out Circuit 34V ( ) Indicates CS-3843B 16V/10V (8.4V/7.6V) VCC Pwr Pwr Gnd REF I Very low Start Up Current (300µA typ) I Optimized Off-line Control I Internally Trimmed, Temperature Compensated Oscillator I Maximum Duty-cycle Clamp I V REF stabilization before Output Enable I Pulse-by-pulse Current Limiting I Improved Undervoltage Lockout I Double Pulse Suppression I 1% Trimmed Bandgap Reference I High Current Totem Pole Output Package Options CS3842B/3843B Off-Line Current Mode PWM Control Circuit with Very Low Start Up Current CS3842B/CS3843B
Description
Analog Inputs (V Lead Temperature Soldering 1COMP VFB Sense OSC VREF VCC VOUT Gnd
8 Lead PDIP & SO Narrow
Rev. 6/23/99 Cherry Semiconductor Corporation
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786 Email: info@cherry-semi.com Web Site: www.cherry-semi.com A Company ® The CS384XB provides all the neces- sary features to implement off-line fixed frequency current-mode control with a minimum number of external components. The family has been opti- mized for very low start up current (300µA, typ). The CS384XB family incorporates a precision temperature-controlled oscil- lator with an internally trimmed dis- charge current to minimize variations in frequency. A precision duty-cycle clamp eliminates the need for an exter- nal oscillator when a 50% duty-cycle is used. Duty-cycles of almost 100% are possible. On board logic ensures that VREF is stabilized before the output stage is enabled. Ion-implant resistors provide tighter control of undervoltage lockout. Other features include pulse-by-pulse current limiting, and a high-current totem pole output for driving capaci- tive loads, such as the gate of a power MOSFET. The output is LOW in the off state, consistent with N-channel devices. These ICs are available in 8 and 14 lead surface mount (SO) and 8 lead PDIP packages.
Electrical Characteristics: 0≤TA≤70˚C, VCC=15V (Note 1); RT=680Ω, CT=.022µF for triangular mode, RT=10kΩ, CT=3.3nF for sawtooth mode (see Fig. 3), unless otherwise stated PARAMETER TEST CONDITIONS MIN TYP MAX UNITS CS3842B/3843B I Reference Section Output Voltage T J=25˚C, IOUT=1mA 4.90 5.00 5.10 V Line Regulation 12 ≤VIN≤25V 6 20 mV Load Regulation 1 ≤IOUT≤20mA 6 25 mV Temperature Stability (Note 2) 0.2 0.4 mV / ˚C Total Output Variation Line, Load, Temperature (Note 2) 4.82 5.18 V Output Noise Voltage 10Hz ≤f≤10kHz, T J=25˚C (Note 2) 50 µV Long Term Stability T A=125˚C, 1kHrs. (Note 2) 5 25 mV Output Short Circuit T A=25˚C -30 -100 -180 mA I Oscillator Section Initial Accuracy Sawtooth Mode (see Fig. 3), T J=25˚C4 7 5 2 5 7 k H z Triangular Mode (see Fig. 3), TJ=25˚C4 4 5 2 6 0 k H z Voltage Stability 12 ≤VCC≤25V 0.2 1.0 % Temp. Stability Sawtooth Mode T MIN≤TA≤TMAX (Note 2) 5 % Triangular Mode TMIN≤TA≤TMAX (Note 2) 8 % Amplitude Oscillator peak to peak 1.7 V Discharge Current T J=25˚C 7.5 8.3 9.3 mA TMIN≤TA≤TMAX 7.2 9.5 mA I Error Amp Section Input Voltage V COMP=2.5V 2.42 2.50 2.58 V Input Bias Current -0.3 -2.0 µA A VOL 2≤VOUT≤4V 65 90 dB Unity Gain Bandwidth (Note 2) 0.7 1.0 MHz PSRR 12 ≤V CC≤25V 60 70 dB Output Sink Current V FB=2.7V, VOSC=1.1V 2 6 mA Output Source Current V FB=2.3V, VOSC=5V -0.5 -0.8 mA VOUT High V FB=2.3V, RL=15kΩ to ground 5 6 V VOUT Low V FB=2.7V, RL=15kΩ to VREF 0.7 1.1 V I Current Sense Section Gain (Notes 3 & 4) 2.85 3.00 3.15 V/V Maximum Input Signal V COMP=5V (Note 3) 0.9 1.0 1.1 V PSRR 12 ≤VCC≤25V (Note 3) 70 dB Input Bias Current -2 -10 µA Delay to Output T J=25˚C (Note 2) 150 300 ns I Output Section Output Low Level I SINK=20mA 0.1 0.4 V ISINK=200mA 1.5 2.2 V Output High Level I SOURCE=20mA 13.0 13.5 V ISOURCE=200mA 12.0 13.5 V
Electrical Characteristics: continued PARAMETER TEST CONDITIONS MIN TYP MAX UNITS CS-3842B CS-3843B PARAMETER TEST CONDITIONS MIN TYP MAX MIN TYP MAX UNITS Notes: 1. Adjust V CC above the start threshold before setting at 15V. 2. These parameters, although guaranteed, are not 100% tested in production. 3. Parameter measured at trip point of latch with V FB=0. 4. Gain defined as: A = ; 0 ≤ VSense ≤ 0.8V. ∆VCOMP ∆VSense Package Pin Description PACKAGE PIN # PIN SYMBOL FUNCTION 8L PDIP/SO 14L SO Narrow 1 1 COMP Error amp output, used to compensate error amplifier 23 V FB Error amp inverting input 3 5 Sense Noninverting input to Current Sense Comparator 4 7 OSC Oscillator Timing Network with Capacitor to Ground, resistor to V REF 5 8 Gnd Ground
9 Pwr Gnd Output driver Ground
61 0 V OUT Output drive pin
11 V CCPwr Output driver positive supply
71 2V CC Positive power supply 81 4V REF Output of 5V internal reference 2,4,6,13 NC No Connection I Output Section: continued Rise Time T J=25˚C, CL=1nF (Note 2) 50 150 ns Fall Time T J=25˚C, CL=1nF (Note 2) 50 150 ns Output Leakage UVLO Active, V OUT=0 -0.01 -10.00 µA I Total Standby Current Start-Up Current 0.3 0.5 mA Operating Supply Current V FB=VSense=0V RT=10kΩ, CT=3.3nF 11 17 mA VCC Zener Voltage I CC=25mA 34 V I Under-Voltage Lockout Section Voltage
During Undervoltage Lockout (Figure 1), the output driv- er is biased to a high impedance state. VOUT should be shunted to ground with a resistor to prevent output leak- age current from activating the power switch. PWM Waveform To generate the PWM waveform, the control voltage from the error amplifier is compared to a current sense signal which represents the peak output inductor current (Figure 2). An increase in V CC causes the inductor current slope to increase, thus reducing the duty cycle. This is an inherent feed-forward characteristic of current mode con- trol, since the control voltage does not have to change during changes of input supply voltage. When the power supply sees a sudden large output cur- rent increase, the control voltage will increase allowing the duty cycle to momentarily increase. Since the duty CS3842B/3843B Test Circuit VREF VCC VOUT 1k Ω 0.1 µF 0.1 µF VREF VCC VOUT Gnd VFB Sense OSC COMP 5k Ω 100k Ω 4.7k Ω 1k Ω ERROR AMP ADJUST 4.7k Ω Sense ADJUST RT 2N2222 CT Gnd A CS-3842B CS-3843B Circuit Description Typical Performance Characteristics: Oscillator Duty Cycle vs RTOscillator Frequency vs CT VCC ON/OFF Command to reset of IC VON 16V 8.4V VOFF 10V 7.6V CS3842B CS3843B <0.5mA <15mA VON VOFF ICC VCC Figure 1: Typical Undervoltage Characteristics 800 900 FREQ. (kHz) CT (µF) 700 600 500 400 300 200 100 .05 RT =1.5kΩ RT =680Ω RT =10kΩ 100 200 700 1k 2k 5k 7k 10k DUTY CYCLE (%) RT (Ω) 4k3k500400300 100
D Lead Count Metric English Max Min Max Min 8 L PDIP 10.16 9.02 .400 .355 8 L SOIC Narrow 5.00 4.80 .197 .189 14L SOIC Narrow 8.75 8.55 .344 .337 Part Number Description CS3842BGN8 8L PDIP CS3842BGD8 8L SO Narrow CS3842BGDR8 8L SO Narrow (tape & reel) CS3842BGD14 14L SO Narrow CS3842BGDR14 14L SO Narrow (tape & reel) CS3843BGN8 8L PDIP CS3843BGD8 8L SO Narrow CS3843BGDR8 8L SO Narrow (tape & reel) CS3843BGD14 14L SO Narrow CS3843BGDR14 14L SO Narrow (tape & reel) Thermal Data 8 L 8L 14 L PDIP SO Narrow SO Narrow RΘJC typ 52 45 30 ˚C/W RΘJA typ 100 165 125 ˚C/W Package Specification PACKAGE DIMENSIONS IN mm (INCHES)
Ordering Information
Rev. 6/23/99 CS3842B/3843B © 1999 Cherry Semiconductor Corporation Surface Mount Narrow Body (D); 150 mil wide 0.33 (.013) 6.20 (.244) 5.80 (.228) 4.00 (.157) 3.80 (.150) 1.57 (.062) 1.37 (.054) D 0.25 (0.10) 0.10 (.004) 1.75 (.069) MAX 1.27 (.050) 0.40 (.016) REF: JEDEC MS-012 0.25 (.010) 0.19 (.008) Plastic DIP (N); 300 mil wide 0.39 (.015) MIN. 1.14 (.045) D Some 8 and 16 lead packages may have 1/2 lead at the end of the package. All specs are the same. .203 (.008) .356 (.014) REF: JEDEC MS-001 3.68 (.145) 2.92 (.115) 8.26 (.325) 7.62 (.300) 7.11 (.280) 6.10 (.240) .356 (.014) .558 (.022) Cherry Semiconductor Corporation reserves the right to make changes to the specifications without notice. Please contact Cherry Semiconductor Corporation for the latest available information.