CS3750

CS3750 CHERRY | Alldatasheet

Document overview

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Technical content

Features

IN2DIR2IN1DIR1VS1,2 n 2 Independent NPN H-Bridge Drivers n No Analog Trim Required n Used in Multiplexed Systems n Quiet Gauge Operation n Programmable Slew Rate Minimizes Switching Noise n Fault Protection Over Voltage Thermal Shutdown Short CircuitPackage Options

16 Lead PDIP

(internally fused leads) CS3750 100mA Dual H-Bridge Air-Core Gauge Driver 1DIR1 IN1 Gnd Gnd OUT1A VS1 OUT1B DIR2 IN2 Gnd Gnd OUT2A VS2 OUT2B

Description

The CS3750 is a dual H-bridge four quadrant air-core gauge driver. The IC provides all the functions necessary to drive a tachometer or speedometer as part of a microprocessor based multi- plexed system. Digital input control eliminates the need for any analog cali- bration of the gauge. The controlling microprocessor sends out a PWM signal to each H bridge driver input (IN1, IN2). The PWM sig- nal duty cycle is proportional to the HÐbridge output. Output current (100mA max) direction is controlled by the DIRECTION input. PWM switch- ing noise is minimized at each half bridge by an internal RC filter and external programmable capacitor. The CS3750 is protected against 50V load dump, over voltage and thermal runaway fault conditions. Any of these faults causes the IC to shut down. Each high side of the output driver is current limited. A short circuit condition in one driver does not affect the others. CS3750 Lead Temperature Soldering Rev. 7/20/95 Cherry Semiconductor Corporation

2000 South County Trail, East Greenwich, RI 02818

Tel: (401)885-3600 Fax: (401)885-5786 Email: info@cherry-semi.com Web Site: www.cherry-semi.com A Company ¨

Electrical Characteristics: 7.5V <= VCC<=15V; -40¡C ² TA ² +85¡C unless otherwise specified. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT CS3750 Note 1: Time required for output signal to rise to 90% of its amplitude after input signal switches. Note 2: Time required for output signal to decrease to 10% of its amplitude after input signal switches. n Output Stage VOUT Saturation Voltage I OUT=100mA; VIN=0V 0.25 0.50 V (Low Side) I OUT=1mA; VIN=0V 0.01 0.10 V VOUT Offset Voltage V C=5V; IOUT=-30mA 15 50 mV VOUT Saturation High Side V IN=5V;IOUT=-100mA VS-2 VS-1.5 VS V Low Side V IN=0V;IOUT=-1mA 0.02 0.10 V VOUT Differential V C=5V, IOUT=-100mA 100 mV Matching Voltage Supply Current V IN=VDIR=0; 23 45 mA n Input Stage VIN LOW V IN decreasing; VDIR=0V 0.8 1.9 V HIGH V IN increasing; VDIR=0V 2.0 3.5 V Hysteresis V DIR=0V 100 mV IIN LOW V IN=0.8V; VDIR=0V 20 100 µA HIGH V IN=3.5V 0.4 100.0 µA Output Slew Rate V IN=250Hz; RLOAD=150½ 0.2 0.8 V/us with respect to input Output Turn on Delay V IN=250Hz; RLOAD=150½, note 1 1.5 6 µs with respect to input Output Turn off Delay V IN=250Hz; RLOAD=150½, note 2 2.4 9 µs with respect to input n Direction VDIR LOW V IN=5V; VDIR decreasing 0.8 1.9 V HIGH V IN=5V; VDIR increasing 2.0 3.5 V Hysteresis V IN=5V 100 mV IDIR LOW V IN=0V; VDIR=0.8V 40 100 µA HIGH V IN=0V; VDIR=3.5V 0.4 100 µA Output Slew Rate V IN=5V; fDIR=250Hz; C=0µF 0.2 1.5 V/µs with respect to DIR Output Fall Time V IN=0V; VDIR=0V; C=0µF 0.2 2.0 µs with respect to DIR Output Turn on Delay V IN=5V; RLOAD=150½ with respect to DIR V DIR=250Hz; C=0µF, note 1 1 6 µs Output Turn off Delay V IN=5V; RLOAD=150½ with respect to DIR V DIR=250Hz; C=0µF, note 2 2.5 9 µs n Protection Functions IOUT Current Limit V IN=5V 100 225 mA (High Side Only) Over Voltage Threshold V IN=5V 17.0 21.5 26.0 V Hysteresis 0.5 V Thermal Shutdown 160 ¡C Hysteresis 20 ¡C

1 DIR1 CMOS compatible input pin controls direction of current

2 C1 RC filter capacitor for OUT1 connected to Ground

3 IN1 CMOS compatible input pin controls output OUT1A and 1B

6 OUT1A One half of H-bridge output stage 1

7 VS1 Supply voltage

8 OUT1B One half of H-bridge output stage 1

9 OUT2B One half of H-bridge output stage 2

10 VS2 Supply voltage

11 OUT2A One half of H-bridge output stage 2

14 IN2 CMOS compatible input pin controls output OUT2A and 2B

15 C2 RC filter capacitor for OUT2 connected to Ground

16 DIR2 CMOS compatible input pin controls direction of current

H-bridge is controlled by the logic signal DIRx. OUTxB out to the coil and back in through OUTxA. Table 1. Logic Control of H-Bridge tions occurs, all outputs shut down.

CS3750ENF16 16L PDIP (internally fused leads) Thermal Data 16L PDIP (internally fused leads) RQJC typ 15 ûC/W RQJA typ 50 ûC/W Package Specification PACKAGE DIMENSIONS IN mm (INCHES)

Ordering Information

Rev. 7/20/95 CS3750 D Lead Count Metric English Max Min Max Min 16L PDIP 19.69 18.67 .775 .735 (internally fused leads) © 1999 Cherry Semiconductor Corporation Cherry Semiconductor Corporation reserves the right to make changes to the specifications without notice. Please contact Cherry Semiconductor Corporation for the latest available information. Plastic DIP (N); 300 mil wide 0.39 (.015) MIN. 1.14 (.045) D Some 8 and 16 lead packages may have 1/2 lead at the end of the package. All specs are the same. .203 (.008) .356 (.014) REF: JEDEC MS-001 3.68 (.145) 2.92 (.115) 8.26 (.325) 7.62 (.300) 7.11 (.280) 6.10 (.240) .356 (.014) .558 (.022)