CS2841B ONSEMI | Alldatasheet

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Technical content

Features

  • Optimized for Off−Line Control
  • Internally Trimmed Temperature Compensated Oscillator
  • Maximum Duty−Cycle Clamp
  • VREF Stabilized Before Output Stage Enabled
  • Low Start−Up Current
  • Pulse−By−Pulse Current Limiting
  • Improved Undervoltage Lockout
  • Double Pulse Suppression
  • 1.0 % Trimmed Bandgap Reference
  • High Current Totem Pole Output
  • Pb−Free Packages are Available* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. CS2841B = Device Code A = Assembly Location WL = Wafer Lot YY, Y = Year WW = Work Week G = Pb−Free Package PDIP−8 N SUFFIX CASE 626 PIN CONNECTIONS AND MARKING DIAGRAM VREF VCC VOUT GND COMP VFB Sense OSC SOIC−14 D SUFFIX CASE 751A GNDOSC PWR GNDNC VOUTSense VCC PWRNC VCCVFB NCNC VREFCOMP SOIC−14 PDIP−8 http://onsemi.com CS2841BEBG AWL YYWW CS2841BD14G AWLYWW See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet.

ORDERING INFORMATION

http://onsemi.com Figure 1. Block Diagram damage may occur and reliability may be affected.

  1. 60 seconds max above 183 °C

Device Package Shipping† CS2841BEBN8 PDIP−8 50 Units / Rail CS2841BEBN8G PDIP−8 (Pb−Free)

50 Units / Rail

CS2841BED14 SOIC−14 55 Units / Rail CS2841BED14G SOIC−14 (Pb−Free)

55 Units / Rail

CS2841BEDR14 SOIC−14 2500 / Tape & Reel CS2841BEDR14G SOIC−14 (Pb−Free) 2500 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

http://onsemi.com ELECTRICAL CHARACTERISTICS (−40°C ≤ TA ≤ 85°C, RT = 680 k/C0087, CT = 0.022 /C0109F for Triangular Mode, VCC = 15 V (Note 3), RT = 10 k/C0087, CT = 3.3 nF for Sawtooth Mode (see Figure 7); unless otherwise specified.) Characteristic Test Conditions Min Typ Max Unit Reference Section Output Voltage TJ = 25°C, IOUT = 1.0 mA 4.9 5.0 5.1 V Line Regulation 8.4 ≤ VCC ≤ 16 V − 6.0 20 mV Load Regulation 1.0 ≤ IOUT ≤ 20 mA − 6.0 25 mV Temperature Stability Note 4 − 0.2 0.4 mV/°C Total Output Variation Line, Load, Temp. Note 4 4.82 − 5.18 V Output Noise Voltage 10 Hz ≤ f ≤ 10 kHz, TJ = 25°C. Note 4 − 50 − /C0109V Long Term Stability TA = 125°C, 1000 Hrs. Note 4 − 5.0 25 mV Output Short Circuit TA = 25°C −30 −100 −180 mA Oscillator Section Initial Accuracy Sawtooth Mode: TJ = 25°C. See Figure 7. Sawtooth Mode: −40°C ≤ TA ≤ +85°C Triangular Mode: TJ =25°C. See Figure 7. kHz kHz kHz Voltage Stability 8.4 ≤ VCC ≤ 16 V − 0.2 1.0 % Temperature Stability Sawtooth Mode: TMIN ≤ TA ≤ TMAX. Note 4 Triangular Mode: TMIN ≤ TA ≤ TMAX. Note 4 5.0 8.0 Amplitude VOSC (Peak to Peak) − 1.7 − V Discharge Current TJ = 25°C TMIN ≤ TA ≤ TMAX 7.4 7.2 8.3 9.2 9.4 mA mA Error Amp Section Input Voltage VCOMP = 2.5 V 2.42 2.5 2.58 V Input Bias Current VFB = 0 V − −0.3 −2.0 /C0109A AVOL 2.0 ≤ VOUT ≤ 4.0 V 65 90 − dB Unity Gain Bandwidth Note 4 0.7 1.0 − MHz PSRR 8.4 V ≤ VCC ≤ 16 V 60 70 − dB Output Sink Current VFB = 2.7 V, VCOMP = 1.1 V 2.0 6.0 − mA Output Source Current VFB = 2.3 V, VCOMP = 5.0 V −0.5 −0.8 − mA VOUT High VFB = 2.3 V, RL = 15 k/C0087 to Ground 5.0 6.0 − V VOUT Low VFB = 2.7 V, RL = 15 k/C0087 to VREF − 0.7 1.1 V Current Sense Section Gain Notes 5 and 6 2.85 3.0 3.15 V/V PSRR 12 V ≤ VCC ≤ 25 V. Note 5 − 70 − dB Input Bias Current VSense = 0 V − −2.0 −10 /C0109A Delay to Output TJ = 25°C. Note 4 − 150 300 ns 3. Adjust V CC above the start threshold before setting at 15 V 4. These parameters, although guaranteed, are not 100% tested in production 5. Parameter measured at trip point of latch with V FB = 0 6. Gain defined as: A /C0043/C0068VCOMP /C0068VSense ;0 /C0118VSense /C01180.8 V.

http://onsemi.com ELECTRICAL CHARACTERISTICS (−40°C ≤ TA ≤ 85°C, RT = 680 k/C0087, CT = 0.022 /C0109F for Triangular Mode, VCC = 15 V (Note 3), RT = 10 k/C0087, CT = 3.3 nF for Sawtooth Mode (see Figure 7); unless otherwise specified.) Characteristic UnitMaxTypMinTest Conditions Output Section Output Low Level ISINK = 20 mA ISINK = 200 mA 0.1 1.5 0.4 2.2 V V Output High Level ISOURCE = 20 mA ISOURCE = 200 mA 13.5 13.5 V V Rise Time TJ = 25°C, CL = 1.0 nF. Note 7 − 50 150 ns Fall Time TJ = 25°C, CL = 1.0 nF. Note 7 − 50 150 ns Output Leakage Undervoltage Active, VOUT = 0 − −0.01 −10 /C0109A Total Standby Current Startup Current − − 0.5 1.0 mA Operating Supply Current ICC VFB = VSense = 0 V, RT = 10 k/C0087, CT = 3.3 nF − 11 17 mA Undervoltage Lockout Section Start Threshold − 7.6 8.0 8.4 V Min. Operating Voltage After Turn On 7.0 7.4 7.8 V 7. These parameters, although guaranteed, are not 100% tested in production. PACKAGE PIN DESCRIPTION PACKAGE PIN # PIN SYMBOL FUNCTIONPDIP−8 SOIC−14 1 1 COMP Error Amp Output, Used to Compensate Error Amplifier 2 3 VFB Error Amp Inverting Input 3 5 Sense Noninverting Input to Current Sense Comparator 4 7 OSC Oscillator Timing Network with Capacitor to Ground, Resistor to V REF 5 8 GND Ground

9 Pwr GND Output Driver Ground

6 10 VOUT Output Drive Pin

11 VCC Pwr Output Driver Positive Supply

7 12 VCC Positive Power Supply 8 14 VREF Output of 5.0 V Internal Reference 2, 4, 6, 13 NC No Connection

Figure 8. Flyback Application

Figure 9. Boost Application

http://onsemi.com PACKAGE DIMENSIONS PDIP−8 CASE 626−05 ISSUE L NOTES: 1. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 2. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. F NOTE 2 −A− −B− −T− SEATING PLANE H J G D K N C L M MAM0.13 (0.005) B MT DIM MIN MAX MIN MAX INCHESMILLIMETERS A 9.40 10.16 0.370 0.400 B 6.10 6.60 0.240 0.260 C 3.94 4.45 0.155 0.175 D 0.38 0.51 0.015 0.020 F 1.02 1.78 0.040 0.070 G 2.54 BSC 0.100 BSC H 0.76 1.27 0.030 0.050 J 0.20 0.30 0.008 0.012 K 2.92 3.43 0.115 0.135 L 7.62 BSC 0.300 BSC N 0.76 1.01 0.030 0.040 /C0095/C0095 SOIC−14 CASE 751A−03 ISSUE G NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. −A− −B− G P 7 PL 14 8 M0.25 (0.010) B M SBM0.25 (0.010) A ST −T− FR X 45 SEATING PLANE D 14 PL K C JM /C0095 DIM MIN MAX MIN MAX INCHESMILLIMETERS A 8.55 8.75 0.337 0.344 B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.054 0.068 D 0.35 0.49 0.014 0.019 F 0.40 1.25 0.016 0.049 G 1.27 BSC 0.050 BSC J 0.19 0.25 0.008 0.009 K 0.10 0.25 0.004 0.009 M 0 7 0 7 P 5.80 6.20 0.228 0.244 R 0.25 0.50 0.010 0.019 /C0095/C0095/C0095/C0095

http://onsemi.com ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION N. American Technical Support: 800−282−9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 CS2841B/D LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative.