CS2001 ONSEMI | Alldatasheet
Document overview
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Technical content
Features
- Linear Regulator 5.0 V ±2% @ 100 mA
- Switching Regulator 1.2 A Peak Internal Switch
- V oltage Tripler
- Smart Functions – Smartswitch – RESET – Energy Reserve Status
- Protection – Overtemperature – Current Limit – 50 V Peak Transient Capability
- Internally Fused Leads in SO–20L Package http://onsemi.com Device Package Shipping
ORDERING INFORMATION
CS2001YDWF20 SO–20L 37 Units/Rail CS2001YDWFR20 SO–20L 1000 Tape & Reel A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week PIN CONNECTIONS MARKING DIAGRAM SO–20L DWF SUFFIX CASE 751D CS2001 AWLYYWW 1 20 VCHGVSW GND5GND4 GND6GND3 GND7GND2 GND8GND1 NERDVFB RESETBVBAT VOUTVER IBIASSWSD C PUMPCOMP
Figure 1. Application Diagram
- 60 second maximum above 183°C.
*The maximum package power dissipation must be observed.
http://onsemi.com ELECTRICAL CHARACTERISTICS (8.0 V ≤ VBAT ≤ 16 V, 8.0 V ≤ VER ≤ 25 V, 1.0 mA ≤ IV(OUT) ≤ 100 mA, TTEST = –40°C to 125°C; unless otherwise specified.) Characteristic Test Conditions Min Typ Max Unit Linear Regulator Output Voltage Output Driven from VBAT, VER = 25 V Output Driven from VER, VBAT = 0 V 4.9 4.9 5.1 5.1 V V Regulator Bias Current (from VBAT ) IV(BAT) @ IV(OUT) = –100 mA, SWSD = 4.0 V, VBAT = 16 V, VER = 25 V T = –40°C T = 25°C T = 125°C 8.0 7.0 6.0 mA mA mA Regulator Bias Current (from VER)IVER @ IV(OUT) = –100 mA, SWSD = 4.0 V, VBAT = 0 V, VER = 25 V T = –40°C T = 25°C T = 125°C 9.0 8.0 mA mA mA Dropout Voltage VBAT – VOUT VER = 25 V, IV(OUT) = –100 mA (Probe Only) – – 1.5 V Dropout Voltage VER – VOUT VBAT = 0 V, IV(OUT) = –100 mA – – 1.5 V Smart Switch Threshold VBAT to VER VER = 25 V, IV(OUT) = –50 mA 6.5 – 8.0 V Smart Switch Threshold HysteresisVER = 25 V, IV(OUT) = –50 mA 0.5 – 1.0 V VOUT Output Noise VBAT = 16 V, VER = 25 V, IV(OUT) = – 1.0 mA, C = 10 µF, ESR = 0.5 Ω – – 0.05 V Line Regulation – – – 0.025 V Load Regulation – – – 0.025 V Output Current Limit – 120 – – mA Switching Regulator VER = 25V, I V(OUT) = –1.0 mA Switching Frequency C PUMP 270 pF, RI(BIAS) = 30.1 kΩ 135 150 165 kHz Pump Drive Current ΔIV(BAT) for 0 A ≤ IV(SW) ≤ 1.2 A – – 50 mA Switch Saturation Voltage IV(SW) = 1.2 A – – 1.6 V Output Current Limit – 1.2 – 2.4 A VFB Regulation – 1.238 1.27 1.303 V VFB Input Current VFB Above Short Low Detection Level – – 1.0 µA VFB Input Shorted Low Detection Level – 200 250 300 mV C PUMP Short Detection Threshold – 200 250 300 mV Maximum Duty Cycle – 80 – 95 % VSW Leakage Current IV(SW) @ VSW = 50 V, SWSD = VOUT – – 100 µA Voltage Tripler V BAT = 16 V, IV(OUT) = –1.0 mA, CCHG = 1.5 F Output Voltage Clamp VCHG – VER VER = 8.0 V, IV(CHG) = –30 µA VER = 12 V, IV(CHG) = –90 µA 6.25 6.25 8.0 8.0 V V Initial Charge Time C CHG = 0.15 µF, VER = 8.0 V, VCHG = 14.25 V – – 30 ms Maximum Output Voltage Clamp VCHG – 25 32.5 40 V Output Voltage Clamp VCHG VER = 28 V, IV(CHG) = 0 µA 25 32.5 40 V Short Circuit Path Current Limit VER to VCHG – – – 3.0 mA
http://onsemi.com ELECTRICAL CHARACTERISTICS (continued) (8.0 V ≤ VBAT ≤ 16 V, 8.0 V ≤ VER ≤ 25 V, 1.0 mA ≤ IV(OUT) ≤ 100 mA, TTEST = –40°C to 125°C; unless otherwise specified.) Characteristic UnitMaxTypMinTest Conditions RESETB OUTPUT V BAT = 0 V High Threshold VOUT Increasing 4.525 4.75 4.85 V Low Threshold VOUT Decreasing 4.5 4.65 4.825 V Hysteresis – 25 100 200 mV Output Low Voltage VOUT = 1.0 V, IRESETB = 100 µA IRESETB = 1.0 mA, VOUT = 4.5 V 0.5 0.5 V V Pull–Up Resistor RESETB = 1.0 V 25 50 100 kΩ SWSD Input V BAT = 16 V, VER = 25 V, IV(OUT) = –1.0 mA High Threshold – – – 0.7 × VOUT V Low Threshold – 0.3 × VOUT – – V Input Impedance Referenced to Ground 10 20 40 kΩ NERD OUTPUT V BAT = 16 V, IV(OUT) = –1.0 mA, CNERD = 0.47 F VER Detection Voltage – 1.5 – 6.5 V Output Low Voltage INERD = 1.0 mA, VOUT = 4.5 V – – 0.5 V Pull–Up Current NERD = 0.5 V 30 40 50 µA Power On Delay – 6.25 8.5 11 ms Clamping Voltage (Low) VER Present 1.0 1.25 1.5 V Clamping Voltage (High) VER Not Present 3.5 3.75 4.0 V General VER Load Current VER = 25 V, VBAT = 16 V, IV(OUT) = –100 mA T = –40°C T = 25°C T = 125°C 5.0 5.0 4.0 mA mA mA Thermal Shutdown (Guaranteed by Design) 160 – 210 °C PACKAGE PIN DESCRIPTION PACKAGE PIN # SO–20L PIN SYMBOL FUNCTION 1 VER Energy reserve input. 2 VBAT Battery input. 3 VFB Charge PUMP control voltage input. 4 GND1 Ground. 5 GND2 Ground. 6 GND3 Ground. 7 GND4 Ground. 8 VSW Charge PUMP switch collector. 9 SWSD Charge PUMP shutdown input. 10 COMP Charge PUMP compensation pin. 11 C PUMP Charge PUMP timing cap input. 12 IBIAS Reference current resistor pin.
13 VCHG Switched cap voltage tripler output. 18 NERD No energy reserve detected output. 20 VOUT Linear regulator output. Figure 2. Block Diagram
http://onsemi.com PACKAGE DIMENSIONS SO–20L DWF SUFFIX CASE 751D–05 ISSUE F B20X H10X C L 18X A1 A SEATING PLANE h X 45 E D M0.25 MB M0.25 SA SBT e T B A DIM MIN MAX MILLIMETERS A 2.35 2.65 A1 0.10 0.25 B 0.35 0.49 C 0.23 0.32 D 12.65 12.95 E 7.40 7.60 e 1.27 BSC H 10.05 10.55 h 0.25 0.75 L 0.50 0.90 0 7 NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION. PACKAGE THERMAL DATA Parameter SO–20L Unit R Θ JC Typical 9 °C/W R Θ JA Typical 55 °C/W
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