MP2101 MPS | Alldatasheet

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1.6MHz Synchronous Step-Down plus 200mA LDO MP2101 Rev. 1.0 www.MonolithicPower.com 1 8/18/2006 MPS Proprietary Information. Unaut horized Photocopy and Duplication Prohibited. © 2006 MPS. All Rights Reserved. The Future of Analog IC Technology TM TM

DESCRIPTION

The MP2101 is an internally compensated 1.6MHz fixed-frequency PWM step-down switcher with a 200mA low dropout (LDO) linear regulator. It is ideal for portable equipment powered by a single cell Lithium-Ion (Li+) Battery. The MP2101 can provide 800mA and 200mA of load current from a 2.5V to 6V input voltage. Both output voltages can be regulated as low as 0.6V. The 800mA output channel features an integrated high-side switch and synchronous rectifier for high efficiency without an external Schottky diode. With peak current mode control and internal compensation, the MP2101 can be stabilized with ceramic capacitors and small inductors. The high-side switch can maintain 100% duty cycle in dropout condition. The 200mA LDO output is used to power noise sensitive circuitry. It has a separate input supply to reduce power dissipation and noise from the main switcher. Dropout voltage is 280mV under a 150mA load. Fault condition protection includes cycle-by-cycle current limiting and thermal shutdown. The MP2101 is available in small 3mm x 3mm 10-pin QFN packages.

FEATURES

  • 0.8A Switcher Output and 0.2A LDO Output
  • V IN1 Range for Switcher: 2.5V to 6V
  • V IN2 Range for LDO: 1.2V to VIN1
  • Internal Power MOSFET Switches
  • Stable with Low ESR Output Ceramic Capacitors
  • Up to 93% Efficiency
  • 0.01µA Shutdown Current
  • 1.6MHz Fixed Switching Frequency
  • Up to 100% Switcher Duty Cycle
  • Thermal Shutdown
  • Cycle-by-Cycle Over Current Protection
  • Short Circuit Protection
  • Power On Reset Output
  • Available in 3x3 10-Pin QFN Packages

APPLICATIONS

  • DVD+/-RW Drives
  • Smart Phones
  • PDAs
  • Digital Cameras
  • Portable Instruments “MPS” and “The Future of Analog IC Technology” are Trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION MP2101 FB1 EN1 IN1 SW1 IN2

6 FB2

1.2V @ 200mA POWER OK OUT1 1.8V @ 600mA OFF ON VIN 2.5V - 6V 100 EFFICIENCY (%) 10 100 1000 LOAD CURRENT (mA) Efficiency vs Load Current VIN=3.3V VIN=5.0V VIN=4.2V

MP2101 – 1.6MHz SYNCHRONOUS STEP-DOWN PLUS 200mA LDO MP2101 Rev. 1.0 www.MonolithicPower.com 2 8/18/2006 MPS Proprietary Information. Unaut horized Photocopy and Duplication Prohibited. © 2006 MPS. All Rights Reserved. TM PACKAGE REFERENCE TOP VIEW FB1 EN1 IN1 SW1 GND FB2 EN2 PWROK OUT2 IN2 EXPOSED PAD ON BACKSIDE Part Number* Package Temperature MP2101DQ QFN10 (3mm x 3mm) –40°C to +85°C * For Tape & Reel, add suffix –Z (eg. MP2101DQ–Z) For RoHS compliant packaging, add suffix –LF (eg. MP2101DQ–LF–Z) ABSOLUTE MAXIMUM RATINGS (1) Recommended Operating Conditions (2) Thermal Resistance (3) θJA θJC Notes: 1) Exceeding these ratings may damage the device. 2) The device is not guaranteed to function outside of its operating conditions. 3) Measured on approximately 1” square of 1 oz copper. ELECTRICAL CHARACTERISTICS (4) VIN1/2 = VEN1/2 = 3.6V, TA = +25°C, unless otherwise noted. Parameters Condition Min Typ Max Units VFB1/2 = 0.62V 400 550 µA VEN1 = 0V, VEN2 = 3.6V 80 100 µA No Load Supply Current VEN1 = 3.6V, VEN2 = 0V 300 400 µA Shutdown Current V EN1/2 = 0V, VIN1/2 = 6V 0.01 1 µA Thermal Shutdown Trip Threshold Hysteresis = 20°C 150 °C PWROK Upper-Trip Threshold FB1/2 with respect to the Nominal Value 10 % PWROK Lower-Trip Threshold FB1/2 with respect to the Nominal Value –10 % PWROK Output Lower Voltage I SINK = 5mA 0.3 V PWROK Deglitch Timer (FB1) Switching Regulator 50 PWROK Deglitch Timer (FB2) LDO 150 µs EN1/2 Trip Threshold –40°C ≤ TA ≤ +85°C 0.3 0.96 1.5 V EN1/2 Pull-Down Resistor 900 k Ω Switching Regulator IN1 Under Voltage Lockout Threshold Rising Edge 1.5 2.0 2.5 V IN1 Under Voltage Lockout Hysteresis 100 mV TA = +25°C 0.588 0.600 0.612Regulated FB1Voltage V FB1 Input Bias Current V FB1 = 0.62V –50 –2 +50 nA

MP2101 – 1.6MHz SYNCHRONOUS STEP-DOWN PLUS 200mA LDO MP2101 Rev. 1.0 www.MonolithicPower.com 3 8/18/2006 MPS Proprietary Information. Unaut horized Photocopy and Duplication Prohibited. © 2006 MPS. All Rights Reserved. TM ELECTRICAL CHARACTERISTICS (4) (continued) VIN1/2 = VEN1/2 = 3.6V, TA = +25°C, unless otherwise noted. Parameters Condition Min Typ Max Units SW1 PFET On Resistance I SW1 = 100mA 0.35 Ω SW1 NFET On Resistance I SW1 = –100mA 0.25 Ω SW1 Leakage Current VEN1 = 0V, VIN = 6V VSW1 = 0V or 6V –2 +2 µA SW1 PFET Peak Current Limit Duty Cycle = 100%, Current Pulse Width < 1ms 0.9 1.4 2.0 A Oscillator Frequency 1.2 1.6 2.0 MHz Linear Regulator LDO IN2 Input Range I LOAD = 10mA, VOUT2=VFB2 1.2 V IN1 V TA = +25°C 0.588 0.600 0.612Regulated FB2 Voltage V FB2 Input Bias Current V FB2 = 0.6V –50 –2 +50 nA OUT2 Short Circuit Foldback V OUT2 = 0V 180 mA OUT2 Output Current V OUT = 1.2V 200 mA Dropout Voltage (5) I LOAD = 150mA, VOUT2 = 1.2V 280 mV Notes: 4) Production test at +25°C. Specificat ions over the temperature range are guaranteed by design and characterization. 5) The dropout voltage is equal to V IN2 – VOUT2 when VOUT2 is 100mV below the nominal value. PIN FUNCTIONS Pin # Name Description 1 FB1 Feedback 1. Feedback Input for the switcher output (OUT1). 2 EN1 Enable 1. Enable input for the switcher. Pull hi gh to turn on the switcher; low to turn it off. 3 IN1 Input 1. Main input supply for both the switcher and the auxiliary low dropout (LDO) linear regulator. 4 SW1 Switcher Switch Node. Output for the 800mA switcher channel. 5 GND Ground. 6 IN2 Input 2. Input supply for the auxiliary linear regulator LDO output power device. 7 OUT2 Output 2. Output of the 200mA LDO. The LDO is designed to be stable with an external minimum 1µF ceramic capacitor at 200mA of load current.

8 PWROK

Power On Reset Open Drain Output. A high output indicates that both outputs are within ±10% of the regulation value. A low output indicates that the output is outside of the ±10% window. PWROK is pulled down if EN1 and/or EN2 is low. The PWROK window comparators have a 50µs deglitch timer for the switcher and 150µs deglitch timer for the linear regulator LDO to avoid a false trigger during load transient. 9 EN2 Enable 2. Enable input for the linear regulator LDO. Pull high to turn on the LDO; low to turn it off. 10 FB2 Feedback 2. Feedback input for the linear regulator output (OUT2).

MP2101 – 1.6MHz SYNCHRONOUS STEP-DOWN PLUS 200mA LDO MP2101 Rev. 1.0 www.MonolithicPower.com 4 8/18/2006 MPS Proprietary Information. Unaut horized Photocopy and Duplication Prohibited. © 2006 MPS. All Rights Reserved. TM TYPICAL PERFORMANCE CHARACTERISTICS TA = +25°C, unless otherwise noted. 3.33 3.32 3.31 3.30 3.29 3.28 3.27 3.26

3.25 OUTPUT VOLTAGE (V)

LOAD CURRENT (mA) Output Voltage vs Load Current 2.52 2.50 2.48 2.46 2.44 2.42

2.40 OUTPUT VOLTAGE (V)

LOAD CURRENT (mA) Output Voltage vs Load Current 1.82 1.81 1.80 1.79 1.78 1.77

1.76 OUTPUT VOLTAGE (V)

LOAD CURRENT (mA) Output Voltage vs Load Current 100 EFFICIENCY (%) 10 100 1000 LOAD CURRENT (mA) Efficiency vs Load Current 100 EFFICIENCY (%) 10 100 1000 LOAD CURRENT (mA) Efficiency vs Load Current 10 100 1000 LOAD CURRENT (mA) Efficiency vs Load Current EFFICIENCY (%) EFFICIENCY (%) 10 100 1000 LOAD CURRENT (mA) Efficiency vs Load Current VIN=3.3V VIN=3.3V VIN=4.2V VIN=4.2V VIN=5.0V VIN=5.0V VIN=5.0VVIN=4.2V EFFICIENCY (%) 10 100 1000 LOAD CURRENT (mA) Efficiency vs Load Current EFFICIENCY (%) 10 100 1000 LOAD CURRENT (mA) Efficiency vs Load Current VIN=3.3V VIN=3.3V VIN=3.3V VIN=3.3V VIN=4.2V VIN=5.0V VIN=5.0V VIN=5.0V VIN=5.0V VIN=5.0V VIN=5.0V VIN=4.2V VIN=4.2V VIN=4.2V VIN=4.2V VIN=4.2V

MP2101 – 1.6MHz SYNCHRONOUS STEP-DOWN PLUS 200mA LDO MP2101 Rev. 1.0 www.MonolithicPower.com 5 8/18/2006 MPS Proprietary Information. Unaut horized Photocopy and Duplication Prohibited. © 2006 MPS. All Rights Reserved. TM TYPICAL PERFORMANCE CHARACTERISTICS (continued) TA = +25°C, unless otherwise noted. EN 2V/div. PWROK 2V/div. VOUT1 1V/div. VOUT2 1V/div. EN 5V/div. PWROK 5V/div. VOUT1 1V/div. VOUT2 1V/div. Enable Turn On EN = 3.6V, IOUT1 = 0.3A, IOUT2 = 0.1A Resistive Load Enable Turn Off EN = 3.6V, IOUT1 = 0.3A, IOUT2 = 0.1A Resistive Load 1.206 1.205 1.204 1.203

1.202 OUTPUT VOLTAGE (V)

LOAD CURRENT (mA) Output Voltage vs Load Current 2.53 2.52 2.51 2.50

2.49 OUTPUT VOLTAGE (V)

LOAD CURRENT (mA) Output Voltage vs Load Current VOUT2 = 2.5V 1.56 1.54 1.52 1.50

1.48 OUTPUT VOLTAGE (V)

LOAD CURRENT (mA) Output Voltage vs Load Current VOUT2 = 1.5V LDO LDO LDO VIN=3.3V VIN=3.3V VIN=1.8V FB1 FB2 0.62 0.61 0.60 0.59

0.58 FEEDBACK VOLTAGE (V)

-40 -10 +20 +50 +80 +140 +110 TEMPERATURE (°C) Feedback Voltage vs Temperature 0.5 0.4 0.3 0.2 0.1

0.0 DROPOUT VOLTAGE (V)

LOAD CURRENT (mA) LDO Dropout vs Load Current 1.8 1.7 1.6 1.5 1.4

1.3 FREQUENCY (MHz)

INPUT VOLTAGE (V) Frequency vs Input Voltage 100 PSRR (dB) 10 100 1K 10K 100K 1M FREQUENCY (Hz) PSRR vs Frequency

MP2101 – 1.6MHz SYNCHRONOUS STEP-DOWN PLUS 200mA LDO MP2101 Rev. 1.0 www.MonolithicPower.com 6 8/18/2006 MPS Proprietary Information. Unaut horized Photocopy and Duplication Prohibited. © 2006 MPS. All Rights Reserved. TM TYPICAL PERFORMANCE CHARACTERISTICS (continued) TA = +25°C, unless otherwise noted. PWROK Off vs VOUT1 Shorted EN = 4V, IOUT1 = 0.3A, IOUT2 = 0.1A Resistive Load PWROK Off vs VOUT2 Shorted EN = 4V, IOUT1 = 0.3A, IOUT2 = 0.1A Resistive Load Over Current Protection IOUT1 = 0.3A Resistive Load VIN 2V/div. VOUT1 2V/div. VOUT2 1V/div. PWROK 2V/div. VOUT1 1V/div. VOUT2 1V/div. VOUT1 0.1V/div. IL 0.5A/div. VOUT2 50mV/div. IOUT2 0.1A/div. VOUT2 1V/div. IOUT2 0.1A/div. PWROK 2V/div. VOUT1 1V/div. VOUT2 1V/div. VOUT1 2V/div. VSW 5V/div. IL 0.5A/div. VIN 2V/div. VOUT1 1V/div. VOUT2 1V/div. VOUT1 10mV/div. VSW 2V/div. IL 0.5A/div. Input Ramp Up EN = 4V, IOUT1 = 0.3A, IOUT2 = 0.1A Resistive Load 1ms/div. Input Ramp Down EN = 4V, IOUT1 = 0.3A, IOUT2 = 0.1A Resistive Load 400ns/div. Heavy Load Ripple EN1 = VIN = 5V, IOUT1 = 0.8A Resistive Load Switcher Load Transient IOUT1 = 0.8A Resistive Load LDO Load Transients VIN2 = 3.3V, VOUT2 = 1.2V, IOUT2 = 0.02A to 0.15A Resistive Load LDO Over Current Protection VIN2 = 3.3V, VOUT2 = 2.5V

MP2101 – 1.6MHz SYNCHRONOUS STEP-DOWN PLUS 200mA LDO MP2101 Rev. 1.0 www.MonolithicPower.com 7 8/18/2006 MPS Proprietary Information. Unaut horized Photocopy and Duplication Prohibited. © 2006 MPS. All Rights Reserved. TM OPERATION The MP2101 is a fixed-frequency 1.6MHz, 800mA current mode PWM step-down switcher with a 200mA low dropout (LDO) linear regulator. The MP2101 is optimized for low voltage, Li-Ion battery powered applications where high efficiency and small size are critical. The MP2101 uses an external resistor divider to set both the switcher and LDO output voltage from 0.6V to 6V. IN1 3 EN1/2 FB1 FB2 GND IN2 OUT2 PWROK SW1 PWMCMP PWM OSC EAMP1 ICS SLOPE COMP FEEDBACK ERROR AMP 0.6V 0.6V FB1/2 0.66V OUT_Hi EAO2 OUT_Lo EAO1 CC 17pF BIAS VOLTAGE REFERENCE PWM CONTROL LOGIC1.6MHz OSCILLATOR IAMP 10X CURRENT SENSE AMP DH DL MAIN SWITCH (PCH) SYNCHRONOUS RECTIFIER (NCH)+ EAMP2 POWER ON RESET WINDOW COMPARATORS NO GOOD 0.54V Figure 1—MP2101 Function Diagram

MP2101 – 1.6MHz SYNCHRONOUS STEP-DOWN PLUS 200mA LDO MP2101 Rev. 1.0 www.MonolithicPower.com 8 8/18/2006 MPS Proprietary Information. Unaut horized Photocopy and Duplication Prohibited. © 2006 MPS. All Rights Reserved. TM 800mA Step-Down Switcher The switcher integrates both a main switch and a synchronous rectifier, which provides high efficiency and eliminates the need for an external Schottky diode. This switcher can achieve 100% duty cycle. The duty cycle (D) of a step-down switcher is defined as: %100V V%100fTD IN OUT OSCON ×≈××= Where TON is the main switch on time and fOSC is the oscillator frequency (1.6MHz). Current Mode PWM Control Slope compensated current mode PWM control provides stable switching and cycle-by-cycle current limiting for superior load and line response in addition to protection of the internal main switch and synchronous rectifier. During each cycle, the PWM comparator modulates the power transferred to the load by changing the inductor peak current based on the feedback error voltage. During normal operation, the main switch is turned on to ramp the inductor current at each rising edge of the internal oscillator, then switched off when the peak inductor current is above the error voltage. When the main switch is turned off, the synchronous rectifier is immediately turned on and stays on until the next cycle begins. Dropout Operation The MP2101 allows the main switch to remain on for more than one switching cycle and increases the duty cycle while the input voltage is dropping close to the output voltage. When the duty cycle reaches 100%, the main switch is held on to deliver current to the output up to the PFET current limit. The output voltage then becomes the input voltage minus the voltage drop across the main switch and the inductor. Short Circuit Protection When the output is shorted to ground, the oscillator frequency is reduced to prevent the inductor current from increasing beyond the PFET current limit, which is also reduced to lower the short circuit current. The frequency and current limit will return to the normal values once the short circuit condition is removed and the feedback voltage reaches 0.6V. Maximum Load Current The MP2101 can operate down to a 2.5V input voltage. However the maximum load current decreases at lower inputs due to a large IR drop on the main switch and synchronous rectifier. The slope compensation signal reduces the peak inductor current as a function of the duty cycle to prevent sub-harmonic oscillations at duty cycles greater than 50%. Conversely, the current limit increases as the duty cycle decreases. Power OK The MP2101 provides an open-drain PWROK output that goes high after both channels reach regulation during startup. PWROK goes low after one of the output channels goes out of regulation by ±10% or when the device enters shutdown. There is a built-in deglitch timer to avoid a false PWROK trigger during load transients (50µs for the switcher and 150 µs for the LDO). When the output is disabled, Power OK remains low. 200mA Linear Regulator The 200mA low dropout (LDO) linear regulator has separate input (IN2) and output (OUT2) pins for the internal power device. The control circuitry of the LDO takes power from the main input supply (IN1). Both IN1 and IN2 input supplies must be present for the LDO to work properly. The LDO power device input (IN2) can be connected to the switcher output or directly to the main supply (Figure 2). If IN2 is tied to IN1, an optional RC filter can be inserted between IN1 and IN2. The RC filter reduces switching noise coupling from IN1 to IN2 and power dissipation inside the MP2101. The switcher guarantees 800mA output current, but output current to the switcher load will be reduced if the LDO draws current from the switcher output.

MP2101 – 1.6MHz SYNCHRONOUS STEP-DOWN PLUS 200mA LDO MP2101 Rev. 1.0 www.MonolithicPower.com 9 8/18/2006 MPS Proprietary Information. Unaut horized Photocopy and Duplication Prohibited. © 2006 MPS. All Rights Reserved. TM

APPLICATION INFORMATION

The external resistor divider sets the output voltage. The feedback resistor R1 of the switcher also sets the feedback loop bandwidth with the internal compensation capacitor (see Figure 1). R1 of the switcher should be 300k Ω for optimal transient response. R2 is then given by: 1V6.0 V 1R2R 1OUT − R4 of the LDO should be 60k Ω for good loop response. R3 is then given by: )1V6.0 V(4R3R 2OUT −×= Table 1—Resistor Selection vs. Output Voltage Setting VOUT R1 R2 R3 R4 1.2V 300kΩ (1%) 300kΩ (1%) 60kΩ (1%) 60kΩ (1%) 1.5V 300kΩ (1%) 200kΩ (1%) 90kΩ (1%) 60kΩ (1%) 1.8V 300kΩ (1%) 150kΩ (1%) 120kΩ (1%) 60kΩ (1%) 2.5V 300kΩ (1%) 95.3kΩ (1%) 190kΩ (1%) 60kΩ (1%) Inductor Selection A 1µH to 10µH inductor with a DC current rating of at least 25% higher than the maximum load current is recommended for most applications. For best efficiency, the inductor DC resistance should be <200m Ω. See Table 2 for recommended inductors and manufacturers. For most designs, the inductance value can be derived from the following equation: OSCLIN OUTINOUT fIV VVVL ×∆× −×= Where ∆IL is inductor ripple current. Choose the inductor ripple current to be approximately 30% of the maximum load current (800mA). The maximum inductor peak current is: III L LOAD)MAX(L ∆+= Under light load conditions below 100mA, larger inductance is recommended for improved efficiency. Table 3 lists inductors recommended for this purpose. Table 2—Suggested Surface Mount Inductors Manufacturer Part Number Inductance ( µH) Max DCR ( Ω) Saturation Current (A) Dimensions LxWxH (mm3) Toko D521C 2.2 0.059 1.63 5 x 5 x 1.5 Sumida CDRH3D16 2.2 0.072 1.20 4 x 4 x 1.8 Table 3—Inductors for Improved Efficiency at 25mA, 50mA, under 100mA Load. Manufacturer Part Number Inductance ( µH) Max DCR ( Ω) Saturation Current (A) IRMS (A) Coilcraft DO1605T-103MX 10 0.3 1.0 0.9 Murata LQH4C100K04 10 0.2 1.2 0.8 Sumida CR32-100 10 0.2 1.0 0.7 Sumida CR54-100 10 0.1 1.2 1.4

MP2101 – 1.6MHz SYNCHRONOUS STEP-DOWN PLUS 200mA LDO MP2101 Rev. 1.0 www.MonolithicPower.com 10 8/18/2006 MPS Proprietary Information. Unaut horized Photocopy and Duplication Prohibited. © 2006 MPS. All Rights Reserved. TM Switcher Input Capacitor Selection The input capacitor (C IN1) reduces the surge current drawn from the input and switching noise from the device. The input capacitor impedance at the switching frequency should be less than the input source impedance to prevent high frequency switching current passing to the input. Ceramic capacitors with X5R or X7R dielectrics are highly recommended because of their low ESR and small temperature coefficients. For most applications, a 4.7µF capacitor is sufficient. Switcher Output Capacitor Selection The output capacitor (C O1) keeps the output voltage ripple small and ensures regulation loop stability. The output capacitor impedance should be low at the switching frequency. Ceramic capacitors with X5R or X7R dielectrics are recommended. The output ripple ∆V OUT is approximately: ××+ ××× −×≤∆ 1OOSC OSC1IN 1OUT1IN1OUT 1OUT Cf8 1ESR LfV VVVV Thermal Dissipation Power dissipation should be considered when both channels of the MP2101 provide maximum output current at high ambient temperatures. If the junction temperature rises above 150°C, the two channels will shut down. The junction-to-ambient thermal resistance of the 10-pin QFN (3mm x 3mm) R ΘJA is 50 °C/W. The maximum power dissipation is about 1.6W when the MP2101 is operating in a 70 °C ambient temperature environment. W6.1 W/C50 C70C150PD o oo MAX =−= Start-Up Consideration To ensure a smooth start-up of OUT1 and OUT2, it is recommended that the enable signals (EN1 and EN2) be asserted only after the input power rails have been stabilized. If EN1 and EN2 are tied to input rails directly, the UVLO of the MP2101 will dictate when the part starts switching. Since for certain systems, the input supply may have relatively high impedance during ramp up, therefore depending solely on UVLO to start the part may cause input rail dip and output bounce. If the system designer can not provide the enable signal after input power rail is fully established, it is recommended that EN1 and EN2 are connected to the input power rail through a RC delay network (as shown in Figure 2). The RC time constant needs to be significantly large compare to the ramp-up time of the input power rail, which is usually of a few ms. PC Board Layout The high current paths (GND, IN1/IN2 and SW1) should be placed very close to the device with short, direct and wide traces. Input capacitors should be placed as close as possible to the respective IN and GND pins. The external feedback resistors should be placed next to the FB pins. Keep the switching nodes SW1 short and away from the feedback network.

MP2101 – 1.6MHz SYNCHRONOUS STEP-DOWN PLUS 200mA LDO MP2101 Rev. 1.0 www.MonolithicPower.com 11 8/18/2006 MPS Proprietary Information. Unaut horized Photocopy and Duplication Prohibited. © 2006 MPS. All Rights Reserved. TM TYPICAL APPLICATION CIRCUIT MP2101 FB1 EN1 IN1 SW1 IN2 2.5V @ 200mA OUT1 1.8V @ 800mA VIN 3.3V - 6V RIN3 CIN3 OPTIONAL OPTIONAL POWER OK Figure 2—Optional RC Delay on EN1 and EN2 Circuit

MP2101 – 1.6MHz SYNCHRONOUS STEP-DOWN PLUS 200mA LDO NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon w hen integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP2101 Rev. 1.0 www.MonolithicPower.com 12 8/18/2006 MPS Proprietary Information. Unaut horized Photocopy and Duplication Prohibited. © 2006 MPS. All Rights Reserved. TM

PACKAGE INFORMATION