CQ0201ARNPO7BN121 YAGEO | Alldatasheet
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Product Specification – July 5, 2016 V.13 DATA SHEET SURFACE-MOUNT CERAMIC MULTILAYER CAPACITORS Hi Q Series Class 1, NP0
16 V TO 250 V
0.2 pF to 100 pF RoHS compliant & Halogen Free
Surface-Mount Ceramic Multilayer Capacitors Product specification HiQ www.yageo.com Jul. 5, 2016 V.13 SCOPE This specification describes NP0 series chip capacitors with lead - free terminations.
APPLICATIONS
Consumer electronics for example - Tuners - Television receivers - All types of cameras Telecommunications Data processing
FEATURES
Supplied in tape on reel Nickel -barrier end termination RoHS compliant Halogen Free compliant ORDERING INFORMATION - GLOBAL PART NUMBER, PHYCOMP CTC & 12NC All part numbers are identified by the series, size, tolerance, TC material, packing style, voltage, process code, termination and capacitance value. YYAAGGEEOO// PPHHYYCCOOMMPP BBRRAANNDD oorrddeerriinngg ccooddee GLOBAL PART NUMBER (PREFERRED ) CQ XXXX X X NPO X BN XXX (1) SIZE – INCH BASED (METRIC) 0201 (0603) 0402 (1005) 0603 (1608) 0805 (2012) (2) TOLERANCE 0.2pF to 2.0pF A = ± 0.05 pF B = ± 0.1 pF C = ± 0.25 pF 2.1pF to 5.0pF A = ± 0.05 pF (by request) B = ± 0.1 pF C = ± 0.25 pF D = ± 0.5 pF 5.1pF to 9.9pF B = ± 0.1 pF C = ± 0.25 pF D = ± 0.5 pF 10pF and over F = ± 1% G = ± 2% J = ± 5% (3) PACKING STYLE R = Paper/PE taping reel; Reel 7 inch P = Paper/PE taping reel; Reel 13 inch (4) RATED VOLTAGE 7 = 16 V 0=100V 8 = 25 V A=200V 9 = 50 V Y=250V (5) CAPACITANCE VALUE 2 significant digits + number of zeros The 3rd digit signifies the multiplying factor, and letter R is decimal point Example: 121 = 12 x 101 = 120 pF
Surface-Mount Ceramic Multilayer Capacitors Product specification HiQ www.yageo.com Jul. 5, 2016 V.13 CONSTRUCTION The capacitor consists of a rectangular block of ceramic dielectric in which a number of interleaved metal electrodes are contained. This structure gives rise to a high capacitance per unit volume. The inner electrodes are connected to the two end terminations and finally covered with a layer of plated tin (NiSn). The terminations are lead -free. A cross section of the structure is shown in Fig.1. Fig. 1 Surface mounted multilayer ceramic capacitor construction TYPE L1 (mm) W (mm) T (MM) L2 / L3 (mm) L4 (mm) min. max. min. 0201 0.6 ± 0.03 0.3 ± 0.03 Refer to table 2 to 5 0.10 0.20 0.20 Table 1 For outlines see fig. 2 DIMENSION OOUUTTLLIINNEESS For dimension see Table 1 Fig. 2 Surface mounted multilayer ceramic capacitor dimension
Surface-Mount Ceramic Multilayer Capacitors Product specification HiQ www.yageo.com Jul. 5, 2016 V.13 CAPACITANCE RANGE & THICKNESS FOR NP0 Table 2 Sizes from 0201 to 0402 CAP. 0201 0402 CAP. 0201 0402
25 V 50 V 50 V 100V 250V 25 V 50V 50 V 100V 250V
- Values in shaded cells indicate thickness class in mm
Surface-Mount Ceramic Multilayer Capacitors Product specification HiQ www.yageo.com Jul. 5, 2016 V.13 CAPACITANCE RANGE & THICKNESS FOR NP0 Table 3 Sizes from 0201 to 0402 CAP. 0201 0402 CAP. 0201 0402
25 V 50 V 50 V 100 V 250 V 25 V 50 V 50 V 100 V 250 V
- Values in shaded cells indicate thickness class in mm
Surface-Mount Ceramic Multilayer Capacitors Product specification HiQ www.yageo.com Jul. 5, 2016 V.13 Table 4 Sizes from 0603 to 0805 CAP. 0603 0805
25 V 50 V 100V 200V 250V 25 V 50 V 100V 200V 250V
- Values in shaded cells indicate thickness class in mm CAPACITANCE RANGE & THICKNESS FOR NP0
Surface-Mount Ceramic Multilayer Capacitors Product specification HiQ www.yageo.com Jul. 5, 2016 V.13 Table 5 THICKNESS CLASSES AND PACKING QUANTITY SIZE CODE THICKNESS CLASSIFICATION TAPE WIDTH QUANTITY PER REEL Ø 180 MM / 7 INCH Ø 330 MM / 13 INCH QUANTITY PER BULK CASE Paper/PE Blister Paper/PE Blister SOLDERING RECOMMENDATION Table 7 SOLDERING METHOD SIZE 0201 0402 0603 0805 Reflow O O O O Wave --- --- O O
ELECTRICAL CHARACTERISTICS
NNPP00 DDIIEELLEECCTTRRIICC CCAAPPAACCIITTOORRSS;; NNIISSNN TTEERRMMIINNAATTIIOONNSS Unless otherwise stated all electrical values apply at an ambient temperature of 20±1 °C, an atmospheric pressure of 86 to 106 kPa, and a relative humidity of 63 to 67%. DESCRIPTION VALUE Capacitance range 0.2 pF to 100 pF Capacitance tolerance C < 10 pF ± 0.05 pF, ± 0.1 pF, ± 0.25 pF, ± 0.5 pF Q value C < 30 pF ≤ 50V Q ≥ ( 400 + 20C ) ≥100V Q ≥ ( 800 + 20C ) C: pF C ≥ 30 pF ≤ 50V Q ≥ 1000 ≥100V Q ≥1400 Insulation resistance after 1 minute at Ur (DC) Rins ≥ 10 GΩ or Rins × Cr ≥ 500 seconds whichever is less Maximum capacitance change as a function of temperature (temperature characteristic/coefficient): ± 30 ppm/°C Operating temperature range: –55 °C to +125 °C Table 6
Surface-Mount Ceramic Multilayer Capacitors Product specification HiQ www.yageo.com Jul. 5, 2016 V.13 TESTS AND REQUIREMENTS Table 8 Test procedures and requirements TEST TEST METHOD PROCEDURE REQUIREMENTS Mounting IEC 60384-
4.3 The capacitors may be mounted on printed-circuit boards or
4.4 Any applicable method using × 10 magnification In accordance with specification
Capacitance 4.5.1 Class 1: f = 1 MHz for C ≤ 1 nF, measuring at voltage 1 Vrms at 20 °C f = 1 KHz for C > 1 nF, measuring at voltage 1 Vrms at 20 °C Within specified tolerance Q value 4.5.2 Class 1: f = 1 MHz for C ≤ 1 nF , measuring at voltage 1 Vrms at 20 °C f = 1 KHz for C > 1 nF, measuring at voltage 1 Vrms at 20 °C In accordance with specification Insulation resistance
4.5.3 At Ur (DC) for 1 minute In accordance with specification
Surface-Mount Ceramic Multilayer Capacitors Product specification HiQ www.yageo.com Jul. 5, 2016 V.13 TEST TEST METHOD PROCEDURE REQUIREMENTS Temperature coefficient
4.6 Capacitance shall be measured by the steps shown in the
following table. The capacitance change should be measured after 5 min at each specified temperature stage. Step Temperature(℃) a 25± 2 b Lower temperature± 3℃ c 25± 2 d Upper Temperature± 2℃ e 25± 2 (1) Class I Temperature Coefficient shall be calculated from the formula as below Temp, Coefficient = 610T xC1 C1-C2 Δ [ppm/℃] C1: Capacitance at step c C2: Capacitance at 125℃ Class1: ∆ C/C: ± 30ppm Adhesion 4.7 A force applied for 10 seconds to the line joining the terminations and in a plane parallel to the substrate Force size ≥ 0603: 5N size = 0402: 2.5N size = 0201: 1N Bond strength of plating on end face 4.8 Mounting in accordance with IEC 60384-22 paragraph 4.3 No visible damage Conditions: bending 1 mm at a rate of 1 mm/s, radius jig 5 mm ∆C/C NP0: within ± 1% or 0.5 pF whichever is greater ESR (≤50V) Measuring frequency: 1 ± 0.2GHz at room temperature. 0.2pF ≤ C ≤ 1pF :350mΩ max 1pF < C ≤ 5pF :300mΩ max 5pF < C ≤ 10pF :250mΩ max Measuring frequency: 500 ± 50MHz at room temperature. 10pF < C ≤ 100pF :400mΩ max
Surface-Mount Ceramic Multilayer Capacitors Product specification HiQ www.yageo.com Jul. 5, 2016 V.13 TEST TEST METHOD PROCEDURE REQUIREMENTS Resistance to soldering heat IEC 60384- 4.9 Precondition: 150 +0/–10 °C for 1 hour, then keep for 24 ± 1 hours at room temperature Preheating: for size ≤ 1206: 120 °C to 150 °C for 1 minute Preheating: for size >1206: 100 °C to 120 °C for 1 minute and 170 °C to 200 °C for 1 minute Solder bath temperature: 260 ± 5 °C Dipping time: 10 ± 0.5 seconds Recovery time: 24 ±2 hours Dissolution of the end face plating shall not exceed 25% of the length of the edge concerned ∆C/C NP0: within ±0.5% or 0.5 pF whichever is greater Q value within initial specified value Rins within initial specified value Solderability 4.10 Preheated the temperature of 80 °C to 140 °C and maintained for 30 seconds to 60 seconds. Test conditions for lead containing solder alloy Temperature: 235 ± 5 °C Dipping time: 2 ± 0.2 seconds Depth of immersion: 10 mm Alloy Composition: 60/40 Sn/Pb Number of immersions: 1 Test conditions for lead-free containing solder alloy Temperature: 245 ± 5 °C Dipping time: 3 ± 0.3 seconds Depth of immersion: 10 mm Alloy Composition: SAC305 Number of immersions: 1 The solder should cover over 95% of the critical area of each termination Rapid change of temperature
4.11 Preconditioning;
150 +0/–10 °C for 1 hour, then keep for 24 ± 1 hours at room temperature 5 cycles with following detail: 30 minutes at lower category temperature 30 minutes at upper category temperature Recovery time 24 ± 2 hours No visual damage ∆C/C NP0: within ± 1% or 1 pF whichever is greater Q value meet initial specified value Rins meet initial specified value
Surface-Mount Ceramic Multilayer Capacitors Product specification HiQ www.yageo.com Jul. 5, 2016 V.13 TEST TEST METHOD PROCEDURE REQUIREMENTS Damp heat with Ur load IEC 60384- 4.13 1. Preconditioning, class 2 only: 150 +0/-10 °C /1 hour, then keep for 24 ± 1 hour at room temp 2. Initial measure: Spec: refer to initial spec C 3. Damp heat test: 500 ± 12 hours at 40 ±2 °C; 90 to 95% R.H. 1.0 Ur applied 4. Recovery: Class 1: 6 to 24 hours 5. Final measure: C P.S. If the capacitance value is less than the minimum value permitted, then after the other measurements have been made the capacitor shall be preconditioned according to “IEC 60384 4.1” and then the requirement shall be met. No visual damage after recovery ∆C/C NP0: within ± 7.5% or 0.75pF whichever is greater Q value: ≥30pF: Q ≥ 200 ≤30pF: Q ≥ 100+10C/3 I.R.: NP0: ≥ 500 MΩ or Rins x Cr ≥ 25s whichever is less Endurance 4.14 1. Preconditioning, class 2 only: 150 +0/-10 °C /1 hour, then keep for 24 ± 1 hour at room temp 2. Initial measure: Spec: refer to initial spec C 3. Endurance test: Temperature: NP0: 125 °C Specified stress voltage applied for 1,000 hours: Applied 2.0 x Ur for general product. 4. Recovery time: 24 ± 2 hours 5. Final measure: C P.S. If the capacitance value is less than the minimum value permitted, then after the other measurements have been made the capacitor shall be preconditioned according to “IEC 60384 4.1” and then the requirement shall be met. No visual damage ∆C/C NP0: within ± 3% or 0.3pF whichever is greater Q value: ≥30pF: Q ≥ 350 10pF to 30pF: Q ≥ 275+5C/2 ≤10pF: Q ≥ 200+10C NP0: ≥ 1,000 MΩ or Rins x Cr ≥ 50Ω.F whichever is less Voltage proof IEC 60384-1 4.6 Specified stress voltage applied for 1 minute Ur ≤ 100 V: series applied 2.5 Ur 100 V < Ur ≤ 200 V series applied (1.5 Ur + 100) 200 V < Ur ≤ 500 V series applied (1.3 Ur + 100) Ur > 500 V: 1.3 Ur I: 7.5 mA No breakdown or flashover
Surface-Mount Ceramic Multilayer Capacitors Product specification HiQ www.yageo.com Jul. 5, 2016 V.13
REVISION HISTORY
REVISION DATE CHANGE NOTIFICATION DESCRIPTION Version 13 Jul. 5, 2016 - - Add 0201/50V and 0402/100V, 250V Capacitance range Version 12 Feb. 23, 2016 - - Size update Version 11 Mar 19, 2014 - - Size update Version 10 Mar 19, 2014 - - Tests and requirements Version 9 Feb. 27, 2014 - - Tolerance update Version 8 Oct. 28, 2013 - - Rated voltage update Version 7 Oct. 09, 2013 - - Rated voltage update Version 6 Jun. 24, 2013 - - Tolerance update Version 5 Apr. 15, 2013 - - Tolerance update Version 4 Mar. 28, 2013 - - Capacitance range & thickness update Version 3 Feb. 07, 2013 - - Capacitance range & thickness update Version 2 Dec. 25, 2012 - - Capacitance range & thickness update Version 1 Dec. 03, 2012 - - Capacitance range & thickness update Version 0 Nov. 23, 2012 - - New datasheet for HiQ NP0 series with RoHS compliant