CPLL58-1600-2200 CRYSTEKMICROWAVE | Alldatasheet

Document overview

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Technical content

Features

1.600GHz-2.200GHz Standard 3 Wire Interface Small layout 0.582" × 0.8"

Applications

Satellite Communications Systems Base Stations Personal Communications Systems Portable Radios Test Instruments Wireless Infrastructure The CPLL58 is a complete PLL/Synthesizer needing only an external frequency reference and supply voltages for the internal PLL (phase lock loop) and VCO (voltage controlled oscillator). The Crystek CPLL58 is programmed using a standard three line interface (Data, Clock and Load Enable). The CPLL58 family has been initially released to cover 1GHz to 5GHz in bands. It is housed in a 4GHz is -90dBc/Hz at 10KHz offset with 0dBm minimum output power. Page 1 of 7 Rev A CPLL58-1600-2200

12730 Commonwealth Drive • Fort Myers, Florida 33913

Phone: 239-561-3311 • 800-237-3061 Fax: 239-561-1025 • www.crystek.com CRYSTEKCORPORATION MICROWAVE A Division of Crystek Corporation Page 2 of 7 CPLL58-1600-2200 PERFORMANCE SPECIFICATION Frequency Range: Step Size: Settling Time, to within ± 1kHz (Freq. step < 25MHz): Output Power: Output Phase Noise: @1KHz offset @10KHz offset @100KHz offset @1MHz offset Power Supply: V1=VCO Supply V2=PLL Supply Supply Current: I1=VCO Input Current I2=PLL Input Current Spurious Suppression PFDSpur Reference Feedthru nd Harmonic Suppression: Reference Frequency MIN TYP UNITSMAX KHz GHz msec dBm dBc/Hz dBc/Hz dBc/Hz dBc/Hz Volts Volts mA mA dBc dBc dBc MHz Ohm Ohm 1.600 2.200 1000 +5.0 +7.0 +9.0 -66 -96 -122 -145 11.4 12.0 12.6 2.7 3.0 3.3 -70 -70 -60 -80 -10 100K -40 +85 Input Impedance RF Output Impedance Operating Temperature Range: -65 dBc -60 -15 -62 -92 -117 -140 rd -25 -15 dBc

Phone: 239-561-3311 • 800-237-3061 Fax: 239-561-1025 • www.crystek.com CRYSTEKCORPORATION MICROWAVE A Division of Crystek Corporation Page 3 of 7 CPLL58-1600-2200

Phone: 239-561-3311 • 800-237-3061 Fax: 239-561-1025 • www.crystek.com CRYSTEKCORPORATION MICROWAVE A Division of Crystek Corporation Page 4 of 7 RECOMMENDED REFLOW SOLDERING PROFILE 217°C 200°C 260°C 150°C 90 Secs. Max. TEMPERATURE Ramp-Up 3°C/Sec Max. Preheat 180 Secs. Max. 8 Minutes Max. 260°C for 10 Secs. Max. Critical Temperature Zone Ramp-Down 6°C/Sec. TOP ORIENTATION MARK TOP VIEW 0.582 0.411 0.331 0.251 0.171 0.00 0.200 0.00 0.280 0.360 0.440 0.520 0.600 0.600 GND BOTTOM VIEW GND 0.000 0.052 0.000 0.052 Pad Detail LE DATA CLK LD REF RF CRYSTEK CPLL58 1600-2200 YYWW GND GND GND GND GND GND GND V2 [Pin1] REF GND GND DATA CLK RF LE GND LD = Load Enable, CMOS Input = Serial Data Input = Clock = Lock Detect = Reference Input = Analog Supply Input (VCO) = Digital Supply Input (PLL) = RF Output 0.150 0.000 CPLL58-1600-2200

The CPLL58 uses a simple 3 wire interface to program four internal registers. See Figure 1. controlled by Control Bits C1 and C2. Table I summarizes the Truth Table for Control Bits C1 and C2. Figure 1. Timing Diagram

Phone: 239-561-3311 • 800-237-3061 Fax: 239-561-1025 • www.crystek.com CRYSTEKCORPORATION MICROWAVE A Division of Crystek Corporation Page 6 of 7 Table II shows the details of the four 24 bit registers. Table II. Latch Summary DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 X 0 0 LDP T2 T1 ABP2 ABP1 R14 R13 R12 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 C2(0) C1(0) LOCK DETECT PRECISION RESERVED TEST MODE BITS ANTI- BACKLASH WIDTH 14-BIT REFERENCE COUNTER CONTROL BITS REFERENCE COUNTER LATCH DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 G1 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 A6 A5 A4 A3 A2 A1 C2(0) C1(1) CP GAIN RESERVED 13-BIT COUNTER 6-BIT COUNTER CONTROL BITS N COUNTER LATCH DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 P2 P1 PD2 CP16 CP15 CP14 CP13 CP12 CP11 TC4 TC3 TC2 TC1 F5 F4 F3 F2 M3 M2 M1 PD1 F1 C2(1) C1(0) POWER-DOWN 2PRESCALER VALUE CURRENT SETTING2 CURRENT SETTING 1 CONTROL BITS FUNCTION LATCH TIMER COUNTER CONTROL FASTLOCK MODE FASTLOCK ENABLE CP THREE- STATE PD POLARITY COUNTER RESET POWER-DOWN 1MUXOUT CONTROL DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 P2 P1 PD2 CP16 CP15 CP14 CP13 CP12 CP11 TC4 TC3 TC2 TC1 F5 F4 F3 F2 M3 M2 M1 PD1 F1 C2(1) C1(1) POWER-DOWN 2PRESCALER VALUE CURRENT SETTING2 CURRENT SETTING 1 CONTROL BITS INITIALIZATION LATCH TIMER COUNTER CONTROL FASTLOCK MODE FASTLOCK ENABLE CP THREE- STATE PD POLARITY COUNTER RESET POWER-DOWN 1MUXOUT CONTROL When using the CPLL58 family in a synthesizer application, all four 24 bit registers need to be written into after power-up. After writing all four latches the first time, subsequent frequency step changes can be accomplished by changing the N Counter Latch only. Specifications subject to change without notice. CPLL58-1600-2200

Phone: 239-561-3311 • 800-237-3061 Fax: 239-561-1025 • www.crystek.com CRYSTEKCORPORATION MICROWAVE A Division of Crystek Corporation Page 7 of 7 Programming Crystek p/n: CPLL58-1600-2200 The following is specific programming for CPLL58-1600-2200 (1.6GHz~2.2GHz with 1MHz Step Size and 10MHz input reference frequency). Program all four registers with the following: R Counter Latch: 28H N Counter Latch: 3201H Function Latch: 9F8193H The above values will set the CPLL58-1600-2200 to 1.6GHz CPLL58-1600-2200