CNW4502

CNW136 HP | Alldatasheet

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Features Feedback Element in Description + 5000 Vrms/l Minute Insula- © Switched Mode Power These devices are high voltage tion Withstand Capability Supplies and fast switching optocouplers * Worldwide Safety . Bigh Speed LogicGround _ consisting of an AlGaAs LED Approval Isolation -TTL/TTL, TTL/ _ and a silicon photodetector. A UL1577 (File No. E55361) CMOS, TTL/LSTTL wide body encapsulation is used VDE 0884 Certification * Power Transistors Isola- to provide creepage and clear- Vromae = 1 kVexes) tion in Motor Drives ance dimensions suitable for VDE 860/805/806/804/750-1/ « Replaces Pulse safety approval by regulatory TEC950 ‘Transformers agencies worldwide. BSI according to « Replaces Slow Photo- . . BS 415/7002/6301 Transistor Isolators (Pins The ONWI35 is for use in ay SETI-SEMKO-NEMKO 2-7 of the CNW135/6 aS hae cra DEMKO according to IEC ‘, width analog applications. 65/380/950/335 Conforms to Pins 1-6 of 6 7 . Pin Phototransistor Current transfer ratio (CTR) for g ¢ High Speed: 1 Mbit/s Couplers. Pin 8 can be the CNW135 is 7% minimum at z * TTL Compatible Tied to any Available Ip= 16 mA. 8 * Performance Guaranteed BiasVoltage of 1.5 V to 30 V e over Temperature 0°C to for High Speed Operation) S 70°C + Pin Compatible with tline 6N135/6 and HCPL-4502/3 Package Ou! 201008 mmm « Very High Common Mode r se | lal Rejection for CNW4503 hh hh « Line Receivers (15 K Vius [| tve momoen ’ Common Mode Transient | na 10 16,400) Immunity and Low Input- Ne ad Output Capacitance of | | B 0.6 pF) one ae - ee + Analog Signal Ground one al Le ssocesn F Isolation (Integrated Photon Detector Provides Improved Linearity over st Foon max we [i] Fa) vec Phototransistor Type) 4° anooe Ft 24,—tve * High Voltage Insulation | | og sert * Video Signal Isolation Hater | Ty Secoaar 254 { 100) TYP DIMENSIONS IN MILLIMETERS AND (INCHES) 6-133 ce

‘The CNW136 is designed for Regulatory Information high speed TTL/TTL applica- These products feature a wide body 8 PIN DIP. This package was tions. A standard 16 mA TTL specifically designed to meet regulatory requirements worldwide. sink current through the input The CNW135/6 and CNW4502/3* have been approved by the LED will provide enough output _ following organizations: current for 1 TTL load and a 5.6K pullup resistor. CTR ofthe UL — Covered under UL component recognition FILE £55361 CNW136 is 19% minimum at VDE = — Approved according to VDE 0884 (marks License No. higher CTR is available. Complies for reinforced insulation at 250 V AC with: DIN IEC 380/VDE 0806 ‘The CNW4502/3 provides the DIN IEC 435/VDE 0805 “ENTWURF” electrical and switching DIN 57804/VDE 0804 (isolation group C) performance of the CNW136, DIN VDE 0860 (HD 195 S6) increased ESD protection and DIN IEC 601 Teil /VDE 0750-1 increased transient immunity. DIN VDE 0160 EN 60950/IEC950 NORDIC - Tested for applications (reinforced insulation) — Class II applications for plugable apparatus in normal tight execution. -SETI-SEMKO-NEMKO-DEMKO-According to TEC 65-IEC380-IEC950-IEC335 BSI _—— Certification according to BS415:1990, BS7002:1989 and BS6301: 1982 for class II applications. ‘Pending SETI and SEMKO approval Absolute Maximum Ratings Schematic Storage Temperature swssssssessnstsneusetistnsnerseeere BB°C to +125°C Lead Solder Temperature ....ssseussssssesetinesssesenee 260°C for 108 Zine (up to seating plane) ar; toys Average Input Current — Ty ————e-eeneeeneeiennenrnen 100 MA —carnooe 22 fy, Peak Transient Input Current — Ip —-—eeenrneeerernemnnne LOA ‘ (S1 ps pulse width, 300 Hz) jon Reverse Input Voltage — Vy (Pint 3-2) sescssssssussnesssstsaestneesense BW Input Power Dissipation (up to 70°C) ..cssssssstsnnsnnesniaree 250 MW* — sanioe, ‘Average Output Current —I, (Pin 6)... cncnccccmm 10 mA connected, “NWA50™% Pin 7 ia not Emitter-Base Reverse Voltage (Pin 5-7) sacsccatsnsstsnssenernessenee BW Output Voltage — Vy (Pin 6-5) sscccscssseessssstneenesseenee -O.5 V to 20 V Supply Voltage — Voc (Pit 8-5) .ovcssnsneeseaesnenertenenes 0.5 V to 30 V Output Power Dissipation ....ccscsssesstntiertiesstseeneneeree 100 mW ‘*Derate at 5.0 mW/°C for operating temperatures above 70°C. CAUTION: The small junction sizes inherent to the design of this bipolar component increases the components susceptibility lodamage from electrostatic discharge (ESD). It is advised that normal static precautions be taken in handling and assemby of this component to prevent damage and /or degradation which may be induced by ESD. 6-134

VDE 0884 Insulation Characteristics [-eseription | Symbot | Characteristic | unit | Installation classification per DIN VDE 0109/12.83, Table 1 for rated mains voltage < 600 Vans Liv for rated mains voltage < 1000 Vaus Ll [Climatic Cassietion SS *rome — Pollution Degree (DIN VDE 0109/12.83) ee a ee Maximum Working Insulation Voltage Viormm | ___1414 _| Vorax | [| 1000 | Vas | Input to Output Test Voltage, Method b* Vp = 1.6 x Vion 100% Production Test with tp = 1 see, 2263 Verax Parti! Discharge <9 Yex_[ 1600 [Va | Input to Output Test Voltage, Method a* ‘Vpr = 1.2 x Viorm, Type and sample test, 1697 Voeak 18 = 60 see, Parkl Discharge <8 9C Ven [1900 [Vas | Highest Allowable Overvoltage* Vin 8000 Verax (Transient Overvoltage, trp = 10 sec) Safety-Limiting Values (Maximum values allowed in the event of a failure, also see Figure 9) Case Temperature Ts 150 °c Current (input Current Ip, Ps = 0) Tg: 400 mA Output Power (obtained by setting pin 8 = 5.5 V, pins 7, 6, 5 = ground) Psi, ovrpur 700 mW Insulation Resistance at Ts,, Vjo= 500 V 210° g Vio = 500 V s **Refer to the front of the optocoupler section of the HP Optoelectronics Designer's Catalog, under Product Safety Regulations 8 Section, (VDE 0884) for a detailed description. 2 Note: Isolation characteristics are guaranteed only within the safety maximum ratings which must be ensured by protective cireuits in the application, Insulation Related Specifications [Parameter [Symbol [Value | Units | _Conditions_ | Min. External Clearance | L(IO1) Measured from input terminals to output (External Air Gap) terminals Min. External Creepage 1102) mm Measured from input terminals to output (External Tracking Path) terminals Min. Internal Clearance 1.0 ‘Through insulation distance (Internal Plastic Gap) conductor to conductor Min. Internal Creepage Measured from input terminals to output (Internal Tracking Path) terminals Comparative Tracking CTI DIN IEC 112/VDE 0303 PART 1 Index Isolation Group Material group (DIN VDE 0109) (per DIN VDE 0109) 6-135

Over Recommended ‘Temperature (T, = 0°C to 70°C) unless otherwise specified. (See note 8.) [_Paramatar [srmbot| Device [atin [ayps [ain [Unie] Tart Conditions Jone Nt] commis | 7] [Tar 26] vo=04¥ | Curent rte De [_ [Pores | y= sema Ratio Vog #4.5¥ om [raelvoreav cNW4502 | » | [ea], [eareltontia wgerowm | fom] | Ford Y Pera ae me a eo cNW136 Iy=3.0 mal SB) + [ee + Pees faa | [Relieve Omen Tout ooo2{ 1 | yA Tp=OmA [ | se PPP Supply Current = AS TT Tepe Forward [245 | go [288] [tax zee] Aina ed ee . ‘Input Reverse ae Eee ca dd ee Forward Voltage [iat Consins [Gy [| [|| w [rium vyeov || J ae noisue | Bp [3 [3 [= | Ss soowe eS Pel _| * favors sami | S| | [ete femme *All typicals at T, = 25°C. 6-136

Over Recommended Temperature (Ty = 0°C to 70°C), Voc = 5 V, Ip = 16 mA, unless otherwise specified. [Parameter | sym| Device | min | tyne [ax | vais] toetconatione | rte.| Note] i Propagation Delay ‘Time to Logic Low tom [2° | 5,8, conwaso2 Ry=19ko ne] ‘CNW135 R,=4.1ko rere ‘Time to Logic High eae ze [a fel” = cnwas02 be | R,=19ka ‘Common Mode Tran- Ip=OmA, Pee [exw | Via ioe Logie High Level Yeu = 10 | oxwaso? | 1, = 25° Rue iona Seem eet sient Immunity at | ICM,1 Vis = 25°C, tegen [eae [0 | et oe [ea | 30 | Ta iis Th=25°C, | cxwesos| 15000] 0,00 | Rrioya 7 Bandwidth CNW135, See Test Circuit 7,10 i cNW136 Q *All typicals are at T, = 25°C. 8 Notes: Ss 1. CURRENT TRANSFER RATIO in percent is defined as the ratio of output collector current, Ip, to the forward LED input current, Ip, times 100. 2. Device considered a two-terminal device: Pins 1,2, 3, and 4 shorted together and Pins 6, 6, 7, and 8 shorted together. 3. Common mode transient immunity in Logic High level is the maximum tolerable (positive) dVcy/dt on the leading edge of the ‘common mode pulse Voy, to assure that the output will remain in a Logie High state (0. Vo > 2.0 V) Common mode transient immunity in Logic Low level is the maximum tolerable (negative) dVcy dt on the trailing edge of the common mode pulse signal, Voy, to assure that the output will remain in a Logic Low state (1c. Vo > 0.8 V). 6. The frequency at which the ac output voltage is 3 dB below the low frequency asymptote. In accordance with UL 1877, each optocoupler is proof tested by applying an insulation test voltage of 2 6000 Vrms for one second leakage detection current limit, I,.p = 6 uA). This test is parfarmed before the 100% Production test shown in the ‘VDE 0884 Insulation Characteristics Table. 8. Use of a 0.1 pf bypass capacitor connected between pins 5 and 8 is recommended for operation. 6-137