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C d b p Resistive Film Ceramic Substrate Inner Electrode t W Protective Coating Electrode 90 K O A S peer E lectronics, Inc. • 199 Bolivar D rive • Bradford, PA 16701 • U SA • 814-362-5536 • Fax: 814-362-8883 • w w w.koaspeer.com Specifications given herein may be changed at any time without prior notice. Please confirm technical specifications before you order and/or use. 11/30/14 C N D bussed square corner resistor array

features

  • M anufactured to type RK73 standards
  • C oncave or convex term inations
  • Less b oard space than individual chips
  • E ight b ussed resistor elem ents included in one array
  • M arking: M arked w ith resistance value
  • Products w ith lead-free term inations m eet E U RoHS requirem ents. E U RoHS regulation is not intended for Pb -glass contained in electrode, resistor elem ent and glass. TD : 7" paper tape C onvex type ordering inform ation 2 significant figures + 1 m ultiplier 1J 10 V : Reverse com m on electrode Blank: S tandard T: S n (O ther term ination styles m ay b e availab le, please contact factory for options) J: ±5% CND 1J 10 V T Elements Type Size Nominal Resistance Tolerance Circuit Symbol Termination Material Packaging Convex: TD 103 J For further inform ation on packaging, please refer to A ppendix A . dim ensions and construction Size Code Figure No. .126±.004 (3.2±0.1) .126±.006 (3.2±0.15) .063±.008 (1.6±0.2) .010±.004 (0.25±0.1) .020±.004 (0.5±0.1) .016±.004 (0.4±0.1) .012±.004 (0.3±0.1) .004 (0.1) .006±.004 (0.15±0.1) .016±.006 (0.4±0.15) .024 ±.006 (0.6 ±0.15 ) .012±.008 (0.3±0.2) — .013±.006 (0.33±0.15) .022±.004 (0.55±0.1) .024±.004 (0.6±0.1) .020±.008 (0.5±0.2) .024±.004 (0.6±0.1) .024 ±.004 (0.6 ±0.1 ) .014±.004 (0.35±0.1) .016±.008 (0.4±0.2) .083±.008 (2.1±0.2) .157±.008 (4.0±0.2) .252±.008 (6.4±0.2) .122±.008 (3.1±0.2) .014±.006 (0.35±0.15) .022±.006 (0.55±0.15) 1J10K 1J10Y 2A10Y 2B10V 2B10 b pa (bot.)a (top)tdCWL Dimensions inches (m m ) .014±.004 (0.35±0.1) .010±.008 (0.25±0.2) .006±.004 (0.15±0.1) 3 2 .025 (0.64) .031 (0.8) 0.05 (1.27) t W a L b p Protective Coating Resistive Film Cerami c Substrate Inner Electrode Electrode C d e t W a L p b C d Protective Coating Resistive Film Cerami c Substrate Inner Electrode Electrode Convex Figure 1 Figure 2 Figure 3 Concave Concave EU .012±.004 (0.3±0.1) .016±.006 (0.4±0.15) .020±.008 (0.5±0.2) e — .020±.004 (0.5±0.1) .016±.004 (0.4±0.1) .022±.004 (0.55±0.1) — .012 (1.6±0.1) .063±.004 (1.6±0.1) .126±.004 (3.2±0.1) .012±.008 (0.3±0.2) .012±.008 (0.3±0.2) .025 (0.64) TD : 7" paper tape TE : 7" em b ossed plastic 2 significant figures + 1 m ultiplier

10 V : Reverse

Y : Side com m on electrode Blank: S tandard T: S n (O ther term ination styles m ay b e availab le, please contact factory for options) J: ±5% CND 2B 10 V T Elements Type Size Nominal Resistance Tolerance Circuit Symbol Termination Material Packaging Concave: TE 103 J K Terminal Symbol resistors

91 K O A S peer E lectronics, Inc. • 199 Bolivar D rive • Bradford, PA 16701 • U SA • 814-362-5536 • Fax: 814-362-8883 • w w w.koaspeer.com Specifications given herein may be changed at any time without prior notice. Please confirm technical specifications before you order and/or use. 11/19 /14 C N D bussed square corner resistor array Absolute Maximum Working Voltage Resistance Tolerance Resistance Range E-12 Part Designation Maximum Overload Voltage (5 Secs. Max.) Operating Temperature Range Power Rating @ 70°C (Per Element) T.C.R. (ppm/°C) Max. applications and ratings CND1J10K CND1J10Y CND2A10Y .063 .05 .031 25V 50V 50V 100V -55°C to +125°C Rated Ambient Temperature +70°C ±200 47 Ω - 39 k Ω 22 Ω - 39 k Ω 100 Ω - 100k Ω J: ±5% CND2B10V CND2B10 circuit schem atics and m arkings 103 R R R R R R R R 1234 5 9876 CND1J10VK R R R R R R R R 1234 5 9876 R R R R R R R 234 5 10 9 8 7 R R R R R R R R R 1234 5 9876 CND1J10K CND1J10Y, CND2A10Y CND2B10V R R R R R R R R 1234 5 9876 CND2B10 103 103 103 103 Derating Curve environm ental applications % Rated Power 100 20 40 60 80 1 001 201 401 60 12570 Ambient Temperature (°C) Circuit Board Application IC Vc c ICIC Vc c IC Performance Characteristics CND1J10VK Parameter Requirement ∆ R ±1% Limit Typical Test Method Resistance T.C .R. 25°C W ithin specified tolerance W ithin specified T.C .R. O verload (S hort tim e) Rated voltage x 2.5 for 5 seconds ±2.0% ±0.5% Resistance to S older Heat 260°C ± 5°C , 10 seconds ± 1 second ±1.0% C onvex: ±0.2% C oncave: ±0.25% Rapid C hange of Tem perature -55°C (30 m inutes), +125°C (30 m inutes), 5 cycles ±1.0% C onvex: ±0.1% C oncave: ±0.25% M oisture Resistance 40°C ± 2°C , 9 0 - 9 5% RH, 1000 hours, 1.5 hr O N , 0.5 hr O FF cycle ±5.0% ±1.0% E ndurance at 70°C 70°C ± 2°C , 1000 hours, 1.5 hr O N , 0.5 hr O FF cycle ±5.0% C onvex: ±0.5% C oncave: ±1% High Tem perature E xposure +125°C , 1000 hours ±1.0% ±0.2% resistors For resistors operated at an am bient tem perature of 70°C or above, a pow er rating shall be derated in accordance w ith the above derating curve. * N ote that netw ork resistors generate higher heat rather than single flat chip resistors even under rated pow er output