CMS03N06TA-HF COMCHIP | Alldatasheet

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  • High density cell design for low RDS(ON). Circuit Diagram G D S G : GATE S : SOURCE D : DRAIN - Excellent package for heat dissipation. Mechanical data - Case: SOT-23, molded plastic. - Mounting position: Any. QW-JTR163 REV:A Page 1 Drain-source voltage Unit SymbolParameter VDS Value V Maximum Ratings (at Ta=25°C unless otherwise noted) Gate-source voltage VGS ID V ADrain current Pulsed drain current (Note 1) IDM A Junction and storage temperature range RθJA TJ, TSTG W °C/W Thermal resistance junction to ambient (Note 2) PDTotal power dissipation TA=25°C TA=70°C Notes: 1. Pulse width ≤ 300µs, duty cycle ≤ 2%. TA=25°C TA=70°C 2. RθJA is the sum of the junction to case and case to ambient thermal resistance, where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is quaranteed by design, while RθJA is determined by the board design. The maximum rating presented here is based on mounting on a 1 in 2 pad of 2oz copper. ±20 2.4 1.2 0.8 104 -55 to +150

Electrical Characteristics (at TJ=25°C unless otherwise noted) SymbolParameter Conditions Min Max Unit Drain-source breakdown voltage BVDSS V Typ Static Parameters Zero gate voltage drain current IDSS Gate-body leakage current IGSS µA nA RDS(ON) mΩStatic drain-source on-resistance VDiode forward voltage Reverse transfer capacitance Input capacitance VSD Coss Crss pFOutput capacitance Dynamic Parameters Ciss nC QgTotal gate charge Switching Parameters Turn-on delay time td(on) Turn-off delay time td(off) Gate threshold voltage VGS(th) V nA Comchip Technology CO., LTD. QW-JTR163 REV:A Page 2 Reverse recovery time trr ns Turn-off fall time Turn-on rise time Gate source charge Gate drain charge Reverse recovery charge Qgs Qgd Qrr tr tf VGS = 0V, ID = 250µA VDS = 60V, VGS = 0V VGS = ±20V, VDS = 0V VGS = ±10V, VDS = 0V VDS = VGS, ID = 250µA VGS = 10V, ID = 3A VGS = 4.5V, ID = 2A IS = 3A, VGS = 0V VDS = 10V, VGS = 0V, f = 1MHz VGS = 10V, VDS = 30V, ID = 3A IF = 3A, di/dt = 100A/µs VGS = 10V, VDS = 30V, RL = 20Ω, RGEN = 3Ω ±100 ±50 0.9 1.3 2.0 86 100 92 120 409 1.2 10.27 1.65 2.11 6.99 32.6 3.6 17.6

Fig.1 - Output Characteristics Drain-Source Voltage, VDS (V) Drain Current, ID (A) 0 0.5 1 1.5 2 Fig.2 - Transfer Characteristics Gate-Source Voltage, VGS (V) Drain Current, ID (A) 3.5 0 42 120 Fig.3 - On-Resistance vs. Drain Current and Cate Voltage Capacitance, (pF) 1.5 0.5 Gate Charge, Qg (nC) Normalized On-Resistance Fig.4 - On-Resistance vs. Junction Temperature Typical Rating and Characteristic Curves (CMS03N06TA-HF) MOSFET 200 Drain Current, ID (A) 0 4 6 8 12 Temperature, T (°C) On-Resistance, RDS(ON) (mΩ) Drain-Source Voltage, VDS (V) 2 10 2.5 25°C 125°C 100 204 8 12 16 300 500 400 600 700 Comchip Technology CO., LTD. QW-JTR163 REV:A Page 3 Fig.5 - Capacitance Characteristics Fig.6 - Gate Charge Gate-Source Voltage, VGS (V) 50 75 100 15025 125 VGS=10V ID=3A VDS=30V ID=3A 110 VGS=4V VGS=10V 100 Ciss Coss Crss 30.5 1.5 VGS=2V VGS=3V VGS=4V VGS=2.5V VGS=10V VDS=5V

0.1 Fig.7 - Safe Operation Area Drain-Source Voltage, VDS (V) Drain Current, ID (A) 1 10 0.1 0.01 100 Comchip Technology CO., LTD. QW-JTR163 REV:A Page 4 Typical Rating and Characteristic Curves (CMS03N06TA-HF) Fig.8 - Maximum Continuous Drain Current vs. Ambient Temperature Ambient Temperature, TA (°C) Drain Current, ID (A) 50 75 100 15025 125 RθJA=104°C/W TJ(max)=150°C TA=25°C DC 1ms 100ms 10ms 100µsRDS(ON) limit

Reel Taping Specification D1 D2 D A B C d E F P W (mm) (inch) SOT-23 SYMBOL (inch) SOT-23 SYMBOL A (mm) B C d D D1 D2 E F P P0 P1 W W1 − 0.004 0.484 ± 0.039 Comchip Technology CO., LTD. QW-JTR163 REV:A Page 5 120°

(pcs) Reel Size (inch) 73,000 REEL PACK Marking Code Part Number CMS03N06TA-HF Marking Code S10. Suggested P.C.B. PAD Layout SIZE (inch) 0.035 (mm) 0.90 0.80 0.95 0.031 0.037 SOT-23 2.00 0.079 A B C D 2.90 0.114E A C B D E C S10 Comchip Technology CO., LTD. QW-JTR163 REV:A Page 6