CMP04

CMP04 (Rev. E)

Document overview

• Manufacturer or author: Analog Devices, Inc.
• PDF pages: 8

Technical content

–2– CMP04–SPECIFICATIONS Parameter Symbol Conditions Min Typ Max Unit Input Offset Voltage VOS RS = 0 Ω, RL = 5.1 kΩ, VO = 1.4 V1 0.4 1 mV Input Offset Current IOS IIN(+) – IIN(–), RL = 5.1 kΩ, VO = 1.4 V 2 10 nA Input Bias Current I B IIN(+) or IIN(–) 25 100 nA Voltage Gain AV RL ≥ 15 kΩ, V+ = 15 V2 80 200 V/mV Large Signal Response Time t r VIN = TTL Logic Swing, VREF = 1.4 V3 VRL = 5 V, RL = 5.1 kΩ 300 ns Small Signal Response Time t r VIN = 100 mV Step3, 5 mV Overdrive VRL = 5 V, RL = 5.1 kΩ 1.3 µs Input Voltage Range CMVR Note 4 0 V+ – 1.5 V Common-Mode Rejection Ratio CMRR Notes 2, 5 80 100 dB Power Supply Rejection Ratio PSRR V+ = 5 V to 18 V 2 80 100 dB Saturation Voltage VOL VIN(–) ≥ 1 V, VIN(+) = 0, ISINK ≤ 4 mA 250 400 mV Output Sink Current I SINK VIN(–) ≥ 1 V, VIN(+) = 0, VO ≤ 1.5 V 6 16 mA Output Leakage Current I LEAK VIN(+) ≥ 1 V, VIN(–) = 0, VO = 30 V 0.1 100 nA Supply Current I+ RL = ∞, All Comps V+ = 30 V 0.8 2.0 mA NOTES 1At output switch point, V O = 1.4 V, R S = 0 Ω with V+ from 5 V, and over the full input common-mode range (0 V to V+ – 1.5 V). 2Guaranteed by design. 3Sample tested. 4The input common-mode voltage or input signal voltage should not be allowed to go negative by more than 0.3 V. The upper end of the common-mode voltage range is V+ – 1.5 V, but either or both inputs can go to 30 V without damage. 5RL ≥ 15 kΩ, V+ = 15 V, V CM = 1.5 V to 13.5 V. Specifications subject to change without notice. ELECTRICAL CHARACTERISTICS (@ V+ = 5 V, TA = 25/H11543C, unless otherwise noted.) ABSOLUTE MAXIMUM RATINGS 1 Operating Temperature Range Package Type /H9258JA 2 /H9258JC Unit 14-Lead SOIC 120 36 °C/W NOTES 1Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2θJA is specified for worst-case mounting conditions, i.e., θJA is specified for device soldered to printed circuit board for SOIC package. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the CMP04 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE REV. E

2At output switch point, V O = 1.4 V, R S = 0 Ω with V+ from 5 V; and over the full input common-mode range (0 V to V+ –1.5 V). voltage range is V+ – 1.5 V, but either or both inputs can go to +30 V without damage. Specifications subject to change without notice.

1 WATT

Figure 3. Burn-In Circuit

–4– CMP04–Typical Performance Characteristics TEMPERATURE (/H11543C) VOS – OFFSET VOLTAGE (mV) 0.3 –40 0 0.2 0.1 –0.1 –0.2 –0.3 –20 20 40 60 80 100 120 140–60 TPC 1. Offset Voltage vs. Temperature TEMPERATURE (/H11543C) AV – VOLTAGE GAIN (V/mV) 160 –40 0 110 100 –20 20 40 60 80 100 120 140–60 150 140 130 120 TPC 4. Voltage Gain vs. Temperature V+ – SUPPLY VOLTAGE (VDC) IB – INPUT BIAS CURRENT (nA) 51 5 10 20 25 30 35 400 TA = 0/H11543C TA = +25/H11543C/70/H11543C TPC 2. Input Bias Current vs. V+ and Temperature SUPPLY VOLTAGE (VDC) 1.1 51 5 0.9 0.3 0.1 10 20 25 30 35 400 TA = 0/H11543C TA = +25/H11543C SUPPLY CURRENT (mA) 0.5 0.7 TA = +70/H11543C TPC 5. Supply Current vs. Supply Voltage TEMPERATURE (/H11543C) IOS – INPUT OFFSET CURRENT (nA) 3.0 –40 0 2.0 1.0 –1.0 –2.0 –3.0 –20 20 40 60 80 100 120 140–60 TPC 3. Input Offset Current vs. Temperature IO – OUTPUT SINK CURRENT (mA) VOL – SATURATION VOLTAGE (VDC) 1.0 0.1 0.01 0.001 0.1 1.0 10 1000.01 TA = +25/H11543C OUT OF SATURATION TPC 6. Output Voltage vs. Output Current and Temperature TIME (/H9262s) 6.0 5.0 –50 –100 0.5 1.0 1.5 2.00 20mV TA = 25/H11543C OUTPUT VOLTAGE VO (V) 4.0 3.0 2.0 1.0 INPUT VOLTAGE VIN (mV) 100mV INPUT OVERDRIVE = 5.0mV VIN 5.1k/H9024 VOUT 5VDC TPC 7. Response Time for Various Input Overdrives—Negative Transition TIME (/H9262s) 6.0 5.0 –50 –100 0.5 1.0 1.5 2.00 20mV TA = 25/H11543C OUTPUT VOLTAGE VO (V) 4.0 3.0 2.0 1.0 INPUT VOLTAGE VIN (mV) 5mV INPUT OVERDRIVE = 100mV VIN 5.1k/H9024 VOUT 5VDC TPC 8. Response Time for Various Input Overdrives—Positive Transition REV. E

Figure 15. Time Delay Generator

Rev. E | Page 8 of 8 OUTLINE DIMENSIONS CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. COMPLIANT TO JEDEC STANDARDS MS-012-AB 060606-A 14 8 6.20 (0.2441) 5.80 (0.2283) 4.00 (0.1575) 3.80 (0.1496) 8.75 (0.3445) 8.55 (0.3366) 1.27 (0.0500) BSC SEATING PLANE 0.25 (0.0098) 0.10 (0.0039) 0.51 (0.0201) 0.31 (0.0122) 1.75 (0.0689) 1.35 (0.0531) 0.50 (0.0197) 0.25 (0.0098) 1.27 (0.0500) 0.40 (0.0157) 0.25 (0.0098) 0.17 (0.0067) COPLANARITY 0.10 45° Figure 16. 14-Lead Standard Small Outline Package [SOIC_N]

REVISION HISTORY

10/2018—Rev. D to Rev. E Changed CMP04FS and CMP04F to CMP04FSZ .... Throughout 3/2003—REV . C to REV . D Deletion of 14-Lead CERDIP and 14-Lead PDIP Removal of Dice Characteristics, Wafer Test Limits, and Typical ©2018 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the prop erty of their respective owners. D00266-0-10/18(E)