CM3196

CM3196 CALMIRCO | Alldatasheet

Document overview

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Technical content

Features

Ideal for DDR-I, -II VTT applications Sinks and sources 2A for DDR-I, 0.6A for DDR-II Shutdown input to support ACPI states Operates down to 1.5V input voltage Integrated power MOSFETs Overcurrent protection Over temperature protection Excellent accuracy VTT = VREF ± 30mV VTT = VDDQ/2 ± 2% 8-pin SOIC or PSOP package Lead-free versions available

Applications

DDR-I, -II memory termination Active termination buses Graphics card memory termination Product Description The CM3196 is a sinking and sourcing regulator specif- ically designed for DDR-I, -II VTT bus termination. The output voltage accurately tracks VDDQ/2. For DDR-I it can source and sink current up to 2A with a load regu- lation of 0.5%. This current adequately serves both sin- gle and dual channel DDR-I memory systems. For power conscious notebook applications, the CM3196 also operates from a VDDQ of 1.5V or 1.8V with less current drive. For DDR-II applications, the CM3196 provides up to 0.6A at 0.9V to drive the memory con- troller VTT. For boards which support Suspend to RAM (STR) functionality, the CM3196 provides a Shutdown (SD) pin. When SD is set low, VTT will be in tri-state mode, causing the output to go high impedance. In this mode, CM3196 power is saved by significantly reducing the quiescent current. VREF voltage remains VDDQ/2. The CM3196 provides overcurrent and over tempera- ture protection. These features protect the chip from excessive heating due to high current and high temper- ature. The CM3196 is housed in an 8-pin SOIC or PSOP package and is available with optional lead-free finish- ing. Simplified Electrical Schematic VREF AVIN GND VSENSE 50K IN OUT Buffer VTT Driver 50K VDDQ PVIN SD Over Temp Over Current Reference

© 2004 California Micro Devices Corp. All rights reserved. 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 Tel: 408.263.3214 Fax: 408.263.7846 www.calmicro.com 04/22/04 CM3196

Ordering Information

Note 1: Parts are shipped in Tape & Reel form unless otherwise specified. PIN DESCRIPTIONS LEAD(S) NAME

DESCRIPTION

Shutdown input, active low VSENSE Feedback from VTT input VREF Reference output, VDDQ/2 VDDQ VDDQ input AVIN Analog circuit power input PVIN Power transistor input VTT Output PACKAGE / PINOUT DIAGRAM Note: This drawing is not to scale. 8-lead SOIC GND SD VSENSE VREF VTT PVIN AVIN TOP VIEW 8-lead PSOP GND SD VSENSE VREF VTT PVIN AVIN VDDQ TOP VIEW GND VDDQ PART NUMBERING INFORMATION Pins Package Standard Finish Lead-free Finish Ordering Part Number1 Part Marking Ordering Part Number1 Part Marking SOIC-8 CM3196-12SN CM3196-12SN CM3196-12SM CM3196-12SM PSOP-8 CM3196-12SB CM3196-12SB CM3196-12SH CM3196-12SH

© 2004 California Micro Devices Corp. All rights reserved. 04/22/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ▲Tel: 408.263.3214 Fax: 408.263.7846 www.calmicro.com CM3196 Specifications Note 1: These devices must be derated based on thermal resistance at elevated temperatures. The device packaged in an 8-pin SOIC package must be derated at θJA = 151°C/W and the 8-pin PSOP must be derated at θJA = 43°C/W. ABSOLUTE MAXIMUM RATINGS PARAMETER RATING UNITS AVIN Operating Supply Voltage V VDDQ Input Voltage V Pin Voltages VTT Output Any other pins V V Storage Temperature Range -40 to +150 Operating Temperature Range Ambient Junction -40 to +85 -40 to +150 Power Dissipation (See note 1) Internally Limited W

© 2004 California Micro Devices Corp. All rights reserved. 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 Tel: 408.263.3214 Fax: 408.263.7846 www.calmicro.com 04/22/04 CM3196 Specifications (cont’d) DDR-I Features Note 1: Operating characteristics are over Standard Operating Conditions unless otherwise specified. STANDARD OPERATING CONDITIONS PARAMETER VALUE UNITS VDDQ 2.5 V AVIN 2.5 V PVIN 2.5 V Ambient Operating Temperature -40 to +85 CVOUT 220 +20% µF ELECTRICAL OPERATING CHARACTERISTICS (SEE NOTE 1) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VIN Input Voltage Range PVIN pin AVIN pin 2.2 2.2 2.5 2.5 AVIN 5.5 V V ICC AVIN Quiescent Current ITT = 0A 450 µA ICCSD AVIN Quiescent Current in Shut Down VSD = logic "0" 115 µA VTT VTT Output Voltage PVIN = 2.5V PVIN = 1.8V PVIN = 1.5V ILOAD = 0 to 2A or ILOAD = -2A to 0A ILOAD = 0 to 0.75A or ILOAD = -0.75A to 0A ILOAD = 0 to 0.3A or ILOAD = -0.3A to 0A 1.225 1.225 1.225 1.250 1.250 1.250 1.275 1.275 1.275 V V V VREF Output Reference Voltage VDDQ = 2.5V, IREF = 0A 1.225 1.250 1.275 V VOSVTT Output Offset from VREF -30 mV ZREF VREF Output Impedance IREF = -5µA to 5µA kΩ ZVDDQ VDDQ Input Impedance 100 kΩ ILIM VTT Current Limit 2.5 A VSD Shutdown Logic Logic "1" Level Logic "0" Level 1.5 0.4 V V TDISABLE THYST Shutdown Temperature Thermal Hysteresis 150

© 2004 California Micro Devices Corp. All rights reserved. 04/22/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ▲Tel: 408.263.3214 Fax: 408.263.7846 www.calmicro.com CM3196 Specifications (cont’d) DDR-II Features Note 1: Operating characteristics are over Standard Operating Conditions unless otherwise specified. STANDARD OPERATING CONDITIONS PARAMETER VALUE UNITS VDDQ 1.8 V AVIN 3.3 V PVIN 1.8 V Ambient Operating Temperature -40 to +85 CVOUT 220 +20% µF ELECTRICAL OPERATING CHARACTERISTICS (SEE NOTE 1) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VIN Input Voltage Range PVIN pin AVIN pin 1.5 2.2 1.8 3.3 AVIN 5.5 V V ICC AVIN Quiescent Current ITT = 0A 450 µA ICCSD AVIN Quiescent Current in Shut Down VSD = logic "0" 115 µA VTT VTT Output Voltage PVIN = 1.8V PVIN = 1.5V AVIN > 2.2V, PVIN > 2.2V ILOAD = 0 to 0.6A or ILOAD = -0.6A to 0A ILOAD = 0 to 0.3A or ILOAD = -0.3A to 0A ILOAD = 0 to 1.2A or ILOAD = -1.2A to 0A 0.882 0.882 0.882 0.9 0.9 0.9 0.918 0.918 0.918 V V V VREF Output Reference Voltage VDDQ = 1.8V, IREF = 0A 0.882 0.9 0.918 V VOSVTT Output Offset from VREF -30 mV ZREF VREF Output Impedance IREF = -5µA to 5µA kΩ ZVDDQ VDDQ Input Impedance 100 kΩ ILIM VTT Current Limit 2.5 A VSD Shutdown Logic Logic "1" Level Logic "0" Level 1.5 0.4 V V TDISABLE THYST Shutdown Temperature Thermal Hysteresis 150

© 2004 California Micro Devices Corp. All rights reserved. 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 Tel: 408.263.3214 Fax: 408.263.7846 www.calmicro.com 04/22/04 CM3196 Mechanical Details The CM3196 is available in an 8-lead SOIC and PSOP package. SOIC-8 Mechanical Specifications Dimensions for CM3196 devices packaged in 8-pin SOIC packages are presented below. For complete information on the SOIC-8 package, see the California Micro Devices SOIC Package Informa- tion document. * This is an approximate number which may vary. Package Dimensions for SOIC-8 PACKAGE DIMENSIONS Package SOIC Leads Dimensions Millimeters Inches Min Max Min Max A 1.35 1.75 0.053 0.069 0.10 0.25 0.004 0.010 B 0.33 0.51 0.013 0.020 C 0.19 0.25 0.007 0.010 D 4.80 5.00 0.189 0.197 E 3.80 4.19 0.150 0.165 e

1.27 BSC

0.050 BSC

H 5.80 6.20 0.228 0.244 L 0.40 1.27 0.016 0.050 # per tube 100 pieces* # per tape and reel 2500 pieces Controlling dimension: inches Mechanical Package Diagrams E D H TOP VIEW L END VIEW C e B A SEATING PLANE SIDE VIEW Pin 1 Marking

© 2004 California Micro Devices Corp. All rights reserved. 04/22/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ▲Tel: 408.263.3214 Fax: 408.263.7846 www.calmicro.com CM3196 Mechanical Details PSOP-8 Mechanical Specifications Dimensions for CM3196 devices packaged in 8-pin PSOP packages with an intagrated heatslug are pre- sented below. For complete information on the PSOP-8 package, see the California Micro Devices PSOP-8 Package Infor- mation document. * This is an approximate number which may vary. Centered on package centerline. Package Dimensions for PSOP-8 PACKAGE DIMENSIONS Package PSOP-8 Leads Dimensions Millimeters Inches Min Max Min Max A 1.30 1.62 0.051 0.064 0.03 0.10 0.001 0.004 B 0.33 0.51 0.013 0.020 C 0.18 0.25 0.007 0.010 D 4.83 5.00 0.190 0.197 E 3.81 3.99 0.150 0.157 e 1.02 1.52 0.040 0.050 H 5.79 6.20 0.228 0.244 L 0.41 1.27 0.016 0.050 x 3.56 4.06 0.130 0.150 y** 2.29 2.79 0.090 0.110 # per tube 100 pieces* # per tape and reel 2500 pieces Controlling dimension: inches Mechanical Package Diagrams H TOP VIEW L END VIEW C e B A SEATING PLANE SIDE VIEW Pin 1 E D H BOTTOM VIEW x y y/2 x/2 Marking D E Heat Slug