CM3131-11SH

CM3131 CALMIRCO | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 10

Technical content

Features

Integrated power solution for DDR-I and DDR-II memory systems with few external components Three all-linear regulators for VDDQ, VTT and VSTBY power supply applications Lowest system cost and smallest footprint for DDR power solutions VDDQ regulator/driver utilizes external N-FET to provide up to 15A current at 2.5V/1.8V VTT source/sink regulator provides up to 2A at 1.25V for DDR-I systems or 0.65A at 0.9V for the DDR-II memory controller (not DDR-II memory) LDO standby regulator provides up to 500mA at 2.5V for DDR-I and at 1.8V for DDR-II systems Can be ganged for higher current applications Over temperature and reverse current protection Over current protection for VSTBY and VTT regulator Available in 8 lead and 14 lead PSOP packages Lead-free versions available

Applications

Desktop PCs, notebooks, and workstations Set top boxes, digital TVs, printers Embedded systems Product Description The CM3131 family of all-linear regulators provides an integrated power solution for DDR-I/-II memory systems in both run-time and standby modes of operation. The CM3131 is ideal for designs incorporating both a main 3.3V and a standby (3.3V or 5V) supply. The CM3131 features three independent linear regulators for VDDQ, VTT and VSTBY supply regulation and will maintain an accuracy of ±1% across the operating temperature range. The CM3131 is offered in two configurations. The CM3131-01/11 drives a single external N-FET on a single VDDQ rail. The CM3131-02 drives two external unmatched N-FETs on two VDDQ rails. Each VDDQ rail incorporates an adjustment pin (SENSE) to enable setting VDDQ in the 2.2V to 2.8V range, supporting DIMMs with different supply requirements or DDR-II type devices. The CM3131-01/11 is available in 8-lead PSOP package and the CM3131-02 is available in 14-lead PSOP package. The CM3131 devices are also available with optional lead-free finishing. Electrical Schematic

© 2004 California Micro Devices Corp. All rights reserved. CM3131 PACKAGE / PINOUT DIAGRAM Note: These drawings are not to scale. PIN DESCRIPTIONS PART NUMBER -01 -11 -02 NAME

DESCRIPTION

VDDQ input for VREF and VDDQ Output in Standby VTT VTT Output for termination resistors NC No connection GND Ground SEL Select Input, active low NC No connection EN Enable Input, active high SENSE / SENSE1 Sense Input, Adjusts VDDQ Rail VCC 3.3V Main Input Supply VSTBY 3.3V or 5V Standby Input Supply DRIVE / DRIVE1 Drive Output for VDDQ External n-FET DRIVE2 Drive Output for VDDQ External n-FET SENSE2 Sense Input, Adjusts VDDQ Rail VDDQ 2 VDDQ Input for VREF and VDDQ Output in Standby

Ordering Information

PART NUMBERING INFORMATION STANDARD FINISH LEAD-FREE FINISH PINS PACKAGE ORDERING PART NUMBER1 PART MARKETING ORDERING PART NUMBER1 PART MARKING PSOP-8 CM3131-01SB CM3131-01SB CM3131-01SH CM3131-01SH PSOP-8 CM3131-11SB CM3131-11SB CM3131-11SH CM3131-11SH PSOP-14 CM3131-02SB CM3131-02SB CM3131-02SH CM3131-02SH Note 1: Parts are shipped in Tape & Reel form unless otherwise specified. V DDQ V TT GND SEL/EN DRIVE VSTBY VCC SENSE CM3131-01/11 PSOP-8 TOP VIEW PSOP-14 V TT V DDQ1 V DDQ2 SENSE2 DRIVE2 DRIVE1 V STBY CM3131-02 TOP VIEW NC GND SEL NC SENSE1 VCC EN

© 2004 California Micro Devices Corp. All rights reserved. CM3131 Functional Description The CM3131-01 / -11 and CM3131-02 provide power for DDR-I/DDR-II memories from three voltage regulators on-chip with either one or two external N-FETs respectively. There is an over- temperature thermal shutdown if any of the regulators overheat. Each regulator has reverse current protection in the event of any being shut down. The linear regulator-driver/s with external N-FET/s can provide up to 15A at 2.5V/1.8V for the VDDQ of DDR-I/-II memory, from an input supply voltage of 2.8V-3.6V. An external feedback resistor divider, connected to the SENSE1 pin, enables selection of VDDQ output voltages from 2.2V to 2.8V for use with DDR-I memories requiring other than 2.5V for VDDQ. VDDQ = 1.25V x (R1+R2)/R2. When SENSE1 is connected to GND or left open, VDDQ is fixed at 2.50V (and VTT at 1.25V). For DDR-II operation, VDDQ can be set from 1.7V to 1.9V. The VTT regulator is a linear source-sink regulator powered from the VDDQ output that supplies the VTT supply required by DDR-I memory termination resistors. This regulator sinks or sources up to 2A at 1.25V to or from the DDR-I bus termination resistors. For DDR-II applications, the regulator sinks or sources 0.65A at 0.9V. The VTT output voltage accurately tracks VDDQ/2 to 1%. When there is no VCC provided, VTT is powered down and its output is 0V. This regulator has overload current limiting of 2.5A. The standby regulator is a LDO regulator that is powered from a standby voltage, VSTBY, of 3.3V or 5V, and supplies a regulated output of up to 500mA to the VDDQ of the DDR memory to enable it to retain its contents during the standby mode. It provides 2.5V for DDR-I and 1.8V for DDR-II. The CM3131-01 and CM3131-11 differ with regards the selection of truth table for determining which S0- S5 sequencing matrix the chip is set for. The CM3131-02 has both EN and SEL pins to more accurately define each Sx stage without monitoring the VCC or VSTBY voltages. Two CM3131s can be ganged together to provide VDDQ power to dual channels of DDR memory, and the memory controller chip of any chip set. VTT Linear Source-Sink VTT Reg VDDQ VDDQ VDDQ LDO Drive SEL / EN CCC CSBY CTT CDDQ 5VSTBY / 3.3VSTBY GND GND 2.8V / 3.0V / 3.3V for DDR-I, 2.2V /2.5V / 3.3V for DDR-II DRIVE SENSE VDDQ LDO VDDQ / VTT Control VDDQ FET VTT VCC Only needed for DDR-I if VDDQ is not 2.5V, e.g. 2.6V or 2.7V. Set to 1.7V to 1.9V for DDR-II PSOP-8 Internal VSBY voltage doubler ensures VG > 5.3V Drives any N-FET with CGS <1200pF VTT Linear Source-Sink VTT Reg VDDQ VDDQ1 VDDQ LDO Drives CCC CSBY CTT CDDQ2 5VSTBY / 3.3VSTBY GND DRIVE1 CDDQ1 DRIVE2 VDDQ2 SENSE1 SENSE2 VDDQ1 VDDQ2 VDDQ LDOs VDDQ / VTT Control SEL GND N-FET1 N-FET2 VTT 2.8V / 3.0V / 3.3V for DDR-I, 2.2V /2.5V / 3.3V for DDR-II EN VCC CM3131-02 Examples of Single and Dual N-FET Drive Configurations CM3131-01/11

© 2004 California Micro Devices Corp. All rights reserved. CM3131 Functional Description (cont’d) VCC VSTBY SEL VDDQ 1,2 VTT 3V/3.3V 5V/3.3V ON VDDQ VDDQ / 2 X 5V/3.3V OFF VDDQ STBY <VCC MIN X ON X <VSTBY MIN OFF Truth Table for CM3131-01 S to R VCC VSTBY SEL VDDQ OUT VTT OUT 3V/3.3V 5V/3.3V ON VDDQ VDDQ / 2 3V/3.3V 5V/3.3V ON VDDQ VDDQ / 2 3V/3.3V 5V/3.3V ON VDDQ VDDQ / 2 3V/3.3V 5V/3.3V OFF VDDQ STBY <VCC MIN 5V/3.3V OFF <VCC MIN 5V/3.3V OFF Sequencing Matrix for CM3131-01 for Suspend to RAM operation No S to R VCC VSTBY SEL VDDQ OUT VTT OUT 3V/3.3V 5V/3.3V ON VDDQ VDDQ / 2 3V/3.3V 5V/3.3V ON VDDQ VDDQ / 2 3V/3.3V 5V/3.3V ON VDDQ VDDQ / 2 <VCC MIN 5V/3.3V ON <VCC MIN 5V/3.3V ON <VCC MIN 5V/3.3V ON Sequencing Matrix for CM3131-01 for Suspend to RAM Not Supported VCC VSTBY EN VDDQ OUT VTT OUT 3V/3.3V 5V/3.3V ON VDDQ VDDQ / 2 <VCC MIN 5V/3.3V ON VDDQ STBY <VCC MIN X OFF X <VSTBY MIN OFF Truth Table for CM3131-11

© 2004 California Micro Devices Corp. All rights reserved. CM3131 Functional Description (cont’d) S to R VCC VSTBY EN VDDQ OUT VTT OUT 3V/3.3V 5V/3.3V ON VDDQ VDDQ / 2 3V/3.3V 5V/3.3V ON VDDQ VDDQ / 2 3V/3.3V 5V/3.3V ON VDDQ VDDQ / 2 <VCC MIN 5V/3.3V ON VDDQ STBY <VCC MIN 5V/3.3V OFF <VCC MIN 5V/3.3V OFF Sequencing Matrix for CM3131-11 for Suspend to RAM operation VCC VSTBY SEL EN VDDQ OUT VTT OUT 3V/3.3V 5V/3.3V ON ON VDDQ VDDQ / 2 <VCC MIN 5V/3.3V OFF ON VDDQ STBY X <VSTBY MIN OFF ON X ON ON <VCC MIN X X OFF Truth Table for CM3131-02 Table 3 VCC VSTBY SEL EN VDDQ OUT VTT OUT 3V/3.3V 5V/3.3V ON ON VDDQ VDDQ / 2 3V/3.3V 5V/3.3V ON ON VDDQ VDDQ / 2 3V/3.3V 5V/3.3V ON ON VDDQ VDDQ / 2 <VCC MIN 5V/3.3V OFF ON VDDQ STBY <VCC MIN X ON OFF <VCC MIN X ON OFF Sequencing Matrix for CM3131-02 for Suspend to RAM operation

© 2004 California Micro Devices Corp. All rights reserved. CM3131 Specifications ABSOLUTE MAXIMUM RATINGS PARAMETER RATING UNITS ESD (Human Body Model) ± 2000 V VCC, VSTBY, DRIVEx V SEL, SENSEx (GND – 0.6) to (VCC + 0.6) V VDDQX, VTT (GND – 0.6) to (VCC + 0.6) V Operating Temperature Range Ambient 0 to +70 Junction 0 to +125 Storage Temperature Range -40 to +150 STANDARD OPERATING CONDITIONS PARAMETER RATING UNITS Temperature Range (Ambient) 0 to +70 1. VDDQ Regulator-Driver Supply Voltage VCC 2.8 to 3.6 V Load Current 0 to 15 A CCC, CDDQ 4.7, 220 µF 2. VTT Regulator Supply Voltage VDDQ 1.8 or 2.5 V Load Current A CTT 220 µF 3, VSTBY Regulator Supply Voltage VSTBY 3.0 to 5.5 V Load Current 0 to 500 mA

© 2004 California Micro Devices Corp. All rights reserved. CM3131 Specifications (cont’d) ELECTRICAL OPERATING CHARACTERISTICS (SEE NOTE 1) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS General Parameters TOVER Shutdown Junction Temperature 150 VDDQ Regulator/Driver Parameters (with FDP6030L or similar MOSFET as an external transistor) VCC MIN Input Voltage VDDQ = 2.5V, IDDQ = 6A, each channel, SENSE = 0V 2.80 V VDDQ Output Voltage Range IDDQ = 2.5A, VCC = 3.3V, SENSE = 0V 2.45 2.50 2.55 V VDRIVE H 5 DRIVE High Output Voltage VSTBY = 5V, VCC = 3.3V 9.50 V VDRIVE H 3 DRIVE High Output Voltage VSTBY = 3.3V, VCC = 3.3V 6.1 V CLOAD External FET Gate Capacitance VSTBY = 5V, VCC = 3.3V 1200 pF tRISE DRIVE Voltage Rise Time VSTBY = 5V, VCC = 3.3V, CLOAD = 1200pF 2.5 ms VDDQ LOAD Load Regulation @ 25°C VCC = 3.3V, IDDQ = 0.1A to 6A each channel -1.0 1.0 VDDQ LINE Line Regulation @ 25°C IDDQ = 2.5A, VCC = 2.8V to 3.6V -1.0 1.0 VTT Regulator Parameters VTT Output Voltage Range VDDQ = 2.50V, ITT = 0A 1.20 1.25 1.30 V VTT LOAD Load Regulation @ 25C ITT = 0.1A to 2A, VDDQ = 2.5V -1.0 1.0 VTT LINE Line Regulation @ 25C ITT = 0A, VCC = 2.8V to 3.6V -1.0 1.0 ITT LIM Current Limit 2.3 A ITT SC Short Circuit Current Limit VTT < 1V 0.6 A VSTBY Regulator Parameters VDDQ STBY Output Voltage Range IDDQ =150mA, VSTBY = 5V, SENSE =0V 2.45 2.50 2.55 V VDDQSB LD Load Regulation @ 25C IDDQ = 10mA to 500mA, VSTBY = 5V -1.0 1.0 VDDQ SBLN Line Regulation @ 25C IDDQ = 150mA, VSTBY = 3.0V to 5.5V -1.0 1.0 VDROPOUT Dropout Voltage IDDQ = 250mA, each channel 250 450 mV ISTBY LIM Overload Current Limit 400 mA ISTBY SC Short Circuit Current Limit VDDQ < 1V 170 mA Note 1: All parameters specified at TA = 0°C to +70°C unless otherwise noted.

© 2004 California Micro Devices Corp. All rights reserved. CM3131 Specifications (cont’d) ELECTRICAL OPERATING CHARACTERISTICS (Cont’d) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS All Regulators ICCN Normal Mode VCC Supply Current Normal mode (S0-S2) (VDDQ1,2=VDDQ ,VTT=VDDQ/2) µA ISTBYN Normal Mode VSTBY Supply Current Normal mode (S0-S2) (VDDQ1,2=VDDQ ,VTT=VDDQ/2) 1650 2450 µA ISTBYS Standby Mode VSTBY Supply Current Standby mode (S3) (VDDQ1,2=VDDQSTBY ,VTT=0) 550 850 µA ISTBYQ Shutdown Mode Quiescent Current Shutdown mode (S4-S5) (VDDQ1,2=0 ,VTT=0) 120 µA

© 2004 California Micro Devices Corp. All rights reserved. CM3131 Mechanical Details 8-lead PSOP Package Dimensions

© 2004 California Micro Devices Corp. All rights reserved. CM3131 Mechanical Details (cont’d) 14-lead PSOP Package Dimensions