MCM2801 MOTOROLA | Alldatasheet

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_ | mcmzeo1 | Advance Information 16x 16-BIT SERIAL ELECTRICALLY ERASABLE PROM (N-CHANNEL, SILICON GATE) The MCM2801 256-bi I Ih E PR 1616 BIT ling smo ammount af eta n aplictionsrequring both norvoitle memory ELECTRICALLY ERASABLE and in-system information updates, PROGRAMMABLE READ The MCM2801 offers in-system erase and reprogram capability. Ithas external ONLY MEMORY control of timing functions and serial format for data and address. The MCM2801 is fabricated in floating gate technology for high reliability and producibility © Single +5 V power supply © Organized as 16 words of 16 its © MPU Bus compatible « Single + 25 V power supply for erase and program # In-System program/erase capability Stal © 100,000 write/erase cycles hele PLASTIC PACKAGE BLOCK DIAGRAM [e@}_ Ss PIN ASSIGNMENT 6 NS seqd2spcrar aT) f i weds rzperae G}- L | sede pcrra = —— : “rigs sopeve ——- Sqo ope eS — 16 Bu Seng Pats Reg VssQ7 Shave a “LY “For normal aperation, these »nputs should fe | be harduwed 19 Vs OO Multiplexed Address? vous c Clock < ———_—. — PVC. Program Voltage Control — — as ICTR1. 2,3. Control a lee Biock frase FIGURE 1 - TYPICAL Vpp CONTROL Ss Chip Select (See AC CONDITIONS AND CHARACTERISTICS - NOTE 2) TY, 72. Test Pins vee - VPP 10K | vec \\ — {vss This device contains ccuitry to protect the inputs agamst damage due to high static eve voltages oF electic fields; however, its ad nan rc sed that normal precautions be taken to avoid appication of any voltage higher than maximum rated vohages to this high: Ws impedance cixcut. MOTOROLA MEMORY DATA

ABSOLUTE MAXIMUM RATINGS (1) Fain Om Temperature Under Bias °C Operating Temperature Range TA input or Output Vorages with Respect to Veg (excep PVC) _ 78% 05 Vep Supply Voltage with Respect 1o Ves OO F210 08 | RECOMMENDED DC OPERATING CONDITIONS Fut! operating voltage any temperature range unless otherwse noted ' Parameter ‘Sembol | Min Nom | Max | Unk Supply Voltage ee vep | 20 | 260 v input High Vorage To oe et ee Tapur Low Vollage os ee v OPERATING DC CHARACTERISTICS Crerocrene Symbol [in Tap [ax | Unis] Vor Supsiy Caren a a Oa Output Low Vatoge Pig =t0ma | vo = [fos PVC Carrent (Write or Word Erase) __ Fvcon | 0 | - | - | 2A] BUC Leotage a Pucore [— [| 8 [oA] FIGURE 2 — OUTPUT LOAD vce CAPACITANCE (t= 1.0 MHz, Ta= 25°C. Vec= #5 V. Bk? [characterise Sybot [Tye Tax [ona W Tapa CapacTonce a= 0 Pca | feat er | so oF [Guiou Copacrancs NoyoW toy | 2 Per | neneg ae Y MOTOROLA MEMORY DATA

AC OPERATING CONDITIONS AND CHARACTERISTICS Input Rae on Fa Tames Yon OupurLgad SeoFowe? a a BD [ane te ire [cock nigh meneame tee Pe | [CiocktowleeHodtme tcc Ps [ eccrFar ime er co | [ow Sees seup ce STO [at Our Gey cr [Bites saw [ota Seep re [cre Song Te ee A CT A [Coxon toe sometime er PS] [cap Sse ro Opa Reng Pant | [oss ot tae tom Gop Sects PT] TIMING DIAGRAMS

3 Chup Select

‘SUCH eS Via ter tsiax ADVCL- se cet He’ | rer, cree MZ Sea kane ' ie aoe ‘ tow tow. tAVCL cu res Aqaoo, KX] Address Bir 0 Address Bit 1 Address Bit 2 an} MOTOROLA MEMORY DATA

y ] 3 ' | 6 5 5 2 5 4 a] g]2 j — z| 6 ]¢3 _ st j [| | x : T | S x 5 ii 8 goo 8

3 Eo F

< x i} Cf 3 & S Fa ° 3 = \\ Fs Z —Ps | 2 z z 3 r \\ é 8 a z | 's 2 e@ 8 gge 3} Fs Fi B55 $ F} a MOTOROLA MEMORY DATA

: a ook c / \\ / . tech TRI, CTR2, WORD ERASE WATE ins eo ia tox tux: tewven NOTE One clock pulse 1s sutficina to load 8 new control code FUNCTIONAL DESCRIPTION The memory stores sixteen words, each of sixteen bits. Ail Pin Description functions are selected by a 3 bit parallel controi code. The The active high clock signal (C) is used for shifting ad- Clock line is used to strobe these codes and to serially shift dresses and data into or out of the chip. It is also used for data and addresses strobing control codes. The I/O pin {ADQ) is used for entering addresses and Read-Out data in. It isin the output state only for shifting output data. 1. The 4-bit serial address is stifted on the ADO line The active low Chip Select pin (S) is only used to block while the SERIAL ADDRESS.IN code is applied on the the clock and put the ADQ buffer into the high-impedance three contro! pins mode. It has no influence on the operating status of the 2. The READ instruction: 6 strobed with one clock pulse device and does not force a standby condition. This reads the word from the new address in the The programming voltage control pin (PVC! is an open- memory array and parallel loads" into the data drain output that is active when a WORD ERASE or WRITE register contral code is strobed in. As shown in Figure 1, it can be 3. While the SERIAL DATA-QUT code 1s being applied, used to control the Vpp supply applied to the circuit. The data is shifted out on the ADQ pin with 16 clock BLOCK ERASE {BE} pin can be used to clear the whole ar- pulses. In this mode, the ADQ pin output buffer is ac. ray. As the PVC output is not active in this state, the pro- we. gramming voltage should be directly applied to the Vpp pin for the specitied erase time. Writing The Test inputs (TEST1) and TEST2) are provided for 1. The address ss changed, if necessary, in the same testing purpose only and should be connected to Vgg in any manner as in the readout application. 2. While the SERIAL DATAIN code is being avpled. - data 1s shifted in on the ADG pin with 16 clock pulses Data Protection If the data to be wnitten has already been shifted into, When Vpp is tured off, data stored in the array is pro- the data register, it 18 not necessary to re-enter the 16 tected. The programming voltage shou'd not be applied 10 bits, so this step may be omitted the Vpp pin it VCC 15 not present. Therefore, use of the PVC 3. The WORD ERASE code is strobed in with one clock conttol output, which is controlled by the VCC supply is pulse. After the specified ERASE time. the addressed recommended. Using this feature, Vpp and VCC can be word 1s erased turned on oF off in any sequence without disturbing data 10 4. The WRITE code is strobed in with one clock pulse the array. However, to avoid spunous control codes beng After the specified WRITE time, 2 STANDBY code strobed into the device, all inputs should be stable when Vpp ‘can be strobed in to stop writing. Data will be pro: is on. grammed at the specitied address. Its also possible to change the sequence by erasing 2 General Comments memory location before starting 4 wnte sequence The erased state corresponds to 2 logical zero at the ADO output Standby WRITE (Jor any address) must be preceded by an ERASE Ercher of the two STANDBY codes, when strcbed in with at the same address. aclock pulse, puts the memory in a. quiescent state. The out Vpp is necessary for WRITE, WORD ERASE or BLOCK put is then in the high impedance state and the absence or ERASE. In all other cases, st can be switched to high im- presence of the clock wall not affect the device pedance, Vc or VSS Deer MOTOROLA MEMORY DATA