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Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 6
Technical content
Features
- Includes ESD Protection, Level−Shifting, Buffering and Sync Impedance Matching
- 7 Channels of ESD Protection for all VGA Port Connector Pins Meeting IEC−61000−4−2 Level 4 ESD Requirements (±8 kV Contact Discharge)
- Very Low Loading Capacitance from ESD Protection Diodes on VIDEO Lines (4 pF Maximum)
- 5 V Drivers for HSYNC and VSYNC Lines
- Integrated Impedance Matching Resistors on Sync Lines
- Bi−directional Level Shifting N−Channel FETs Provided for DDC_CLK & DDC_DATA Channels
- Backdrive Protection on DDC Lines
- Compact 16−Lead QSOP Package
- These Devices are Pb−Free and are RoHS Compliant
Applications
- VGA and DVI−I Ports in: ♦ Desktop and Notebook PCs ♦ Graphics Cards ♦ Set Top Boxes MARKING DIAGRAM Device Package Shipping †
ORDERING INFORMATION
http://onsemi.com CM2009−00QR QSOP −16 (Pb−Free) 2500/Tape & Reel QSOP16 QR SUFFIX CASE 492 †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. CM2009 0xQR = Specific Device Code YY = Year WW = Work Week CMD YYWW CM2009 0xQR QSOP−16 (Pb−Free) CM2009−02QR 2500/Tape & Reel
16 Pin QSOP
Table 1. PIN DESCRIPTIONS 2 VCC_VIDEO This is a supply pin specifically for the VIDEO_1, VIDEO_2 and VIDEO_3 ESD protection circuits. controller device and the video connector. controller device and the video connector. controller device and the video connector. 6 GND Ground reference supply pin. 7 VCC_DDC This is an isolated supply input for the DDC_1 and DDC_2 level−shifting N−FET gates. increased ESD withstand voltage rating for these circuits (±8 kV with vs. ±4 kV without). 9 DDC_OUT1 DDC signal output. Connects to the video connector side of one of the sync lines. 10 DDC_IN1 DDC signal input. Connects to the VGA controller side of one of the sync lines.
11 DDC_IN2 DDC signal input. Connects to the VGA controller side of one of the sync lines. 12 DDC_OUT2 DDC signal output. Connects to the video connector side of one of the sync lines. 13 SYNC_IN1 Sync signal buffer input. Connects to the VGA controller side of one of the sync lines. 14 SYNC_OUT1 Sync signal buffer output. Connects to the video connector side of one of the sync lines. 15 SYNC_IN2 Sync signal buffer input. Connects to the VGA controller side of one of the sync lines. 16 SYNC_OUT2 Sync signal buffer output. Connects to the video connector side of one of the sync lines. Table 2. ABSOLUTE MAXIMUM RATINGS
Table 3. ELECTRICAL OPERATING CHARACTERISTICS (Note 1)
- All parameters specified over standard operating conditions unless otherwise noted.
- These parameters apply only to the SYNC drivers. Note that R OUT = RT + RBUFFER.
- Per the IEC −61000−4−2 International ESD Standard, Level 4 contact discharge method. BYP, VCC_VIDEO and VCC_SYNC must be bypassed
Human Body Model (MIL−STD−883, Method 3015). The bypass capacitor at the BYP pin may optionally be omitted, in which case the max. ESD withstand voltage for the DDC_OUT1 and DDC_OUT2 pins is reduced to ±4 kV.
- The SYNC_OUT pins on the CM2009 −02 are guaranteed for 2 kV HBM ESD protection.
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APPLICATION INFORMATION
Figure 1. Typical Application Connection Diagram
- The CM2009 should be placed as close to the VGA or DVI−I connector as possible.
- The ESD protection channels VIDEO_1, VIDEO_2, VIDEO_3 may be used interchangeably between the R, G, B
- If differential video signal routing is used, the RED, BLUE, and GREEN signal lines should be terminated with
external 37.5 /C0087 resistors.
- “VF” are external video filters for the RGB signals.
- Supply bypass capacitors C1 and C2 must be placed immediately adjacent to the corresponding Vcc pins.
5 mm) for best ESD protection.
- The bypass capacitor for the BYP pin has been omitted in this diagram. This results in a reduction in the maximum
ceramic bypass capacitor should be connected between BYP and ground.
- The SYNC buffers may be used interchangeably between HSYNC and VSYNC.
- The EMI filters at the SYNC_OUT and DDC_OUT pins (C5 to C12, and Ferrite Beads FB1 to FB4) are for reference
only. The component values and filter configuration may be changed to suit the application.
- The DDC level shifters DDC_IN, DDC_OUT, may be used interchangeably between DDCA_CLK and
- R1, R2 are optional. They may be used, if required, to pull the DDC_CLK and DDC_DATA lines to VCC_5V when
DDC pins and VCC_5V via these resistors when VCC_5V is powered down.
- For optimal ESD performance with the CM2009−02, an additional clamp device (such as the CMD PACDN042)
should be placed on HSYNC/VSYNC lines between the external matching resistor and the VGA connector.
http://onsemi.com PACKAGE DIMENSIONS QSOP16 CASE 492 ISSUE A E M0.25 C C DETAIL A DETAIL A h x 45/C0095 DIM MAXMIN INCHES A 0.053 0.069 b 0.008 0.012 L 0.016 0.050 e 0.025 BSC h 0.009 0.020 c 0.007 0.010 A1 0.004 0.010 M 0 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. 4. DIMENSION D DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.005 PER SIDE. DIMENSION E1 DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.005 PER SIDE. D AND E1 ARE DETERMINED AT DATUM H. 5. DATUMS A AND B ARE DETERMINED AT DATUM H. /C0095/C0095 b L 6.40 16X 0.42 16X 1.12 0.635 DIMENSIONS: MILLIMETERS PITCH SOLDERING FOOTPRINT D D 16X SEATING PLANE 0.10 C A A-B D 0.20 C e 16 9 16X C M D 0.193 BSC E 0.237 BSC E1 0.154 BSC L2 0.010 BSC D
0.25 C D
B
0.20 C D
0.10 C H
C A2 0.049 ---- 1.35 1.75 0.20 0.30 0.40 1.27
0.635 BSC
0.22 0.50 0.19 0.25 0.10 0.25 0 8 /C0095/C0095
4.89 BSC
6.00 BSC
3.90 BSC
0.25 BSC
1.24 ---- MAXMIN MILLIMETERS A SEATING PLANE ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. CM2009/D PUBLICATION ORDERING INFORMATION N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5817−1050 LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative