CLP200M

CLP200M STMICROELECTRONICS | Alldatasheet

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CLP200M OVERVOLTAGE AND OVERCURRENT PROTECTION FOR TELECOM LINE Application Specific Discretes A.S.D. PowerSO-10 TM SCHEMATIC DIAGRAM MAIN APPLICATIONS Any telecom equipment submitted to transient overvoltagesand lightning strikes such as : Analog and ISDN line cards PABX Main Distribution Frames Primary protection modules

DESCRIPTION

TheCLP200M is designedto protect telecommuni- cation equipment.It providesboth a transient over- voltage protectionand an overcurrent protection. It is housed in a PowerSO-10 TM package.

FEATURES

DUAL BIDIRECTIONAL PROTECTION DEVICE. HIGH PEAK PULSE CURRENT : Ipp = 100A (10/1000µs SURGE) MAX. VOLTAGE AT SWITCHING-ON : 290V MIN. CURRENT AT SWITCHING-OFF : 150mA FAILURE STATUS OUTPUT PIN BENEFITS Both primary and secondary protection levels in one device. Voltage and current controlled suppression. SurfaceMounting with PowerSO-10 TM package. Line card cost reduction thanks to the very low power rating of external components required : balanced resistors, ring relay, low voltage SLIC protection. COMPLIESWITH THE FOLLOWING STANDARDS : CCITT K20 : 10 / 700µs 4kV 5 / 310µs 100 A BELLCORE TR-NWT-000974 10 / 1000µs 1kV 10 / 1000µs 100A NCFS TIPS RING S TIPL TIPL TIPL RING L RING L RING L TAB is connected to GND February 1998 Ed : 3 1/21

(+/- 215 V) Overvoltage detector Overcurrent detector OR Overvoltage reference (+/- 215 V) Overvoltage detector Overcurrent detector OR TIPL TIPS RINGL RINGS FS GND SW3 SW1 SW4 SW2 Pin Symbol Description

1 FS Failure Status

2 TIPS TIP (SLIC side)

3 / 4 / 5 TIPL TIP (Line side) 6 / 7 / 8 RINGL RING (Line side)

9 RINGS RING (SLIC side)

10 NC Not connected

Fig. 1 :Subscriber line protection topology ”PRIMARY PROTECTION” ”SECOND ARY PROTECTION” MDF LINE CARD telecommunication EXCHANGE line ”SECOND ARY PROTECTIO N” MDF LINE CARD telecommunication EXCHANGE line CLP200M SLIC THDTxx or LPC1511D or LB200B SLICCLP200M Fig. 2 :Line card protection -ISWON Programmable thanks to an external resistor Programmable thanks to any external voltage reference V I Line card operating conditions +I SWON APPLICATION NOTE 1. INTRODUCTION The aim of this section is to show the behavior of ournew telecomline protectiondevice. Thisdevice includes a primary protection level and is suitable for main distribution frames and line cards. This protection concept is explained and, in addition, the CLP200M performances are analysed when facing different surges as described in the CCITT recommendations. Figure 1 is a simplified block diagram of a sub- scriber line protectionthat is mainly used so far. This shows two different things : A ”primaryprotection”located on the Main Distri- butionFrame (MDF) eliminatescoarsely the high energy environmental disturbances (lightning transientsand AC power mains disturbances) A ”secondary protection” located on the line card includesa primaryprotectionlevel (first stage)and a residual protection (second stage) which elimi- natesfinely the remainingtransients thathavenot beentotally suppressedby the first stage. The CLP200M can be used both in MDFs and in line cards. In that case, any line card may be swapped from one MDF to another one withoutre- ducing the efficiency of the whole system protec- tion. The CCITT requirements are different for these two protection locations (MDFs and line cards). Concerning the ”primary protection”,the CCITT re- quires a 4kV, 10/700µs surge test whereas the ”secondary protection” has to withstand a 1kV, 10/700µs surge test. The explanations which follow are basically c o v e r i n gt h el i n ec a r da p p l i c a t i o n . 2. SGS-THOMSON CLP200M CONCEPT

2.1 Evolution of the SLIC protection

Over the years, the silicon protection per- formances have considerably changed. The first generation of products like SMTHBTxx and SMTHDTxx offered fixed overvoltage protec- tion against surges on either TIP or RING line in four packages. The following generation like THBTxx and THDTxx still offered fixed overvoltage protection against surges on both TIP and RING lines in two packages. The next step was the introduction of the LCP1511D which brought the advantage of full programmablevoltage. Today, the CLP200M combines the features of all the previous generations. In addition to that, it of- fers an overcurrent detection when operating in speech mode and also a Failure Status output sig- nal. The figure 2 summarizes the performance of the CLP200M which basically holds the SLIC inside its correct voltage and current values. CLP200M

APPLICATION CIRCUIT : CLP200M in line card Fig. 3 :CLP200M in line card RINGS -Vbat -Vbat Rp R sense TIP SLIC (*) (*) LCP1511D or THDT series Overvoltage reference (+/- 215V) Overvoltage detector Overcurrent detector OR Overvoltage reference (+/- 215V) Overvoltage detector Overcurrent detector OR TIPL TIPS RINGL FS GND SW3 SW1 SW4 SW2 R sense Rp Ring Generator Fuse Fuse TIP RING External voltage reference RING I Figure 3 above shows the topology of a protected analog subscriber line at the exchange side. The CLP200M is connected to the ring relay via two balanced Rp resistors, and to the Subscriber Line Interface Circuit. A second device is located near the SLIC : it can be either a LCP1511D or a THDT series. These two devices are complementary and their functionsare explained below : The first stage based on CLP200M manages the high power issued from the external surges. When used in ringing mode, the CLP200M operates in voltage mode and pro- vides a symmetrical and bidirectional overvoltage protection at +/-215 V on both TIP and RING lines. When used in speech mode, the CLP200M operates in current mode and the activation current of the CLP200M is ad- justed by R SENSE . The second stage is the external voltage refer- ence device which defines the firing threshold voltage during the speech mode and also as- sumes a residual power overvoltage suppression. This protection stage can be either a fixed or programmable breakover device. The THDTxx family acts as a fixed breakover device while the LCP1511D operates as a programma - ble protection. Thanks to this topology, the surge current in the line is reduced after the CLP200M. Because the remaining surge energyis low, the power ratings of Rp, the ring relay contacts and the externalvoltage referencecircuit may be downsized.This results in a significant cost reduction. CLP200M

2.3 Ringing mode

Fig. 4 :Switching by voltage during ringing mode. Rs e n s e Rp Overvoltage reference (+/- 215 V) Overvoltage detector Overcurrent detector OR TIPL TIPS FS SW3 SW1 Fuse TIP GND ILG VLG 1/2 CLP200M ILG VLG -215 +215 Fig. 5a :Method to adjust the reference voltage. RINGS R sense Rp Overvoltage reference (+/- 215 V) Overvoltage detector Overcurrent detector OR Overvoltage reference (+/- 215 V) Overvoltage detector Overcurrent detector OR TIPL TIPS RINGL FS GND SW3 SW1 SW4 SW2 R sense Rp Fuse Fuse TIP RING VZ1 VZ2 VZ3 VZ4 In ringing mode (Ring relay in position 2), the only protectiondevice involved is the CLP200M. In normal conditions, the CLP200M operatesin re- gion 1 ofA1 curve, and is idle. If an overvoltage occuring between TIP (or RING) and GND reaches the internal overvoltage refe- rence (+/- 215V), the CLP200Macts and the line is short-circuited to GND. At this time the operating point moves to region 2 for positive surges (region 3 for negativesurges). Once the surge current dis- appears, the device returns to its initial state (re- gion 1). For surges occuring between TIP and RING, the CLP200M acts in the same way. This means that the CLP200M ensures a tripolar protection. When used alone, the CLP200M acts at the inter- nal overvoltagereferencelevel (+/- 215V). Further- more, it is possible to adjust this threshold level to a lower voltage by using : .up to 4 fixed external voltage reference (VZ1 to VZ4) (see fig.5a). CLP200M

external reference supplies, Vb1 and Vb2 (see fig.5b).. Fig. 5b :Method to adjust the reference voltage. RINGS R sense Rp Overvoltage reference (+/- 215 V) Overvoltage detector Overcurrent detector OR Overvoltage reference (+/- 215 V) Overvoltage detector Overcurrent detector OR TIPL TIPS RINGL FS GND SW3 SW1 SW4 SW2 R sense Rp Fuse Fuse TIP RING VB1 VB2

2.4 Speechmode

Fig. 6 :Switching by current during speech mode. R sense Rp Overvoltage reference (+/- 215 V) Overvoltage detector Overcurrent detector OR TIPL TIPS FS SW3 SW1 Fuse TIP GND -Vbat External voltage reference ILG VLG ILG V LG VREF1 -VREF2 In speech mode (Ring relay in position 1), the pro- tection is provided by the combination of both CLP200M and the external voltage reference de- vice. In normal conditions, the working point of this cir- cuit is located in region 4 ofA2 curve : the CLP200M is idle. When a surge occurs on the line, the external volt- age reference device clamps at GND or -V bat re- spectively for positive and negative surges. This generates a current which is detected by R SENSE and causesthe protectionto act : theline is short-circuited to GND. The operating point moves to region 5 for positive surges or region 6 for negative surges. Once the surge current falls below the switching- off current ISWOFF , the CLP200M returns to its in- itial state (region 4). Furthermore, the CLP200M switches when an overvoltage, either positive or negative, occurs either : simultaneously on both TIP and RING lines ver- sus GND. between TIP and RING. on TIP (or RING) versus GND. CLP200M

Fig. 7a and 7b :Switching-on current versus R SENSE . Fig. 9 :Operationlimits and destructionzoneof the CLP200M. Fig. 8 :Failure Status circuit and diagnostic. 3 5 7 9 11 13 100 200 300 500 Rsense ( )Ω ISWON (mA) -20°C2 5 °C7 5 °C 35 7 9 1 1 100 200 300 500 Rsense ( )Ω Iswon @ 25°C (mA) Iswon min Iswon max Iswon min Iswon min negative negative positive positive CLP200M Rsense Rsense FAILURE +12V 1kSTATUS 0.01 0.1 1 1010 100 1000 t (ms) Ipp (A) The choice of the switching-on current is function of the RSENSE resistors. In normal operating condition, only the negative current of the signal is of interest.This current (typi- cally below -150 mA) should not activate the pro- tection device CLP200M. Therefore the level of activation is to be chosen just above this limit (typi- cally -200 mA). This level is adjusted through R SENSE . Figures 7a and 7b enable the designers to choose the right RSENSE value. EXAMPLE : The choice of RSENSE =4 Ω ensures a negative triggeringof -220 mA min and -320 mA max. In this case, the positive triggering will be 180mA min and 280 mA max. 2.5 . Failure Status The CLP200M has an internal feature that allows the user to get a Failure Status (FS) indication. When the CLP200M is short-circuiting the line to GND, a signal can be managedthrough pin 1. This signal can be used to turna LED on in order to pro- vide a surge indication. It may also be used with a logic circuitry to count the number of disturbances appearingon the lines. If a surge exceeding the maximum ratings of the CLP200M occurs on the line, the device will fail in a short-circuit state. The figure 9 shows two different curves : The lower one indicatesthe maximum guaranted working limits of the CLP200M. The upper curve shows the limit abovewhich the CLP200Mis completely destructed. In thiscase, the Fail Diagnostic pin is on. CLP200M

Fig. 10 :Transversal and longitudinal test topologies. Fig. 12 :Powercontact test circuit. Fig. 11 :Power induction test circuit. Ao rB Bo r A E 15 25 0.2µF5020µF 4kv ITEM UNDER TEST A B E 0.2µF5020µF ITEM UNDER TEST25 4kv TRANSVERSAL TEST LONGITUDINAL TEST A B ITEM UNDER TEST 1µF 1µ F E 100 A B <10 ITEM UNDER TEST<10 E 600 600 3. CLP200MTESTS RESULTS ACCORDING TO CCITT K20 RECOMMENDATIONS

3.1 CCITT K20 Recommendations

In respect with the CCITT recommendations, the CLP200M has to withstand three kinds of distur- bances. 3.1.1. Lightning simulation (Test 2, table 2/K20) This test shall be done in transversaland longitudi- nal modes as shown in figure 10. The test generator is the 10/700µs with 4kV of peak voltage. 3.1.2. Powerinduction (Test 3a and 3b, table 2/K20) Two kinds of tests using the same circuit topology (see fig.11) are defined in the CCITT K20. Test 3a : Vac(max) = 300V RMS , R1 = R2 = 600Ω S2 operating and test duration= 200 ms. Test 3b : Vac(max) = 300VRMS (*), R1 = R2 = 200Ω S2 operating and test durationnot defined. (*) Recommended value. 3.1.3. Power contact (Test 3, table 1/K20) This test shall be done with the test circuit of figure 12. Vac(max) = 220VRMS , with switch S in each posi- tion and duration 15 min. 3.1.4. Acceptance criteria and number of tests 3.1.3. two criteria are defined : A: Equipmentshall withstandthe test without dam- age and shall operate properly within the specified limits. B: A fire hazard should not occur in the equipment as a result of the tests. The criteria are affected to the different tests as mentioned in the table 1. CLP200M

2 A 10 for longitudinal A

3 B 1 for each position of s

Table 1 :Acceptancecriteria and number of tests. Fig. 13 :Lightning simulation test. 10/700µs GENERATOR +/- 4kV 4ΩI V Rsense Rp TIPL TIPS GND 1/2 CLP200M Fig. 14 :CLP200Mresponse to a positive surge. Fig. 15 :CLP200M response to a negative surge. Fig. 16 :Power inductance test. TEST V (RMS) R(Ω ) Duration 3a 300 600 0.2s 3b 300 200 ? 3.2. Ringing mode 3.2.1. Lightning simulationtest Lightningphenomenaare the most common surge causes. The purpose of this test is to check the ro- bustness of the CLP200M against these lightning strikes. Figures 14 and 15 show that the remaining over- voltage does not exceed +/- 260 V. The CLP200M switches on within 0.7µs and withstandsthe 100 A given by the CCITT K20 generator. Consequently,the CLP200Mtotally fulfills this test.

3.2.2 Power induction

(Test 3a and 3b table2/K20) Surges of long duration with medium voltage value are mainly produced by the proximity of a sub- scriber line with an AC mains line or equipment. The purpose of this test is to checkthe robustness of the CLP200M against these capacitive coupling disturbances. CLP200M

Fig. 17 :CLP200M response to the induction test (Test 3a). Fig. 18 :CLP200M reponse to the induction test (Test 3b). Fig. 19 :Power contact test. Fig. 20 :Power contact test 3 (With10Ω series). I V V(RMS) 50Hz 600 < 10ΩΩ 15min PTC Rsense Rp or TIPL TIPS GND 1/2 CLP200M Fig. 21:Lightning test in speech mode. 10/700µs GENERA TOR +/- 4kV TIPL TIPS GND 1/2 CLP200M I 50 I2 SLIC LCP1511D -48V V2 Rsense Rp Figures 17 and 18 showthat the remaining voltage does not exceed 270 V. Consequently,the CLP200Mtotally fulfills thistest. The test duration is not specified in test 3b. If the duration exceeds 5s we do suggest to follow the soldering and mounting recommendations given on page 17 of this document.

3.2.3 Power contact (Test 3 table 1/K20)

This long duration surge is produced when con- necting a subscriber line to an AC mains line or equipment.The purposeof thistest is to check the robustness of the CLP200M against these distur- bances. The test 3 of CCITT K20 requires a serial PTC (or fuse) which is inserted in the test circuit to limit the current rate. This PTC acts like an open-circuitin a non-instantaneous way when a surge occurs on the line. Meanwhile, the CLP200M has to with- stand the surge. Figure 20 shows that the remaining overvoltage does not exceed 250 V and shows that the PTC acts like an open-circuit after 60 ms. Consequently,the CLP200Mtotally fulfills this test. 3.3. Speech mode 3.3.1. Lightning simulation test (Test 2, table 2/K20) CLP200M

Fig. 22 :CLP200Mresponse to a positive surge. Fig. 23 :CLP200 M response to a negative surge. Fig. 24 :Power induction test. TIPL TIPS GND 1/2 CLP200M I 50 I2 SLIC LCP1511D -48V V2 Rsense Rp V(RMS) 50 Hz TEST V (RMS) R(Ω ) Duration 3a 300 600 0.2s 3b 300 200 ? Fig. 25 :Inductiontest behavior (Test 3a). Figures 22 and 23 give the voltage and currentbe- havior during positive and negative 4kV, 10/700µs, surge tests using a LCP1511D as second stage protection device. The firing threshold values are now adjusted to GND and to -Vbat (-48V) by the action of the second stage protectionwhich actsas an external voltage reference. As shown on these figures, the maximum remain- ing voltage does not exceed +2.5V for positive surges and -60V for negativesurges. Consequently,the CLP200Mtotally fulfills thistest.

3.3.2 Power induction test

(Test 3a and 3b, table 2/K20) Figures 25 and 26 show that the maximum remain- ing voltage does not exceed +2V for positive surges and -55V for negative surges. Consequently,the CLP200Mtotally fulfills this test. The test duration is not specified in test 3b. If the duration exceeds 5s we do suggest to follow the soldering and mounting recommendations given on page 17 of this document. CLP200M

Fig. 26 :Inductiontest behavior (Test 3b). Fig. 28 :Powercontacttest3 (with R≤ 10Ω series). Fig. 27 :Power contact test. TIPL TIPS GND 1/2 CLP200M I V V(RMS) 50Hz 600 or < 10 15min PTC Rsense Rp SLIC LCP1511D -48V V2 3.3.3 - Power contact test (Test 3 table 1/K20) The test 3 of CCITT K20 requires a serial PTC (or fuse) which is inserted in the test circuit to limit the current rate. This PTC acts like an open-circuit af- ter 60 ms when a surge occurs on the line. Mean- while, the CLP200Mhas to withstand the surge. The protection device CLP200M totally fulfills this test. CLP200M

Symbol Parameter Test Conditions Value Unit IPP Line to GND peak surge current 10/1000µs (open circuit voltage wave shape 10/1000µs) 100 A 5/310µs (open circuit voltage wave shape 10/700µs) 130 A ITSM Mains power induction current VRMS = 300V, R = 600Ω t = 200ms 0.5 A Mains power contact current VRMS = 220V, R = 10Ω (failure status threshold) t = 200 ms 22 A VRMS = 220V, R = 600Ω t = 15 mn 0.30 A Tstg Tj Storage temperature range Maximum junction temperature - 40 to + 150 150 TL Maximum lead temperature for soldering during 10 s 260 °C ABSOLUTE MAXIMUM RATINGS (RSENSE =4 Ω , and Tamb =2 5°C) Symbol Parameter Test Conditions Value UnitMin. Max. ILGL Line to GND leakage current .VLG = 200 V .Measured between TIP (or RING) and GND 10 µA Vref Overvoltage internal reference .ILG =1m A .Measured betweenTIP (or RING) and GND 215 V VSWON Line to GND voltage at SW1 or SW2switching-on .Measured at 50 Hz between TIPL (or RINGL) and GND 290 V ISWOFF Line to GND current at SW1 or SW2switching-off .Refer to test circuit page 14 150 mA ISWON Line current at SW1 or SW2 switching-on .Positive pulse .Negative pulse 180 220 280 320 mA C Line to GND capacitance .VLG =- 1V+1 VRMS .F = 1 MHz 200 pF ELECTRICAL CHARACTERISTICS (RSENSE =4 Ω , and Tamb =2 5°C) CLP200M

TEST CIRCUIT FOR ISWOFF PARAMETER : GO-NO GO TEST R -VP VBA T -4 8V= Surge generator D.U .T. This is a GO-NO GO test whichallows to confirm the switch-off (ISWOFF ) level in a functionaltest circuit. TEST PROCEDURE : - Adjust the current level at the ISWOFF value by short circuiting the D.U.T. - Firethe D.U.T. with a surge current : IPP = 10A, 10/1000µs. - The D.U.T. will come back to the OFF-state within a duration of 50ms max. 3 5 7 9 11 13 100 200 300 500 Rsense ( )Ω ISWON (mA) -20°C2 5 °C7 5 °C Fig. 29 :Typical variation of switching-on current (positive or negative) versus RSENSE resistor and junction temperature (see test condition Fig 31). 35 7 9 1 1 100 200 300 500 Rsense ( )Ω Iswon @ 25°C (mA) Iswon min Iswon max Iswon min Iswon min negative negative positive positive Fig. 30 :Variation of switching-on current versus R SENSE at 25°C. TIPL TIPS GND R sense RING L RING S DUT R R L 48 V Fig. 31 : ISWON MEASUREMENT - Iswon = I1 when the CLP200M switches on (I1 is progressively increased using R) - Both TIP and RING sides of the CLP200M are checked L =1 0 Ω . -40 -20 0 20 40 60 800.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 Tj (°C) ISWOFF [Tj°C] / ISWOFF [25°C] Fig. 32 :Relative variation of switching-off current versus junction temperature for RSENSE between3 and 10Ω . CLP200M

468 1 00.4 0.6 0.8 1.0 1.2 1.4 1.6 Rsense ( )Ω ISWOFF [Rsense] / ISWOFF [4Ω ] Fig. 33 :Relative variation of switching-off current versus RSENSE (between3 and 10Ω ). Fig. 34 :Residual current l1 after the CLP200M. The residual current l1 is defined by its peak value (IP) and its duration (τ)@I P/2 . Current surge input Residual current after the CLP200M waveform(µs) IPP (A) Peak current IP (A) waveform t(µs) 130A positive surge negative surge 4.2 1.1 0.5 TIPL TIPS GND R sense RINGL RINGS DUT R = 50 Ohms SURGE GENERATOR -48V 0.1 0.3 1 3 10 30 100 300 1000 0.98 1.00 1.02 1.04 1.06 1.08 1.10 1.12 dV/dt (V/µs) VSWON / REFV Fig. 35 :Relative variation of switching-on voltage versus dV/dt with an external resistor of 4Ω . -40 -20 0 20 40 60 0.85 0.90 0.95 1.00 1.05 1.10 Tj (°C) VREF [Tj°C] / V [25 °C]REF Fig. 36 :Relative variation of internal reference voltage versus junction temperature (ILG =1mA). CLP200M

(V) C (pF) V R Fig. 37 :Junction capacitance (TIPL/GND) versus applied voltage Fig. 38 :Typical and maximal capacitance between TIPL, RINGL and GND. V TIPL = - 48 V V RINGL # 0 V V GND= 0 V Capacitance between RINGL and GND Capacitance between TIPL and GND Capacitance between TIPL and RINGL Typ. 195 62 57 Max. 200 0.1 1 10 100 10000.1 100 ITSM (A) t (s) Fig. 39 :Maximum non repetitive surge RMS on state current versus overload duration (with 50Hz sinusoidal wave and initial junction temperature equal to 25°C) 100 200 300 t (ms) Ipp (A) Fig. 40 :Maximum peak pulse current versus surge duration CLP200M

Fig 1 :Typical reflow soldering heat profile Time (s) Temperature ( C) 0 40 80 120 160 200 240 280 320 360 100 150 200 250 o 215 Co Soldering Preheating Cooling 245 Co Epoxy FR4 board Metal-backed board SOLDERING RECOMMENDATION The soldering process causes considerable ther- mal stress to a semiconductor component. This has to be minimized to assure a reliable and ex- tended lifetime of the device. The PowerSO-10 TM package can be exposed to a maximum tempera- ture of 260°C for 10 seconds. However a proper soldering of the package could be done at 215°C for 3 seconds. Any solder temperature profile should be within these limits. As reflow techniques are most common in surface mounting, typical heating profiles are given in Figure 1,either for mounting on FR4 or on metal-backed boards. For each particular board, the appropriate heat profile has to be adjusted experimentally. The present proposalis just a starting point. In any case, the fol- lowing precautions have to be considered : - always preheat the device - peak temperatureshould be at least 30°C higherthan the melting point of the solder alloy chosen - thermal capacity of the base substrate Voids pose a difficult reliability problem for large surfacemount devices. Suchvoids under the pack- age result in poor thermal contact and the high thermal resistance leads to component failures. The PowerSO-10 is designed from scratch to be solely a surface mount package, hence symmetry in the x- and y-axis gives the package excellent weight balance. Moreover, the PowerSO-10 offers the unique possibility to control easily the flatness and quality of the soldering process. Both the top and the bottom soldered edges of the package are accessible for visual inspection (soldering menis- cus). Coplanarity between the substrate and the pack- age can be easily verified. The quality of the solder joints is very important for two reasons : (I) poor quality solder joints result directly in poor reliability and (II) solder thickness affects the thermal resis- tance significantly. Thus a tight control of this pa- rameter results in thermally efficient and reliable solder joints. CLP200M

Fig 2 :Mounting on epoxy FR4 head dissipation by extendingthe area of the copper layer Fig 3 :Mountingon epoxy FR4 by using copper-filled through holes for heat transfer FR4 boardCopper foil FR4 boardCopper foil heat transferheatsink SUBSTRATES AND MOUNTING INFORMATION The use of epoxy FR4 boards is quite common for surface mounting techniques, however, their poor thermal conduction compromises the otherwise outstandingthermal performanceof the PowerSO- 10. Some methods to overcome this limitation are discussed below. One possibility to improve the thermal conduction is the use of large heat spreader areas at the cop- per layer of the PC board. This leads to a reduction of thermal resistance to 35°C for 6 cm 2 of the board heatsink (see fig. 2). Use of copper-filledthrough holes on conventional FR4 techniqueswill increase the metallization and decrease thermal resistance accordingly. Using a configurationwith 16 holes under the spreaderof the package with a pitch of 1.8 mm and a diameter of 0.7 mm, the thermal resistance (junction - heatsink) can be reduced to 12°C/W (see fig. 3). Beside the thermal advantage,this solution allows multi-layer boards to be used. However, a draw- back of this traditional material prevent its use in very high power, high current circuits.For instance, it is not advisable to surface mount devices with currents greater than 10 A on FR4 boards. A PowerMosfet or Schottkydiode in a surface mount power package can handle up to around 50 A if better substrates are used. CLP200M

PowerSo-10package mounted on R th (j-a) P Diss (*) 1.FR4 using the recommended pad-layout 50 °C/W 1.5 W 2.FR4 with heatsink on board (6cm2)3 5 °C/W 2.0 W 3.FR4 with copper-filled through holes and external heatsink applied12 °C/W 5.8 W 4. IMS floating in air (40 cm2)8 °C/W 8.8 W 5. IMS with external heatsink applied 3.5 °C/W 20 W (*) Based on a delta T of 70°C junction train. TABLE 1 : THERMAL IMPEDANCE VERSUS SUBSTRATE A new technology available today is IMS - an Insu- lated Metallic Substrate. This offers greatly en- hanced thermal characteristics for surface mount components. IMS is a substrate consisting of threedifferent layers, (I)the base material which is available as an aluminium or a copper plate, (II) a thermal conductive dielectrical layer and (III) a copper foil, which can be etched as a circuit layer. Using this material a thermal resistance of 8°C/W with 40 cm 2 of board floating in air is achievable (see fig. 4). If even higher power is tobe dissipated an external heatsink could be applied which leads to an Rth(j-a) of 3.5°C/W (see Fig. 5), assuming that Rth (heatsink-air) is equal to Rth (junction- heatsink). This is commonly applied in practice, leading to reasonable heatsink dimensions. Often power devices are defined by considering the maximum junction temperature of the device. In practice , however, this is far from being exploited. A summary of various power management capa- bilities is made in table 1 based on a reasonable delta T of 70°C junction to air. Fig 4 :Mounting on metal backed board Fig 5 :Mounting on metal backed board with an external heatsink applied FR4 boardCopper foil Aluminium heatsink Copper foil Insulation Aluminium The PowerSO-10 concept also represents an at- tractive alternative to C.O.B. techniques. Pow- erSO-10 offers devices fully tested at low and high temperature. Mounting is simple - only conven- tional SMT is required- enablingthe usersto get rid of bond wire problems and the problem to control the high temperaturesoft soldering as well. An op- timized thermal management is guaranteed through PowerSO-10 as the power chips must in any case be mounted on heat spreaders before being mounted onto the substrate. CLP200M

H eB 0.25 M D h A F E3 E1 SEATING PLANE SEATING PLANE A B C Q DETAIL”A”

0.10 A B

L a DETAIL”A” REF. DIMENSIONS Millimeters Inches A 3.35 3.65 0.131 0.143 A1 0.00 0.10 0.00 0.0039 B 0.40 0.60 0.0157 0.0236 C 0.35 0.55 0.0137 0.0217 D 9.40 9.60 0.370 0.378 D1 7.40 7.60 0.291 0.299 E 9.30 9.50 0.366 0.374 E1 7.20 7.40 0.283 0.291 E2 7.20 7.60 0.283 0.299 REF. DIMENSIONS Millimeters Inches E3 6.10 6.35 0.240 0.250 E4 5.90 6.10 0.232 0.240 e 1.27 0.05 F 1.25 1.35 0. 0492 0.0531 H 13.80 14.40 0.543 0.567 h 0.50 0.019 L 1.20 1.80 0. 0472 0.0708 Q 1.70 0.067 a0 ° 8° 0° 8° Package Type Marking Power SO-10 TM CLP200M CLP200M MARKING CLP200M

DIMENSIONS (mm) TYP A B C Length tube 0,8 532 Quantity per tube 50 Dimensions in millimeters Dimensions in millimeters Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics.Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSONMicroelectronics products are not authorized for use as critical components in lifesupport devices or systems withoutexpress written approval of SGS-THOMSON Microelectronics.  1998 SGS-THOMSON Microelectronics - Printed in Italy - All rights reserved. SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea -Malaysia - Malta - Morocco The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. B C A ORDER CODE CLP 200 M -TR Current Limiting Protection Minimum operation voltage Package : PowerSO-10 TR = tape and reel = tube CLP200M