CLC034MA-NOPB TI | Alldatasheet

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37.5: Coaxial Cable 75: CLC034 Adaptive Cable Equalizer SDI SDO SDI AEC+ AEC- SDO CLI MUTE REF CD/MUTE BYPASS 4.7 PF 4.7 PF Outputs MUTE REF CD/MUTE BYPASS 1 PF CLI 75: 6.4 nH OBSOLETE CLC034 www.ti.com SNLS174E –FEBRUARY 2005–REVISED APRIL 2013 CLC034SMPTE292M/259MAdaptiveCableEqualizer Check forSamples: CLC034 1FEATURES DESCRIPTION The CLC034 SMPTE 292M / 259M adaptivecable 2• SMPTE 292M, SMPTE 344M and SMPTE 259M equalizeris a monolithicintegratedcircuitforCompliant equalizingdatatransmittedovercable(orany media• Supports DVB-ASI at270 Mbps with similardispersiveloss characteristics).The

  • High Data Rates:143 Mbps to1.485Gbps equalizeroperatesover a wide range of data rates from 143 Mbps to1.485Gbps and supportsSMPTE• Equalizesup to140 Meters ofBelden 1694A at 292M, SMPTE 344M and SMPTE 259M.1.485Gbps or up to350 Meters ofBelden 1694A at270 Mbps The CLC034 implementsDC restorationto correctly handle pathologicaldata conditions.DC restoration• Manual Bypass, Cable Length Indicator,and can be bypassed forlow data rateapplications.TheOutput Mute witha Programmable Threshold equalizerisflexibleinallowingeithersingle-endedor• Single-Endedor DifferentialInput differentialinputdrive.
  • 50Ω DifferentialOutputs Additionalfeaturesincludea combined carrierdetect• Single3.3VSupply Operation and outputmute pinwhichmutes theoutputwhen no
  • 208mW TypicalPower Consumption with3.3V signalispresent.A programmable mute referenceis used tomute theoutputata selectablelevelofsignalSupply degradation.A cablelengthindicatorisprovidedto• Replaces theGS1524 and GS1524A determinetheamount ofcablebeingequalized.

APPLICATIONS

  • SMPTE 292M, SMPTE 344M, and SMPTE 259M SerialDigitalInterfaces
  • SerialDigitalData Equalizationand Reception
  • Data Recovery Equalization TYPICAL APPLICATION Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsof Texas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2Alltrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2005–2013,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.

SNLS174E –FEBRUARY 2005–REVISED APRIL 2013 www.ti.com These deviceshave limitedbuilt-inESD protection.The leadsshouldbe shortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamage totheMOS gates. ABSOLUTE MAXIMUM RATINGS (1) SupplyVoltage −0.5Vto3.6V InputVoltage(allinputs) −0.3VtoVCC +0.3V StorageTemperatureRange −65°C to+150°C JunctionTemperature +150°C Lead Temperature(Soldering4 Sec) +260°C Package ThermalResistance θJA 16-pinSOIC +115°C/W θJC 16-pinSOIC +105°C/W ESD Rating(HBM) 8kV ESD Rating(MM) 250V (1) "AbsoluteMaximum Ratings"arethoseparametervaluesbeyond whichthelifeand operationofthedevicecannotbe guaranteed.The statinghereinofthesemaximums shallnotbe construedtoimplythatthedevicecan orshouldbe operatedatorbeyond thesevalues. The tableof"ElectricalCharacteristics"specifiesacceptabledeviceoperatingconditions. RECOMMENDED OPERATING CONDITIONS SupplyVoltage(VCC – VEE ) 3.3V±5% InputCouplingCapacitance 1.0µF AEC Capacitor(Connectedbetween AEC+ and AEC-) 1.0µF OperatingFreeAirTemperature(TA) 0°C to+85°C DC ELECTRICAL CHARACTERISTICs Over SupplyVoltageand OperatingTemperatureranges,unlessotherwisespecified(1)(2). Symbol Parameter Conditions Reference Min Typ Max Units VCMIN InputCommon Mode Voltage SDI,SDI 1.9 V VSDI InputVoltageSwing AtCLC034 input,1.485Gbps, TA= +25°C to+85°C, CD/MUTE may 720 800 880 mV P−P be used,(3)(4) AtCLC034 input,270 Mbps, TA= +25°C to+85°C, CD/MUTE may 720 800 830 mV P−P be used,(3)(4)(5) AtCLC034 input,143 to1485 Mbps, CD/MUTE tiedtoGND 720 800 950 mV P−P (MUTE disabled),(3)(4)(5) VCMOUT OutputCommon Mode Voltage SDO, SDO VCC – VVSDO /2 VSDO OutputVoltageSwing 50Ω load,differential 750 mV P-P CLI DC Voltage 0m cable CLI 2.5 V no signal 1.2 V MUTE REF DC Voltage(floating) MUTE REF 1.3 V MUTE REF Range 0.7 V (1) Currentflowintodevicepinsisdefinedas positive.Currentflowoutofdevicepinsisdefinedas negative.Allvoltagesarestated referencedtoVEE = 0 Volts. (2) TypicalvaluesarestatedforVCC = +3.3V and TA = +25°C. (3) Specificationisensuredby characterization. (4) The maximum inputvoltageswingassumes a nonstressing,DC-balancesignal;specifically,theSMPTE-recommended colorbartest signal.Pathologicalorotherstressingsignalsmay notbe used.Thisspecificationisfor0m cableonly. (5) The CLC034 isfullycompatiblewiththe800mV P-P ±10% SMPTE 259M generatorspecificationwhen CD/MUTE istiedtoGND (MUTE is disabled).For143 Mpbs input,CD/MUTE shouldalwaysbe tiedtoGND.

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www.ti.com SNLS174E –FEBRUARY 2005–REVISED APRIL 2013 DC ELECTRICAL CHARACTERISTICs (continued) Over SupplyVoltageand OperatingTemperatureranges,unlessotherwisespecified(1)(2). Symbol Parameter Conditions Reference Min Typ Max Units CD/MUTE OutputVoltage Carriernotpresent CD/MUTE 2.6 V Carrierpresent 0.4 V CD/MUTE InputVoltage Min tomute outputs 3.0 V Max toforceoutputsactive 2.0 V ICC SupplyCurrent See (6) 63 77 mA (6) Supplycurrentdepends on theamount ofcablebeingequalized.The currentishighestforshortcableand decreasesas thecable lengthisincreased.RefertoFigure2 and Figure3. AC ELECTRICAL CHARACTERISTICS Over SupplyVoltageand OperatingTemperatureranges,unlessotherwisespecified(1). Symbol Parameter Conditions Reference Min Typ Max Units BR SDI InputData Rate SDI,SDI 143 1485 Mbps Maximum EqualizedCable 270 Mbps, Belden1694A, 350 mLength(withequalizer 0.2UIoutputjitter,(2) pathological) 270 Mbps, Belden8281, 280 m0.2UIoutputjitter,(2) 1.485Gbps, Belden1694A, 140 m0.25UIoutputjitter,(2) 1.485Gbps, Belden8281, 100 m0.25UIoutputjitter,(2) tr,tf OutputRiseTime,FallTime 20% – 80%, (2) SDO, SDO 100 220 ps MismatchinRise/FallTime (2) 2 15 ps tOS OutputOvershoot (2) 1 5 % R OUT OutputResistance single-ended,(3) 50 Ω RL IN InputReturnLoss See (4) SDI,SDI 15 18-20 dB R IN InputResistance single-ended 1.3 kΩ C IN InputCapacitance single-ended,(3) 1 pF (1) TypicalvaluesarestatedforVCC = +3.3V and TA = +25°C. (2) Specificationisensuredby characterization. (3) Specificationisensuredby design. (4) Inputreturnlossisdependenton boarddesign.The CLC034 meets thisspecificationon theSD034 evaluationboardfrom5MHz to 1.5GHz. CONNECTION DIAGRAM Figure1. 16-PinSOIC See Package Number D0016A Copyright© 2005–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:CLC034

SNLS174E –FEBRUARY 2005–REVISED APRIL 2013 www.ti.com PIN DESCRIPTIONS Pin # Name Description 1 CLI Cablelengthindicator.Providesa voltageinverselyproportionaltothecablelengthbeingequalized. 2 VCC Positivepower supply(+3.3V). 3 VEE Negativepower supply(ground). 4 SDI Serialdatatrueinput. 5 SDI Serialdatacomplement input. 6 VEE Negativepower supply(ground). 7 AEC+ AEC loopfilterexternalcapacitor(1µF)positiveconnection. 8 AEC- AEC loopfilterexternalcapacitor(1µF)negativeconnection. 9 BYPASS Bypasses equalizationand DC restorationwhen high.No equalizationoccursinthismode. 10 MUTE REF Mute reference.Determinesthemaximum cabletobe equalizedbeforemuting.May be unconnected formaximum equalization. 11 VEE Negativepower supply(ground). 12 SDO Serialdatacomplement output. 13 SDO Serialdatatrueoutput. 14 VEE Negativepower supply(ground). 15 VCC Positivepower supply(+3.3V). 16 CD/MUTE Bi-directionalcarrierdetectand outputmute.CD/MUTE ishighwhen no signalispresent.If unconnected,MUTE iscontrolledautomaticallyby carrierdetect.To forceMUTE on,tietoVCC .To disableMUTE, tietoGND. CD/MUTE has no functioninBYPASS mode. BLOCK DIAGRAM

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www.ti.com SNLS174E –FEBRUARY 2005–REVISED APRIL 2013 DEVICE OPERATION BLOCK DESCRIPTION The EqualizerFilterblockisa multi-stageadaptivefilter.IfBypass ishigh,theequalizerfilterisdisabled. The DC Restoration/Level Controlblockreceivesthedifferentialsignalsfrom theequalizerfilterblock.This blockincorporatesa self-biasingDC restorationcircuitto fullyDC restorethe signals.IfBypass ishigh,this functionisdisabled. The signalsbeforeand afterthe DC Restoration/ LevelControlblockare used to generatethe Automatic EqualizationControl(AEC) signal.Thiscontrolsignalsetsthegainand bandwidthoftheequalizerfilter.The loopresponseintheAEC blockiscontrolledby an external1µF capacitorplacedacrosstheAEC+ and AEC- pins.Cable Length Indicator(CLI)isderivedfromthisblock. The CarrierDetect/Mute blockgeneratesthecarrierdetectsignaland controlsthemute functionoftheoutput. Thisblockutilizesthebi-directionalCD/MUTE signalalongwithMute Reference(MUTE REF ). The Output DriverproducesSDO and SDO. CABLE LENGTH INDICATOR (CLI) The cablelengthindicatorprovidesa voltagetoindicatethelengthofcablebeingequalized.The CLI voltage decreasesas thecablelengthincreases. MUTE REFERENCE (MUTE REF ) The mute referencedeterminestheamount ofcabletoequalizebeforeautomaticallymutingtheoutputs.Thisis set by applyinga voltageinverselyproportionalto the lengthof cableto equalize.As the appliedMUTE REF voltageisincreased,the amount of cablethatcan be equalizedbeforecarrierdetectisde-assertedand the outputsaremuted isdecreased.MUTE REF may be leftunconnectedformaximum equalizationbeforemuting. CARRIER DETECT /MUTE (CD/MUTE) CarrierDetect/Mute isbi-directional,servingas botha carrierdetect(outputfunction)and mute (inputfunction). When used as an output,CD/MUTE determinesifa validsignalispresentattheCLC034 input.IfMUTE REF is used,thecarrierdetectthresholdwillbe alteredaccordingly.CD/MUTE providesa highvoltagewhen no signalis presentattheCLC034 input,and theoutputsareautomaticallymuted.Thisistrueifno cableisconnectedtothe inputoriftheinputcableisverylong,typically450m Belden1694A for1.485Gbps inputor550m Belden1694A for270 Mbps input(withstandard800 mV P-P colorbarinputsignals).CD/MUTE islow when a validinputsignal has been detected,and theoutputsareautomaticallyenabled. As an input,CD/MUTE can be used to overridethe carrierdetectand manuallymute or enablethe CLC034 outputs.Applyinga highinputto CD/MUTE willmute the CLC034 outputs.Applyinga low inputwillforcethe outputstobe activeregardlessofthelengthofcableorthestateofMUTE REF . INPUT INTERFACING The CLC034 acceptseitherdifferentialor single-endedinput.The inputmust be AC coupled.Transformer couplingisnotsupported. The CLC034 correctlyhandlesequalizerpathologicalsignalsforstandarddefinitionand highdefinitionserial digitalvideo,as describedinSMPTE RP 178 and RP 198,respectively. OUTPUT INTERFACING The SDO and SDO outputsare internallyloadedwith50Ω.They producea 750 mV P-P differentialoutput,or a 375 mV P-P single-endedoutput. Copyright© 2005–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:CLC034

SUPPLY CURRENT (mA) BELDEN 1694A CABLE LENGTH (m) 0 200100 50 150 SUPPLY CURRENT (mA) BELDEN 1694A CABLE LENGTH (m) 0 400200 100 300 OBSOLETE CLC034 SNLS174E –FEBRUARY 2005–REVISED APRIL 2013 www.ti.com

APPLICATION INFORMATION

PCB LAYOUT RECOMMENDATIONS PleaserefertothefollowingApplicationNote on Texas Instruments'website:AN-1372, “CLC034 PCB Layout Techniques.” REPLACING THE GENNUM GS1524 The CLC034 isfootprintcompatiblewiththeGennum GS1524 and GS1524A. SUPPLY CURRENT VS. CABLE LENGTH The supplycurrent(ICC )depends on theamount ofcablebeingequalized.The currentishighestforshortcable and decreasesas thecablelengthisincreased.Figure2 shows supplycurrentvs.Belden1694A cablelengthfor 1.485Gbps dataand Figure3 shows supplycurrentvs.Belden1694A cablelengthfor270 Mbps data. Figure2.Supply Currentvs.Belden 1694A Cable Figure3.Supply Currentvs.Belden 1694A Cable Length,1.485Gbps Length,270 Mbps ADDITIONAL DETAILS FOR USING CARRIER DETECT /MUTE FEATURE Table 1 outlinesthe equalizerinputoperatingconditionsbased on zero meters of cablelength.Thisisnot a conditionnormallyseen in standardapplicationsof SDI equalizers.Typicallythereissome lengthof cable between thesignalsourceand theequalizer(hencetheneed forequalization).Any cablelengthwillattenuate (reduce)theSDI signalamplitudefromtheamplitudetransmittedatthesource.The tablespecifiesvoltagelevels measured attheinputoftheequalizerwhichisequivalenttoa zerometercablelengthfromthesignalsource. The outputwillmute ifthe SDI inputsignal(VSDI)exceeds the maximum inputvoltage(VSDI max). Disable CD/MUTE (tieittoGND) toavoidunwanted muting oftheoutput.

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www.ti.com SNLS174E –FEBRUARY 2005–REVISED APRIL 2013 Table1.VSDI ConditionsforProper CD/MUTE Use vs.InputData Rate InputData Rate ConditionsifCD/MUTE Used ConditionsifCD/MUTE Disabled(CD/MUTE Tiedto (Mbps) GND) 143,177 Do notuse CD/MUTE (tieittoGND) 270,360,540 AcceptableVSDI:720 to830 mV P-P(1) AcceptableVSDI:720 to950 mV P-P(allinputdatarates)

1485 AcceptableVSDI:720 to880 mV P-P

(1) For270 Mbps inputdatarates,theCLC034 's maximum acceptableVSDI isonly0.5dB belowtheSMPTE 259M specified880 mV P-P amplitudeforzerometerscable.A 10m lengthofBelden8281 cableattenuatesthesignalenough forSMPTE 259M compliance. Copyright© 2005–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:CLC034

SNLS174E –FEBRUARY 2005–REVISED APRIL 2013 www.ti.com

REVISION HISTORY

Changes from RevisionD (April2013)toRevisionE Page

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