CH7210C CHRONTEL | Alldatasheet
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209-1000-155 Rev 1.0 2020-7-9 1 Chrontel CH7210C DisplayPort to HDMI 2.0 Converter on USB Type C FEATURES GENERAL DESCRIPTION Compliant with DisplayPort Alternate Mode on USB Type C standard Compliant with DisplayPort Specification version 1.3 and Embedded DisplayPort (eDP) Specification version 1.4 Support 2 Main Link Lanes at 1.62Gbps,2.7Gbps (HBR) or 5.4Gbps (HBR2) link rate Automotive DP input signal detection and Lane swap supported for compliance with the USB type C cable plug orientation switch DP_BR signaling modes supported DisplayPort receiver auto equalization supported for the compensation of input signal attenuation Support Spread Spectrum Clocking (de-spreading) for EMI reduction Fast and full Link Training for embedded DisplayPort system Support eDP Authentication: Alternative Scramble Seed Reset and Alternative Framing USB Power Delivery control module supported with HPD to PD converter integrated HDMI transmitter compliant with HDMI specification version 2.0 and DVI specification version 1.0 HDMI transmitter supports up to 3.0Gbps data rate for video timing of 4Kx2K@30Hz, or 4K2K@60Hz on YCC 4:2:0 mode HDMI 3D dual view and 3D audio are supported High-Dynamic-Range (HDR) display are supported YCC 4:4:4/4:2:2 to YCC 4:2:2/4:2:0,Y-only(Gray display) conversion are supported HDCP engine compliant with HDCP 2.2 specification with internal HDCP Keys HDCP 2.2 repeater supported Active DDC buffer and related control register integrated IIC-over-AUX transaction supported Programmable equalizer Programmable Pre-Emphasis on output driver supported On-chip Audio Decoder which support 8 channel Audio input from DP Rx and output from HDMI Tx with sample rate up to 192KHz Support 2 USB Type-C ports that are compliant with USB Type-C Cable and Connector Specification revision 1.3. Compliant with USB Power Delivery Specification Revision 3.0, Version 1.1, with USB Power Delivery BMC transceiver integrated on each USB Type-C port Integrated Ra, Rd and Rp for USB Type-C Embedded MCU to handle the control logic USB billboard module integrated USB 2.0 PHY supported Embedded EEPROM, integrated EDID Buffer IIC Slave and USB 2.0 port are available for firmware Chrontel’s CH7210C is a low -cost, low -power semiconductor device that translates the DisplayPort signal to HDMI/DVI through the USB Type -C connector. This innovative USB Type -C based DisplayPort receiver with an integrated HDMI Transmitter is specially designed to target the USB Type -C to HDMI converter, adopter and docking device. Through the CH7210C’s advanced decoding / encoding algorithm, the input DisplayPort high-speed serialized multimedia data can be seamlessly converted to HDMI/DVI output. The CH7210C’s DP/eDP receiver is compliant with the DisplayPort Specification 1.3 and Embedded DisplayPort (eDP) Specification version 1. 4. With sophisticated DisplayPort signal detection and the Lane Swap/AUX polarity inversion logic, the CH7210C supports USB Type-C cable plug orientation switch. With internal HDCP key Integrated, the device support HDCP 2.2 specifications. In the device’s receiver block, which supports four DisplayPort Main Link Lanes input with data rate running at 1.62Gbps, 2.7Gbps or 5.4Gbps, and converted the input signal to HDMI output up to 4Kx2k@30Hz. Leveraging the USB Power Delivery control logic, the USB billboard module for USB device indentify and DisplayPort’s unique source/sink “Link Training” routine, the CH7210C is capable of instantly bring up the video display to the HDMI/DVI TV/ Monitor when the initialization process is completed. The CH7210C also supports up to 8 -channel audio input from either DP Rx and output from HDMI Tx with sample rate up to 192 KHz. Available audio bandwidth depends on the pixel clock frequency, the video format timing, and whether or not content protection re - synchronization is needed. With sophisticated MCU and the embedded EEPROM , CH7210C support auto-boot and EDID buffer. Leveraging the firmware auto -loaded from the EEPROM embedded, CH7210C can suppor t DP input detection, HDMI connection detection, and determine to enter into Power saving mode automatically.
2 209-1000-155 Rev 1.0 2020-7-9 update. Support Auto Power Saving mode and low stand-by current Anti-back drive support Low power architecture RoHS compliant and Halogen free package HBM 2KV ESD performance Offered in 48 pin QFN package (7 X 7 mm) APPLICATION USB Type C to HDMI 2.0 cable/Adapter/Docking Station On-board DP to HDMI 2.0 application Handheld/Portable Device
209-1000-155 Rev 1.0 2020-7-9 3 TMDS HPD_IN AUX CC1_A DisplayPort Main Link 2 x 5.4G CDR USB Billboard MCU Serializer USB 2.0 PHY GPIOs Ref Clock Generator Equalizer CSC Repackage Encoder HDCP encryption Pre- Emphasi s Active DDC Buffer DDCDPCD / DDC Register AUX Controller Input detection Lane Swap HDP to PD ConverterUSB Power Delivery Control D +/- RAM USB Plug Orientation Switch IIC Slave SPC/SPD IIC Over AUX Transaction HPD_Out CC0/1_B Embedded EEPROM Figure 1: CH7210C Functional Block Diagram
4 209-1000-155 Rev 1.0 2020-7-9 CH7210CCC_A D +/- DP Lane SBU / AUX TMDS DDC VBUS DCDC / FET HPD GPIO Power Charge USB Type C DP ALT Mode DFP HDMI Rx Divider Enable Circuit USB Type C Plug CC_B Power Adapter Figure 2: CH7210C USB Type-C to HDMI Dongle Application Block Diagram
209-1000-155 Rev 1.0 2020-7-9 5
1.0 PIN-OUT
1.1 Package Diagram
HPD_DP/GPIO6 VDDS DVDD RB AUXN AUXP VDDPLL XO XI/CK_27M AVCC DGND AVDDPLL RBIAS/ATPG DVDD DGND TXC TX1B TX0B TX2 TX2B TX1 TX0 AVCC TXCB D0P D0N D1P D1N AVDD HPD_HM SPC0 SPD0 GPIO0 GPIO1 DDC_SCL/SC_EEPROM DDC_SDA/SD_EEPROM GPIO2 GPIO3 VDDS USB0_DP USB0_DN AVCC AVCC GPIO4/CC1_B GPIO5/CC0_BVBUS_DET Ra CC1_A Figure 3: CH7210C 48-Pin QFN Pin Out
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1.2 Pin Description
Table 1: 48 QFN Pin Name Descriptions Pin # Type Symbol Description
1 In XI Crystal Input / External Reference Input
A parallel resonance crystal should be attached between this pin and XO. An external 3.3V CMOS compatible clock also can drive the XI Input
2 Out XO Crystal Output
A parallel resonance crystal should be attached between this pin and XI / FIN. However, if an external CMOS clock is attached to XI/FIN, XO should be left open 3,4 In/Out USB0_DN/ USB0_DP D+/- Input of USB Type C Interface
5 In VBUS_DET USB VBUS Voltage Detection
Voltage input 0 ~ 5V
8 In RB Reset* Input (Internal pull-up)
When this pin is low, the device is held in the power -on reset condition. When this pin is high, reset is controlled through the serial port register. 9~12 In/Out GPIO[3:0] General Purpose Input/Output Interface 14,15 Out TXCB/ TXC HDMI Clock Outputs These pins provide the differential clock output for the HDMI 17, 18 Out TX0B/ TX0 HDMI Data Channel 0 Outputs These pins provide the TMDS differential outputs for data channel 0 20, 21 Out TX1B/ TX1 HDMI Data Channel 1 Outputs These pins provide the TMDS differential outputs for data channel 1 23, 24 Out TX2B/ TX2 HDMI Data Channel 2 Outputs These pins provide the TMDS differential outputs for data channel 2
25 In Ra Ra Resistor
When used in typeC accessory mode, this pin needs connect to CC0.
26 In/Out CC1_A Port A USB Type-C Configure Channel 1
30 In/Out SPD0 Serial Port Data Input / Output
This pin functions as the bi -directional data pin of the serial p ort. External pull-up 6.8 K resister is required
31 In SPC0 Serial Port Clock Input
This pin functions as the clock pin of the serial port. External pull -up
6.8 K resister is required
32 In/Out CC0_B Port B USB Type-C Configure Channel 0
In/Out GPIO5 Port B General Purpose Input/Output
33 In/Out CC1_B USB Type-C Configure Channel 1
In/Out GPIO4 General Purpose Input/Output
34 In HPD_HM HDMI Tx HPD Input
35 Out HPD_DP DP Rx HPD Output
In/Out GPIO6 General Purpose Input/Output
36 In DDC_SDA Serial Port Data to HDMI Receiver
The pin should be connected to data signal of HDMI DDC. This pin requires a pull-up 1.8 kΩ resistor to the desired voltage level In/Out SD_EEPROM Connect to External EEPROM I2C Port Data The EEPROM is optional depending on FW size
37 Out DDC_SCL Serial Port Clock Output to HDMI Receiver
The pin should be connected to clock signal of HDMI DDC. This pin
209-1000-155 Rev 1.0 2020-7-9 7 requires a pull-up 1.8kΩ resistor to the desired voltage level Out SC_EEPROM Connect to External EEPROM I2C Port Clock 38, 39 In/Out AUXN/AUXP AUX Channel Differential Input/Output These two pins are DisplayPort AUX Channel control, which supports a half-duplex, bi-directional AC-coupled differential signal.
40 In RBIAS HDMI Swing Control
This pin sets the swing level of the HDMI outputs. A 1K-ohm with 1% tolerance resistor should be connected between this pin and ground using short and wide traces. 42, 43 In D0P/ D0N DP Main Link Differential Lane 0 Input These pins accept four AC-coupled differential pair signals from the DisplayPort transmitter. 45, 46 In D1P/ D1N DP Main Link Differential Lane 1 Input These pins accept four AC-coupled differential pair signals from the DisplayPort transmitter. 19,27,41 ,48 Power AVCC Analog Power Supply(3.3V) 6,28 Power DVDD Digital Core/IO Power Supply (1.2V) 7,29 Power DGND Digital Ground 13 Power AVDDPLL PLL Power Supply (1.2V) 16,22 Power VDDS Serializer Power Supply (1.2V) 44 Power AVDD Analog Power Supply (1.2V) 47 Power VDDPLL PLL Power Supply (1.2V)
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2.0 PACKAGE DIMENSION
Figure 4: 48 Pin QFN Package Table of Dimensions No. of Leads SYMBOL 48 (7 X 7 mm) A B C D E F G H I J Milli- meters Notes: 1. Conforms to JEDEC standard JESD-30 MO-220.
209-1000-155 Rev 1.0 2020-7-9 9 Disclaimer This document provides technical informati on for the user. Chrontel reserves the right to make changes at any time without notice to improve and supply the best possible product and is not responsible and does not assume any liability for misapplication or use outside the limits specified in this document. CHRONTEL warrants each part to be free from defects in material and workmanship for a period of one (1) year from date of shipment. Chrontel assumes no liability for errors contained within this document . The customer should make sure that th ey have the most recent data sheet version. Customers should take appropriate action to ensure their use of the products does not infringe upon any patents. Chrontel, Inc. respects valid patent rights of third parties and does not infringe upon or assist others to infringe upon such rights. Chrontel PRODUCTS ARE NOT AUTHORIZED FOR AND SHOULD NOT BE USED WITHIN LIFE SUPPORT SYSTEMS OR NUCLEAR FACILITY APPLICATIONS WITHOUT THE SPECIFIC WRITTEN CONSENT OF Chrontel. Life support systems are those intended t o support or sustain life and whose failure to perform when used as directed can reasonably expect to result in personal injury or death.
ORDERING INFORMATION
Part Number Package Type Operating Temperature Range Minimum Order Quantity CH7210C-BF 48 QFN, Lead-free Commercial : 0 to 70C 260/Tray Chrontel www.chrontel.com E-mail: sales@chrontel.com 2020 Chrontel - All Rights Reserved.