CEM2005 CET | Alldatasheet
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Dual Enhancement Mode Field Effect Transistor(N and P Channel) is | FEATURES © 20V,5A, Rosionj=32m Q @Ves=4.5V. Ros(on=43m Q @Ves=2.5V. mI pt pe pe -20V ,-4A,, Rosion=95m Q @Ves=-4.5V. Rosionj=125m Q @Ves=-2.5V. CA i Super high dense cell design for extremely low Rosion). ces in) ¢ High power and current handing capability. i= i= Surface Mount Package. Li Q Si Gi S2 Ga SO-8 ABSOLUTE MAXIMUM RATINGS (Ta=25°C unless otherwise noted) Symbol |e Drain Current-Continuous* @Ts=125°C | o [os | wf] oa | D -Pulsed a Operating Junction and Storage Tu, Tst¢ 55 to 150 °¢ Temperature Range THERMAL CHARACTERISTICS 5-210
N-Channel ELECTRICAL CHARACTERISTICS (TA 25°C unless otherwise noted) [Paneer |sybot] conn [in [yo unit OFF CHARACTERISTICS 5 | Drain-Source Breakdown Voltage Ves=0V, ID=250uA lat | fv] Zero Gate Voltage Drain Current Vos=20V, Ves=0V ; | fa fa] Gate-Body Leakage Ves =+8V, Vos=0V | ff st00 | na | ON CHARACTERISTICS? Gate Threshold Voltage Vos=Ves, lo= 250uA Drain-Source On-State Resistance Ros(on) Nes=A.V, n= 5.04 || 613 ves=26v,=428 | | 90 | 43 | ma On-State Drain Current Vos= 5V, Ves= 4.5V lo} | fal Forward Transconductance Vos = 10V, lp =5.0A }7 ful fs | DYNAMIC CHARACTERISTICS” Input Capacitance | | 1128 | 1500 - Vos =8V, Ves= 0V Output Capacitance f=1,0MHz | | 480 | exo | oF | Reverse Transfer Capacitance | [119 | 160 | oF | SWITCHING CHARACTERISTICS” Turn-On Delay Time Voo = 10V, | [29 | 60 | as | Vanes, Lf & | 140 [ os | Turn-Off Delay Time A= 100 | | 60 | 140 | os | Fl Tine ia || | 60 | os | Total Gate Charge | | | [a | w | oc | [GaleSuceCrage | eats | | Gate-Source Charge | Os_| Ves =4.5V | [sl | nc Gate-Drain Charge | ax | | fal fac] 5-211
P-Channel ELECTRICAL CHARACTERISHCS (TA 25°C unless otherwise noted) [Parameter |ymboi] contin [in Ty ax nit EM comers Densaebeacom ieee [avis | Vesavnaama Tale. [Vv asocaevedanGet [tos [ vsstouven | [| a [a cseioyeaee [os [| vsmanisa [| [tml nt caeTremiieine [sw | vostesb=aon [ae] [ [V petamaite [ron Sear | fetal ee Ce macTancrocane | os | Woevevne2aa [4 [ | [s | [oeo] ol | PTs [ool wm | fe] [a Bae iee AE faim P[[ to fuassecone | a | P [e[w fre) femme fe| br Cat te eseoancape (oe | Sc 5-212
a.Surface Mounted on FR4 Board, t <10sec. b Pulse Test:Pulse Width <300 vs, Duty Cycle < 2%. Figure 1. Output Characteristics Figure 2. Transfer Characteristics
Figure 5. Gate Threshold Variation Figure 6. Breakdown Voltage Variation
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Figure 7. Transconductance Variation Figure 8. Body Diode Forward Voltage
Figure 3. Capacitance Figure 4. On-Resistance Variation with
8 P Drain Current and Temperature
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Figure 9. Gate Charge Figure 10. Maximum Safe
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Figure 11. Switching Test Circuit Figure 12. Switching Waveforms
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Figure 13. Normalized Thermal Transient Impedance Curve