CEH2316 CET | Alldatasheet
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Technical content
N-Channel Enhancement Mode Field Effect Transistor CEH2316
FEATURES
30V, 6A , RDS(ON) = 34mΩ @VGS = 10V. RDS(ON) = 50mΩ @VGS = 4.5V. High dense cell design for extremely low RDS(ON). Rugged and reliable. TSOP-6 package. ABSOLUTE MAXIMUM RATINGS TA = 25 C unless otherwise noted Parameter Symbol Limit Units Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous Drain Current-Pulsed a Maximum Power Dissipation VDS VGS ID PD IDM 2.0 ±20 V W A A V S(4) G(3) D(1,2,5,6,) Lead free product is acquired. http://www.cetsemi.com TSOP-6 Rev 1. 2005.December Operating and Store Temperature Range TJ,Tstg -55 to 150 C Thermal Characteristics Thermal Resistance, Junction-to-Ambient b Parameter Symbol Limit Units C/W62.5RθJA
Electrical Characteristics TA = 25 C unless otherwise noted Parameter Symbol Min Units Off Characteristics Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate Body Leakage Current, Forward Forward Transconductance Gate Threshold Voltage Static Drain-Source On-Resistance BVDSS IDSS IGSSR IGSSF 3427 1.0 -100 100 mΩ V nA nA µA V S Gate Body Leakage Current, Reverse On Characteristics Dynamic Characteristics d Input Capacitance Reverse Transfer Capacitance Output Capacitance Switching Characteristics d Turn-On Delay Time Turn-Off Fall Time Turn-Off Delay Time Turn-On Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Drain-Source Diode Characteristics and Maximun Ratings Drain-Source Diode Forward Current b Drain-Source Diode Forward Voltage c Test Condition VGS = 0V, ID = 250µA VGS(th) RDS(on) gFS Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd IS VSD Typ Max VDS = 30V, VGS = 0V VGS = 20V, VDS = 0V VGS = 20V, VDS = 0V VGS = VDS, ID = 250µA VGS = 10V, ID = 6A VGS = 4.5V, ID = 4.9A VDS = 15V, ID = 6A VDD = 15V, ID = 5.5A, VGS = 10V, RGEN = 3Ω VDS = 15V, ID = 6A, VGS = 10V VDS = 15V, VGS = 0V, f = 1.0 MHz VGS = 0V, IS = 1.7A 610 145 12.3 1.5 2.5 1.7 1.2 5036 mΩ pF pF pF ns ns ns ns nC nC nC A V 3.0 Notes : a.Repetitive Rating : Pulse width limited by maximum junction temperature. b.Surface Mounted on FR4 Board, t < 5 sec. c.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%. d.Guaranteed by design, not subject to production testing.