CEF07N8 CET | Alldatasheet
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Technical content
N-Channel Logic Level Enhancement Mode Field Effect Transistor
FEATURES
800V , 4A , RDS(ON) =2 @V GS =10V. Super high dense cell design for extremely low RDS(ON) . High power and current handling capability. TO-220F full-pak for through hole ABSOLUTE MAXIMUM RATINGS (Tc=25 C unless otherwise noted) Parameter Symbol Limit Unit Drain-Source Voltage VDS V Gate-Source Voltage VGS 30 V -Pulsed ID 4 A IDM A Drain-Source Diode Forward Current IS 4 A Maximum Power Dissipation PD W Operating and Storage Temperautre RangeTJ,TSTG -55 to 150 C THERMAL CHARACTERISTICS Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient R įJC R įJA 2.5 /WC /WC Ω @Tc=25 C Derate above 25 C
0.4 W/ C
S G D 6-137 PRELIMINARY CEF07N8 Ć TO-220F S D G
ELECTRICAL CHARACTERISTICS (T C =25 C unless otherwise noted) Parameter Symbol Condition Min Typ Max Unit DRAIN-SOURCE AVALANCHE RATING a OFF CHARACTERISTICS Drain-Source Breakdown Voltage BV DSS VGS =0 V ,ID = 250µA 800 V Zero Gate Voltage Drain Current IDSS VDS = 800V, VGS =0 V 50 µA Gate-Body Leakage IGSS VGS = ȀȀ30V, VDS =0 V 100 nA ON CHARACTERISTICS a Gate Threshold Voltage VGS(th) VDS =V GS ,ID = 250µA 24 ȶ Drain-Source On-State Resistance R DS(ON) VGS =10V, ID =4 A 1.8 2.0 Ω On-State Drain Current ID(ON) VGS = 10V, VDS =1 0 V A SForward Transconductance FSg VDS = 50V, ID =4A SWITCHING CHARACTERISTICS b Turn-On Delay Time Rise Time Turn-Off Delay Time tD(ON) tr tD(OFF) tf VDD = 400V, ID =6 A , VGS =1 0 V R GEN =25 32 45 ns ns ns ns 68 95 194 230 70 98 Total Gate Charge Gate-Source Charge Gate-Drain Charge Q g Q gs Q gd VDS =640V, ID = 6A, VGS =10V 70 85 nC nC nC Fall Time 6-138 Single Pulse Drain-Source Avalanche Energy Maximum Drain-Source Avalanche Current EAS IAS VDD 50V, L=30.6mHȝ A mJ Ω CEF07N8 R G =25Ω 500 Ć Ć