CDP1853 INTERSIL | Alldatasheet

Document overview

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  • PDF pages: 6

Technical content

Features

  • Provides Direct Control of Up to 7 Input and 7 Output Devices
  • CHIP ENABLE (CE) Allows Easy Expansion for Multi- level I/O Systems

Ordering Information

PACKAGE TEMP. RANGE 5V 10V PKG. NO. PDIP -40 oC to +85oC CDP1853CE CDP1853E E16.3 Burn-In CDP1853CEX - E16.3 SBDIP -40 oC to +85oC CDP1853CD CDP1853D D16.3 Burn-In CDP1853CDX - D16.3 March 1997 File Number 1189.2 Pinout

16 LEAD DIP

V SS OUT 3 VDD CE OUT 4 OUT 5 OUT 6 OUT 7 CLK B CDP1853 Functional Diagram FIGURE 1. Qn

1 OF 8

A CLOCK B (TPA) (TPB) EN TRUTH TABLE 1 = High level, 0 = Low level, X = Don’t care † Qn-1 = Enable remains in previous state. CE CL A CL B EN 1 0 0 Qn-1 † 1011 1100 1111 0XX0 N 2 N 1 N 0 E N 01234567 0001 10000000 0011 01000000 0101 00100000 0111 00010000 1001 00001000 1011 00000100 1101 00000010 1111 00000001 X X X 0 00000000 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207| Copyright © Intersil Corporation 1999

CDP1853, CDP1853C Absolute Maximum Ratings Thermal Information DC Supply Voltage Range, (VDD ) (All voltage values referenced to VSS terminal) DD +0.5V Thermal Resistance (Typical) θJA (oC/W) θJC (oC/W) Operating Temperature Range (TA) At distance 1/16± 1/32 In. (1.59± 0.79mm) from case for 10s max CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Static Electrical SpecificationsAt TA = -40 to +85oC, Unless Otherwise Specified PARAMETER CONDITIONS LIMITS UNITS VO (V) VIN (V) VDD (V) CDP1853 CDP1853C MIN (NOTE1) TYP MAX MIN (NOTE1) TYP MAX Quiescent Device Current IL - -5- 11 0 - 55 0 µA - - 10 - 10 100 - - - µA Output Low Drive (Sink) Current Output High Drive (Source) Current Output Voltage Low Level (Note 2) VOL - 0, 5 5 - 0 0.1 - 0 0.1 V Output Voltage High Level VOH - 0, 5 5 4.9 5 - 4.9 5 - V Input Low Voltage V Input High Voltage V IH 0.5, 4.5 - 5 3.5 - - 3.5 - - V Input Leakage Current I IN Any Input Operating Current (Note 3) IDD1 0, 5 0, 5 5 - 50 100 - 50 100 µA 0, 10 0, 10 10 - 150 300 - - - µA Input Capacitance C IN - - - - 5 7.5 - 5 7.5 pF Output Capacitance C OUT - - - - 10 15 - 10 15 pF NOTES: 1. Typical values are for TA = +25oC and nominal voltage. 2. IOL = IOH = 1µA 3. Operating current measured in a CDP1802 system at 2MHz with outputs floating. Spec Number

CDP1853, CDP1853C Recommended Operating Conditions At TA = Full Package Temperature Range. For maximum reliability, operating conditions should be selected so that operation is always within the following ranges: PARAMETER LIMITS UNITS CDP1853 CDP1853C MIN MAX MIN MAX Supply Voltage Range 4 10.5 4 6.5 V Recommended Input Voltage Range V SS VDD VSS VDD V Dynamic Electrical SpecificationsAt TA = -40 to +85oC, VDD =±5%, VIH = 0.7VDD , VIL = 0.3VDD , tR , tF = 20ns, CL = 100pF , Unless Otherwise Specified PARAMETER V DD (V) LIMITS UNITS CDP1853 CDP1853C MIN TYP MAX MIN TYP MAX Propagation Delay Time: CE to Output t EOH, tEOL 5 - 175 275 - 175 275 ns 10 - 90 150 - - - ns N to Output t NOH, tNOL 5 - 225 350 - 225 350 ns 10 - 120 200 - - - ns Clock A to Output t AO 5 - 200 300 - 200 300 ns 10 - 100 150 - - - ns Clock B to Output t BO 5 - 175 275 - 175 275 ns 10 - 90 150 - - - ns Minimum Pulse Widths: ns Clock A t CACA 5 - 50 75 - 50 75 ns 10 - 25 50 - - - ns Clock B t CBCB 5 - 50 75 - 50 75 ns 10 - 25 50 - - - ns NOTES: 1. Maximum limits of minimum characteristics are the values above which all devices function. 2. Typical values are for T A = +25oC and nominal voltages.

FIGURE 5. N-BIT DECODER IN A ONE-LEVEL I/O SYSTEM FIGURE 6. TWO-LEVEL I/O USING CDP1853 AND CDP1852

7 INPUT PORTS

69 INSTRUCTION

7 OUTPUT PORTS

5 CDP1852 INPUT AND OUTPUT PORTS

7 INPUT

6 OUTPUT

All Intersil semiconductor products are manufactured, assembled and tested underISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web sitehttp://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee

1130 Brussels, Belgium

TEL: (32) 2.724.2111 ASIA Intersil (Taiwan) Ltd. Taiwan Limited 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029 CDP1853, CDP1853C