CDC351 TI | Alldatasheet
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www.ti.com GND Y10 VCC OE A VCC GND GND VCC GND GND VCC GND DB OR DW PACKAGE (TOP VIEW) CDC351. CDC351I 1-LINE TO 10-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS SCAS441DFEBRUARY 1994REVISED OCTOBER 2003
FEATURES
- Low Output Skew, Low Pulse Skew for Clock-Distribution and Clock-Generation
Applications
- Operates at 3.3-V VCC
- LVTTL-Compatible Inputs and Outputs
- Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)
- Distributes One Clock Input to Ten Outputs
- Distributed VCC and Ground Pins Reduce Switching Noise
- High-Drive Outputs (32-mA IOH, 32-mA IOL)
- State-of-the-Art EPIC-IIB BiCMOS Design Significantly Reduces Power Dissipation
- Package Options Include Plastic Small-Outline (DW) and Shrink Small-Outline (DB) Packages
DESCRIPTION
The CDC351 is a high-performance clock-driver circuit that distributes one input (A) to ten outputs (Y) with minimum skew for clock distribution. The output-enable (OE) input disables the outputs to a high-impedance state. The CDC351 operates at nominal 3.3-V VCC. The propagation delays are adjusted at the factory using the P0 and P1 pins. The factory adjustments ensure that the part-to-part skew is minimized and is kept within a specified window. Pins P0 and P1 are not intended for customer use and should be connected to GND. FUNCTION TABLE INPUTS OUTPUTS YnA OE L H Z H H Z L L L H L H AVAILABLE OPTIONS TA Shrink Small-Outline Package (DB) (1) Small-Outline Package (DW) (1) 0°C to 70°C CDC351DB CDC351DW 40°C to 85°C CDC351IDB CDC351IDW (1) This package is available tape and reel. Order by adding an R to the orderable part number (e.g., CDC351DBR). EPIC-IIB is a trademark of Texas Instruments. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Copyright © 19942003, Texas Instruments Incorporated Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily in- cludetestingofallparameters.
www.ti.com EN A Y10 OE OE Y10 A P0 P1 CDC351. CDC351I 1-LINE TO 10-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS SCAS441DFEBRUARY 1994REVISED OCTOBER 2003 LOGIC SYMBOL A Note A: This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. LOGIC DIAGRAM (POSITIVE LOGIC)
www.ti.com CDC351. CDC351I 1-LINE TO 10-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS SCAS441DFEBRUARY 1994REVISED OCTOBER 2003 ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) Supply voltage range, VCC 0.5 V to 4.6 V Input voltage range, VI (2) 0.5 V to 7 V Voltage range applied to any output in the VO (2) 0.5 V to 3.6 V high state or power-off state, Current into any output in the low state, IO 64 mA Input clamp current, IIK(VI < 0) 18 mA Output clamp current, IOK (VI < 0) 50 mA Package thermal impedance QJA (3): DB package 147°C/ W DW package 101°C/ W Storage temperature range, Tstg 65°C to 150°C (1) Stresses beyond those listed under,, absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under,, recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. (3) The package thermal impedance is calculated in accordance with JESD51. RECOMMENDED OPERATING CONDITIONS (1) MIN MAX UNIT VCC Supply voltage 3 3.6 V VIH High-level input voltage 2 V VIL Low-level input voltage 0.8 V VI Input voltage 0 5.5 V IOH High-level output current 32 mA IOL Low-level output current 32 mA fclock Input clock frequency 100 MHz Commercial 0 70 °C TA Operating free-air temperature Industrial 40 85 °C (1) Unused pins (input or I/O) must be held high or low.
ELECTRICAL CHARACTERISTICS
over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIK VCC = 3 V, II = 18 mA 1.2 V VOH VCC = 3 V, IOH = 32 mA 2 V VOL VCC = 3 V, IOL = 32 mA 0.5 V II VCC = 3.6 V, VI = VCC or GND ±1 µA IO (1) VCC = 3.6 V, VO = 2.5 V 15 150 mA IOZ VCC = 3.6 V, VO = 3 V or 0 ±10 µA Outputs high 0.3 ICC VCC = 3.6 V, IO = 0, VI = VCC or GND Outputs low 25 mA Outputs disabled 0.3 Ci VI = VCC or GND, VCC = 3.3 V, f = 10 MHz 4 pF Co VO = VCC or GND, VCC = 3.3 V, f = 10 MHz 6 pF (1) Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
www.ti.com CDC351. CDC351I 1-LINE TO 10-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS SCAS441DFEBRUARY 1994REVISED OCTOBER 2003 SWITICHING CHARACTERISTICS CL = 50 pF (see Figure 1 and Figure 2) VCC = 3 V to 3.6 V, VCC = 3 V to 3.6 V,VCC = 3.3 V, TA = 25°CFROM TO TA = 0°C to 70°C TA = -40°C to 85°CPARAMETER UNIT(INPUT) (OUTPUT) MIN TYP MAX MIN MAX MIN MAX tPLH 3.2 3.7 4.2 A Y ns tPHL 3 3.5 4 OE Y ns OE Y ns tsk(o) A Y 0.3 0.5 0.5 0.6 ns tsk(p) A Y 0.2 0.8 0.8 0.9 ns tsk(pr) A Y 1 1 1.1 ns tr A Y 1.5 1.5 ns tf A Y 1.5 1.5 ns SWITCHING CHARACTERISTICS TEMPERATURE AND VCC COEFFICIENTS over recommended operating free-air temperature and VCC range (1) FROM TOPARAMETER MIN MAX UNIT(INPUT) (OUTPUT) Average temperature coefficient of low to high propagation§tPLH(T) A Y 65 (2) ps/10°Cdelay Average temperature coefficient of high to low propagation§tPHL(T) A Y 45 (2) ps/10°Cdelay §tPLH(VCC) Average VCC coefficient of low to high propagation delay A Y 140 (3) ps/ 100 mV §tPHL(VCC) Average VCC coefficient of high to low propagation delay A Y 120 (3) ps/ 100 mV (1) These data were extracted from characterization material and are not tested at the factory. (2) §tPLH(T) and §tPHL(T) are virtually independent of VCC. (3) §tPLH(VCC) and §tPHL(VCC) are virtually independent of temperature.
3 VData Input
A. CL includes probe and jig capacitance. D. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuit and Voltage Waveforms
B. Pulse skew, tsk(p), is calculated as the greater of | tPLHn - tPHLn | (n = 1, 2, 3, 4, 5, 6, 7, 8, 9, 10). Figure 2. Waveforms for Calculation of tsk(o), tsk(p), tsk(pr)
www.ti.com 14-May-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) CDC351DB Active Production SSOP (DB) | 24 60 | TUBE Yes NIPDAU Level-1-260C-UNLIM 0 to 70 CK351 CDC351DB.Z Active Production SSOP (DB) | 24 60 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 CK351 CDC351DBG4.Z Active Production SSOP (DB) | 24 60 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 CK351 CDC351DBR Active Production SSOP (DB) | 24 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM 0 to 70 CK351 CDC351DBR.Z Active Production SSOP (DB) | 24 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 CK351 CDC351DW Active Production SOIC (DW) | 24 25 | TUBE Yes NIPDAU Level-1-260C-UNLIM 0 to 70 CDC351 CDC351DW.Z Active Production SOIC (DW) | 24 25 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 CDC351 CDC351DWG4 Active Production SOIC (DW) | 24 25 | TUBE Yes NIPDAU Level-1-260C-UNLIM 0 to 70 CDC351 CDC351DWR Active Production SOIC (DW) | 24 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM 0 to 70 CDC351 CDC351DWR.Z Active Production SOIC (DW) | 24 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 CDC351 CDC351IDB Active Production SSOP (DB) | 24 60 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 CK351-I CDC351IDB.Z Active Production SSOP (DB) | 24 60 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 CK351-I CDC351IDBR Active Production SSOP (DB) | 24 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 CK351-I CDC351IDBR.Z Active Production SSOP (DB) | 24 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 CK351-I CDC351IDBRG4.Z Active Production SSOP (DB) | 24 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 CK351-I CDC351IDW Active Production SOIC (DW) | 24 25 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 CDC351-I CDC351IDW.Z Active Production SOIC (DW) | 24 25 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 CDC351-I (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. Addendum-Page 1
www.ti.com 14-May-2025 (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2
PACKAGE MATERIALS INFORMATION www.ti.com 13-May-2025 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION www.ti.com 13-May-2025 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CDC351DBR SSOP DB 24 2000 356.0 356.0 35.0 CDC351DWR SOIC DW 24 2000 350.0 350.0 43.0 CDC351IDBR SSOP DB 24 2000 356.0 356.0 35.0 Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION www.ti.com 13-May-2025 TUBE L - Tube length T - Tube height W - Tube width B - Alignment groove width *All dimensions are nominal Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) CDC351DB DB SSOP 24 60 530 10.5 4000 4.1 CDC351DB.Z DB SSOP 24 60 530 10.5 4000 4.1 CDC351DBG4.Z DB SSOP 24 60 530 10.5 4000 4.1 CDC351DW DW SOIC 24 25 506.98 12.7 4826 6.6 CDC351DW.Z DW SOIC 24 25 506.98 12.7 4826 6.6 CDC351DWG4 DW SOIC 24 25 506.98 12.7 4826 6.6 CDC351IDB DB SSOP 24 60 530 10.5 4000 4.1 CDC351IDB.Z DB SSOP 24 60 530 10.5 4000 4.1 CDC351IDW DW SOIC 24 25 506.98 12.7 4826 6.6 CDC351IDW.Z DW SOIC 24 25 506.98 12.7 4826 6.6 Pack Materials-Page 3
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 4040065 /E 12/01
28 PINS SHOWN
8,20 7,40 0,55 0,95 0,25 12,90 12,30 10,50 8,50 Seating Plane 9,907,90 10,50 9,90 0,38 5,60 5,00 0,22 A 2016 6,506,50 0,05 MIN 5,905,90 DIM A MAX A MIN PINS ** 2,00 MAX 6,90 7,50 0,65 M0,15 0°–/C02578° 0,10 0,09 0,25 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-150
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