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1-LINE TO 8-LINE CLOCK DRIVER SCAS333D – DECEMBER 1992 – REVISED OCTOBER 1998 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 /C0068Low Output Skew, Low Pulse Skew for Clock-Distribution and Clock-Generation
Applications
/C0068TTL-Compatible Inputs and Outputs /C0068Distributes One Clock Input to Eight Outputs /C0068Distributed VCC and Ground Pins Reduce Switching Noise /C0068High-Drive Outputs (–48-mA IOH , 48-mA IOL ) /C0068State-of-the-Art EPIC-ΙΙB BiCMOS Design Significantly Reduces Power Dissipation /C0068Packaging Options Include Plastic Small-Outline (DW) Packages
description
The CDC341 is a high-performance clock-driver circuit that distributes one (A) input signal to eight (Y) outputs with minimum skew for clock distribution. Through the use of the control pins (1G and 2G), the outputs can be placed in a low state regardless of the A input. The propagation delays are adjusted at the factory using the P0 and P1 pins. These pins are not intended for customer use and should be strapped to GND. The CDC341 is characterized for operation from 0°C to 70°C. FUNCTION TABLE INPUTS OUTPUTS 1G 2G A 1Y1–1Y4 2Y1–2Y4 X X L L L L LH L L L HH L H H LH H L H H H H H Copyright 1998, Texas Instruments IncorporatedPRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. EPIC-ΙΙΒ is a trademark of Texas Instruments Incorporated. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. VCC A VCC 2Y4 2Y3 GND V CC 1Y1 1Y2 GND 1Y3 1Y4 GND 2Y1 2Y2 GND DW PACKAGE (TOP VIEW)
1-LINE TO 8-LINE CLOCK DRIVER SCAS333D – DECEMBER 1992 – REVISED OCTOBER 1998
2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic symbol† A 1Y1 1Y2 1Y3 1Y4 2Y1 2Y2 2Y3 2Y4 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. logic diagram (positive logic) 1Y1 2G 1Y2 1Y3 1Y4 2Y1 2Y2 2Y3 2Y4 A
1-LINE TO 8-LINE CLOCK DRIVER SCAS333D – DECEMBER 1992 – REVISED OCTOBER 1998 3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Voltage range applied to any output in the high state or power-off state, † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils. For more information, refer to the Package Thermal Considerations application note in the ABT Advanced BiCMOS Technology Data Book, literature number SCBD002. recommended operating conditions (see Note 3) MIN MAX UNIT VCC Supply voltage 4.75 5.25 V VIH High-level input voltage 2 V VIL Low-level input voltage 0.8 V VI Input voltage 0 VCC V IOH High-level output current –48 mA IOL Low-level output current 48 mA f lk Input clock frequency One output bank loaded 80 MHzfclock Input clock frequency Both output banks loaded 40 MH z TA Operating free-air temperature 0 70 °C NOTE 3: Unused pins (input or I/O) must be held high or low.
1-LINE TO 8-LINE CLOCK DRIVER SCAS333D – DECEMBER 1992 – REVISED OCTOBER 1998
4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS TA = 25°C MIN MAX UNITPARAMETER TEST CONDITIONS MIN TYP † MAX MIN MAX UNIT VIK VCC = 4.75 V, II = –18 mA –1.2 –1.2 V VCC = 4.75 V, IOH = – 3 mA 2.5 2.5 VOH VCC = 5 V, IOH = – 3 mA 3 3 V VCC = 4.75 V, IOH = – 48 mA 2 2 VOL VCC = 4.75 V, IOL = 48 mA 0.5 V II VCC = 5.25 V, VI = VCC or GND ± 1 ± 1 µA IO ‡ VCC = 5.25 V, VO = 2.5 V –50 –100 –200 –50 –200 mA ICC VCC = 5.25 V, I O = 0, Outputs high 2 3.5 mAICC CC , O , VI = VCC or GND Outputs low 24 33 mA C i VI = 2.5 V or 0.5 V 3 pF † All typical values are at VCC = 5 V. ‡ Not more than one output should be tested at a time, and the duration of the test should not exceed one second. switching characteristics, CL = 50 pF (see Figures 1 and 2) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 5 V, TA = 25°C VCC = 4.75 V to 5.25 V, TA = 0°C to 70°C UNIT(INPUT) (OUTPUT) MIN TYP MAX MIN MAX tPLH A Y 3.5 4.5 3.1 4.9 ns tPHL A Y 3.5 4.3 3.1 4.9 ns tPLH G Y 2 3.8 2 4 ns tPHL G Y 2 3.8 2 4 ns tsk(o) 0.3 0.5 0.6 tsk(p) A Y 0.6 0.8 0.9 ns tsk(pr) 1 1 tr A Y 1.5 ns tf A Y 1.5 ns tpd performance information relative to VCC and temperature variation (see Note 4) DtPLH(TA)† Temperature drift of tPLH from 0°C to 70°C –41 ps/10°C DtPHL(TA)† Temperature drift of tPHL from 0°C to 70°C –52 ps/10°C DtPLH(VCC) ‡ VCC drift of tPLH from 4.75 V to 5.25 V 28 ps/100 mV DtPHL(VCC) ‡§ VCC drift of tPHL from 4.75 V to 5.25 V 20 ps/100 mV † Virtually independent of VCC‡ Virtually independent of temperature NOTE 4: The data extracted is from a wide range of characterization material.
1-LINE TO 8-LINE CLOCK DRIVER SCAS333D – DECEMBER 1992 – REVISED OCTOBER 1998
6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
16 PIN SHOWN
0.400 (10,15) 0.419 (10,65) 0.104 (2,65) MAX 0.012 (0,30) 0.004 (0,10) A 0.020 (0,51) 0.014 (0,35) 0.293 (7,45) 0.299 (7,59) 0.010 (0,25) 0.050 (1,27) 0.016 (0,40) (15,24) (15,49) PINS ** 0.010 (0,25) NOM A MAX DIM A MIN Gage Plane 0.500 (12,70) (12,95) 0.510 (10,16) (10,41) 0.400 0.410 0.600 0.610 0.004 (0,10) M0.010 (0,25) 0.050 (1,27) 0°–8° NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15). D. Falls within JEDEC MS-013
Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) CDC341DBLE OBSOLETE SSOP DB 20 TBD Call TI Call TI CDC341DW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CDC341DWG4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CDC341DWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CDC341DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CDC341NSR OBSOLETE SO NS 20 TBD Call TI Call TI CDC341NSRG4 OBSOLETE SO NS 20 TBD Call TI Call TI (1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2)Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2008 Addendum-Page 1
*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 Pack Materials-Page 1
*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CDC341DWR SOIC DW 20 2000 346.0 346.0 41.0 PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 Pack Materials-Page 2
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